2020-05-11 07:40:45

by Paul Menzel

[permalink] [raw]
Subject: Re: [PATCH] x86/tsc: Use hard-coded crystal clock for Skylake mobile

Dear Thomas,


Thank you for the quick reply.

Am 11.05.20 um 09:17 schrieb Thomas Gleixner:

> Paul Menzel <[email protected]> writes:
>
> please send patches to LKML and not offlist.

Sorry about that. From `MAINTAINERS` I thought [email protected] is wanted.
Other subsystems list LKML explicitly there.

>> From: Radoslaw Biernacki <[email protected]>
>>
>> @@ -636,10 +636,24 @@ unsigned long native_calibrate_tsc(void)
>> * Denverton SoCs don't report crystal clock, and also don't support
>> * CPUID.0x16 for the calculation below, so hardcode the 25MHz crystal
>> * clock.
>> + * Also estimation code is not reliable and gives 1.5% difference for
>> + * tsc/clock ratio on Skylake mobile. Therefore below is a hardcoded
>> + * crystal frequency for Skylake which was removed by upstream commit
>> + * "x86/tsc: Use CPUID.0x16 to calculate missing crystal frequency"
>> + * This is temporary workaround for bugs:
>> + * b/148108096, b/154283905, b/146787525, b/153400677, b/148178929
>> + * chromium/1031054
>> */
>> - if (crystal_khz == 0 &&
>> - boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT_D)
>> - crystal_khz = 25000;
>> + if (crystal_khz == 0) {
>> + switch (boot_cpu_data.x86_model) {
>> + case INTEL_FAM6_SKYLAKE_MOBILE:
>> + crystal_khz = 24000; /* 24.0 MHz */
>> + break;
>> + case INTEL_FAM6_ATOM_GOLDMONT_X:
>> + crystal_khz = 25000; /* 25.0 MHz */
>> + break;
>> + }
>
> Aside of being a workaround for Google issues which are probably caused > by broken BIOSes

Even if it was caused by broken firmware, wouldn’t Linux’ no regression
policy still consider this a regression as user should be able to the
Linux kernel “no matter what”?

> that patch is broken.
>
> INTEL_FAM6_ATOM_GOLDMONT_D != INTEL_FAM6_ATOM_GOLDMONT_X

Good catch. The commit didn’t apply cleanly to the master branch, and I
missed this.

I’ll wait for Radoslaw to comment before proceeding further with this.


Kind regards,

Paul


2020-05-11 08:48:16

by Radoslaw Biernacki

[permalink] [raw]
Subject: Re: [PATCH] x86/tsc: Use hard-coded crystal clock for Skylake mobile

On Mon, May 11, 2020 at 9:38 AM Paul Menzel <[email protected]> wrote:
>
> Dear Thomas,
>
>
> Thank you for the quick reply.
>
> Am 11.05.20 um 09:17 schrieb Thomas Gleixner:
>
> > Paul Menzel <[email protected]> writes:
> >
> > please send patches to LKML and not offlist.
>
> Sorry about that. From `MAINTAINERS` I thought [email protected] is wanted.
> Other subsystems list LKML explicitly there.
>
> >> From: Radoslaw Biernacki <[email protected]>
> >>
> >> @@ -636,10 +636,24 @@ unsigned long native_calibrate_tsc(void)
> >> * Denverton SoCs don't report crystal clock, and also don't support
> >> * CPUID.0x16 for the calculation below, so hardcode the 25MHz crystal
> >> * clock.
> >> + * Also estimation code is not reliable and gives 1.5% difference for
> >> + * tsc/clock ratio on Skylake mobile. Therefore below is a hardcoded
> >> + * crystal frequency for Skylake which was removed by upstream commit
> >> + * "x86/tsc: Use CPUID.0x16 to calculate missing crystal frequency"
> >> + * This is temporary workaround for bugs:
> >> + * b/148108096, b/154283905, b/146787525, b/153400677, b/148178929
> >> + * chromium/1031054
> >> */
> >> - if (crystal_khz == 0 &&
> >> - boot_cpu_data.x86_model == INTEL_FAM6_ATOM_GOLDMONT_D)
> >> - crystal_khz = 25000;
> >> + if (crystal_khz == 0) {
> >> + switch (boot_cpu_data.x86_model) {
> >> + case INTEL_FAM6_SKYLAKE_MOBILE:
> >> + crystal_khz = 24000; /* 24.0 MHz */
> >> + break;
> >> + case INTEL_FAM6_ATOM_GOLDMONT_X:
> >> + crystal_khz = 25000; /* 25.0 MHz */
> >> + break;
> >> + }
> >
> > Aside of being a workaround for Google issues which are probably caused > by broken BIOSes
>
> Even if it was caused by broken firmware, wouldn’t Linux’ no regression
> policy still consider this a regression as user should be able to the
> Linux kernel “no matter what”?
>
> > that patch is broken.
> >
> > INTEL_FAM6_ATOM_GOLDMONT_D != INTEL_FAM6_ATOM_GOLDMONT_X
>
> Good catch. The commit didn’t apply cleanly to the master branch, and I
> missed this.
>
> I’ll wait for Radoslaw to comment before proceeding further with this.

We found that regression only on specific SKU which was used in one
model of ChromeBook.
What's interesting is that some other SKU is fine.

The consequences of this are rather not trivial,
so this was considered a quickfix and temporary till we develop
something better.
In contrast to ChromeOs, I know that there is no way of finding if
there are in fact regressions on generic kernel in the field (this is
SKU dependent),
but we also think that this problem should be addressed in a better
way (if possible).

We plan to work on this.
Any help is welcome.

>
>
> Kind regards,
>
> Paul

2020-05-11 09:38:25

by Peter Zijlstra

[permalink] [raw]
Subject: Re: [PATCH] x86/tsc: Use hard-coded crystal clock for Skylake mobile

On Mon, May 11, 2020 at 09:38:34AM +0200, Paul Menzel wrote:

> Sorry about that. From `MAINTAINERS` I thought [email protected] is wanted.
> Other subsystems list LKML explicitly there.

Not sure what you're reading but:

X86 ARCHITECTURE (32-BIT AND 64-BIT)
M: Thomas Gleixner <[email protected]>
M: Ingo Molnar <[email protected]>
M: Borislav Petkov <[email protected]>
M: [email protected]
R: "H. Peter Anvin" <[email protected]>
L: [email protected]
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
F: Documentation/devicetree/bindings/x86/
F: Documentation/x86/
F: arch/x86/

Explicitly lists LKML, also note how [email protected] is M not L. It is in
fact a mail alias for just a few people, it is _NOT_ a list.

2020-05-11 12:39:34

by Thomas Gleixner

[permalink] [raw]
Subject: Re: [PATCH] x86/tsc: Use hard-coded crystal clock for Skylake mobile

Radoslaw Biernacki <[email protected]> writes:
> We found that regression only on specific SKU which was used in one
> model of ChromeBook.
> What's interesting is that some other SKU is fine.
>
> The consequences of this are rather not trivial,
> so this was considered a quickfix and temporary till we develop
> something better.
> In contrast to ChromeOs, I know that there is no way of finding if
> there are in fact regressions on generic kernel in the field (this is
> SKU dependent),
> but we also think that this problem should be addressed in a better
> way (if possible).

Fix the BIOS to setup the CPUID/MSRs correctly?

Thanks,

tglx

2020-05-11 15:41:36

by Radoslaw Biernacki

[permalink] [raw]
Subject: Re: [PATCH] x86/tsc: Use hard-coded crystal clock for Skylake mobile

On Mon, May 11, 2020 at 2:34 PM Thomas Gleixner <[email protected]> wrote:
>
> Radoslaw Biernacki <[email protected]> writes:
> > We found that regression only on specific SKU which was used in one
> > model of ChromeBook.
> > What's interesting is that some other SKU is fine.
> >
> > The consequences of this are rather not trivial,
> > so this was considered a quickfix and temporary till we develop
> > something better.
> > In contrast to ChromeOs, I know that there is no way of finding if
> > there are in fact regressions on generic kernel in the field (this is
> > SKU dependent),
> > but we also think that this problem should be addressed in a better
> > way (if possible).
>
> Fix the BIOS to setup the CPUID/MSRs correctly?
>
> Thanks,
>
> tglx

Yes of course, but "if possible" might mean we would not be able to
fix the BIOS.
Anyway, let me see what actually can be done.