From: Jim Liu <[email protected]>
This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC.
Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595)
and parallel to serial IC (HC165), and use APB3 clock to control it.
This interface has 4 pins (D_out , D_in, S_CLK, LDSH).
NPCM7xx/NPCM8xx have two sgpio module each module can support up
to 64 output pins,and up to 64 input pin, the pin is only for GPI or GPO.
Jim Liu (3):
dt-bindings: gpio: add NPCM sgpio driver bindings
arm: dts: nuvoton: npcm: Add sgpio feature
gpio: nuvoton: Add Nuvoton NPCM sgpio driver
.../bindings/gpio/nuvoton,sgpio.yaml | 87 +++
.../dts/nuvoton/nuvoton-common-npcm7xx.dtsi | 24 +
drivers/gpio/Kconfig | 7 +
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-npcm-sgpio.c | 612 ++++++++++++++++++
5 files changed, 731 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
create mode 100644 drivers/gpio/gpio-npcm-sgpio.c
--
2.25.1
From: Jim Liu <[email protected]>
Add the SGPIO controller to the NPCM7xx devicetree
Signed-off-by: Jim Liu <[email protected]>
---
Changes for v10:
- no changed
Changes for v9:
- no changed
---
.../dts/nuvoton/nuvoton-common-npcm7xx.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
index 868454ae6bde..df91517a4842 100644
--- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
@@ -372,6 +372,30 @@ &fanin12_pins &fanin13_pins
status = "disabled";
};
+ gpio8: gpio@101000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x101000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
+ gpio9: gpio@102000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x102000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ status = "disabled";
+ };
+
i2c0: i2c@80000 {
reg = <0x80000 0x1000>;
compatible = "nuvoton,npcm750-i2c";
--
2.25.1
From: Jim Liu <[email protected]>
Add dt-bindings document for the Nuvoton NPCM7xx sgpio driver
Signed-off-by: Jim Liu <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Paul Menzel <[email protected]>
---
Changes for v10:
- modify error words
Changes for v9:
- no changed
Changes for v8:
- no changed
---
.../bindings/gpio/nuvoton,sgpio.yaml | 87 +++++++++++++++++++
1 file changed, 87 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
diff --git a/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
new file mode 100644
index 000000000000..9e32e54aeb24
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
@@ -0,0 +1,87 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nuvoton SGPIO controller
+
+maintainers:
+ - Jim LIU <[email protected]>
+
+description: |
+ This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC and detailed
+ information is in the NPCM7XX/8XX SERIAL I/O EXPANSION INTERFACE section.
+ Nuvoton NPCM7xx SGPIO module is combines a serial to parallel IC (HC595)
+ and a parallel to serial IC (HC165).
+ Clock is a division of the APB3 clock.
+ This interface has 4 pins (D_out , D_in, S_CLK, LDSH).
+ NPCM7xx/NPCM8xx have two sgpio modules. Each module can support up
+ to 64 output pins, and up to 64 input pins, the pin is only for GPI or GPO.
+ GPIO pins can be programmed to support the following options
+ - Support interrupt option for each input port and various interrupt
+ sensitivity options (level-high, level-low, edge-high, edge-low)
+ - ngpios is number of nuvoton,input-ngpios GPIO lines and nuvoton,output-ngpios GPIO lines.
+ nuvoton,input-ngpios GPIO lines is only for GPI.
+ nuvoton,output-ngpios GPIO lines is only for GPO.
+
+properties:
+ compatible:
+ enum:
+ - nuvoton,npcm750-sgpio
+ - nuvoton,npcm845-sgpio
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ nuvoton,input-ngpios:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ The numbers of GPIO's exposed. GPIO lines are only for GPI.
+ minimum: 0
+ maximum: 64
+
+ nuvoton,output-ngpios:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ The numbers of GPIO's exposed. GPIO lines are only for GPO.
+ minimum: 0
+ maximum: 64
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - '#gpio-cells'
+ - interrupts
+ - nuvoton,input-ngpios
+ - nuvoton,output-ngpios
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ gpio8: gpio@101000 {
+ compatible = "nuvoton,npcm750-sgpio";
+ reg = <0x101000 0x200>;
+ clocks = <&clk NPCM7XX_CLK_APB3>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ nuvoton,input-ngpios = <64>;
+ nuvoton,output-ngpios = <64>;
+ };
--
2.25.1
On Fri, Dec 29, 2023 at 8:45 AM <[email protected]> wrote:
>
> From: Jim Liu <[email protected]>
>
> This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC.
> Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595)
> and parallel to serial IC (HC165), and use APB3 clock to control it.
> This interface has 4 pins (D_out , D_in, S_CLK, LDSH).
> NPCM7xx/NPCM8xx have two sgpio module each module can support up
> to 64 output pins,and up to 64 input pin, the pin is only for GPI or GPO.
>
> Jim Liu (3):
> dt-bindings: gpio: add NPCM sgpio driver bindings
> arm: dts: nuvoton: npcm: Add sgpio feature
> gpio: nuvoton: Add Nuvoton NPCM sgpio driver
>
> .../bindings/gpio/nuvoton,sgpio.yaml | 87 +++
> .../dts/nuvoton/nuvoton-common-npcm7xx.dtsi | 24 +
> drivers/gpio/Kconfig | 7 +
> drivers/gpio/Makefile | 1 +
> drivers/gpio/gpio-npcm-sgpio.c | 612 ++++++++++++++++++
> 5 files changed, 731 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpio/nuvoton,sgpio.yaml
> create mode 100644 drivers/gpio/gpio-npcm-sgpio.c
>
> --
> 2.25.1
>
Applied patches 1 and 3.
Bart