From: Clément Léger <[email protected]>
The r9a06g032 SoC of the RZ/N1 family features two GMAC devices named
GMAC1/2, that are based on Synopsys cores. GMAC1 is connected to a
RGMII/RMII converter that is already described in this device tree.
Signed-off-by: "Clément Léger" <[email protected]>
[rgantois: commit log]
Signed-off-by: Romain Gantois <[email protected]>
---
arch/arm/boot/dts/renesas/r9a06g032.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
index fa63e1afc4ef4..cab7a641f95ba 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
@@ -316,6 +316,25 @@ dma1: dma-controller@40105000 {
data-width = <8>;
};
+ gmac1: ethernet@44000000 {
+ compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
+ reg = <0x44000000 0x2000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
+ clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
+ clock-names = "stmmaceth";
+ power-domains = <&sysctrl>;
+ snps,multicast-filter-bins = <256>;
+ snps,perfect-filter-entries = <128>;
+ tx-fifo-depth = <2048>;
+ rx-fifo-depth = <4096>;
+ pcs-handle = <&mii_conv1>;
+ status = "disabled";
+ };
+
gmac2: ethernet@44002000 {
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
reg = <0x44002000 0x2000>;
--
2.44.0
Hi Romain,
On Mon, Apr 15, 2024 at 11:18 AM Romain Gantois
<[email protected]> wrote:
> From: Clément Léger <[email protected]>
>
> The r9a06g032 SoC of the RZ/N1 family features two GMAC devices named
> GMAC1/2, that are based on Synopsys cores. GMAC1 is connected to a
> RGMII/RMII converter that is already described in this device tree.
>
> Signed-off-by: "Clément Léger" <[email protected]>
> [rgantois: commit log]
> Signed-off-by: Romain Gantois <[email protected]>
Thanks for your patch!
> --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> @@ -316,6 +316,25 @@ dma1: dma-controller@40105000 {
> data-width = <8>;
> };
>
> + gmac1: ethernet@44000000 {
> + compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
> + reg = <0x44000000 0x2000>;
> + interrupt-parent = <&gic>;
The surrounding "soc" node already specifies the interrupt parent,
so there is no need to repeat that. I could fix that while applying
to renesas-devel for v6.10, but it looks like there will be a v4 for
the rest of the series anyway?
The rest LGTM, so with the above fixed:
Reviewed-by: Geert Uytterhoeven <[email protected]>
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
> + clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
> + clock-names = "stmmaceth";
> + power-domains = <&sysctrl>;
> + snps,multicast-filter-bins = <256>;
> + snps,perfect-filter-entries = <128>;
> + tx-fifo-depth = <2048>;
> + rx-fifo-depth = <4096>;
> + pcs-handle = <&mii_conv1>;
> + status = "disabled";
> + };
> +
> gmac2: ethernet@44002000 {
> compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
> reg = <0x44002000 0x2000>;
>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
On Thu, 18 Apr 2024, Geert Uytterhoeven wrote:
> > + gmac1: ethernet@44000000 {
> > + compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
> > + reg = <0x44000000 0x2000>;
> > + interrupt-parent = <&gic>;
>
> The surrounding "soc" node already specifies the interrupt parent,
> so there is no need to repeat that. I could fix that while applying
> to renesas-devel for v6.10, but it looks like there will be a v4 for
> the rest of the series anyway?
Indeed there will be a v4 so I'll fix it.
Thanks,
--
Romain Gantois, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com