From: Lad Prabhakar <[email protected]>
Hi,
This patch series aims to add OSTM support for Renesas RZ/V2H(P) SoC.
RZ/V2H(P) SoC has 8 GTM channels.
Cheers,
Prabhakar
Lad Prabhakar (2):
dt-bindings: timer: renesas: ostm: Document Renesas RZ/V2H(P) SoC
clocksource/drivers/renesas-ostm: Add OSTM support for RZ/V2H(P) SoC
Documentation/devicetree/bindings/timer/renesas,ostm.yaml | 2 ++
drivers/clocksource/renesas-ostm.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
--
2.34.1
From: Lad Prabhakar <[email protected]>
Document the General Timer Module (a.k.a OSTM) block on Renesas RZ/V2H(P)
("R9A09G057") SoC, which is identical to the one found on the RZ/A1H and
RZ/G2L SoCs. Add the "renesas,r9a09g057-ostm" compatible string for the
RZ/V2H(P) SoC.
Signed-off-by: Lad Prabhakar <[email protected]>
---
Documentation/devicetree/bindings/timer/renesas,ostm.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/renesas,ostm.yaml b/Documentation/devicetree/bindings/timer/renesas,ostm.yaml
index 8b06a681764e..e8c642166462 100644
--- a/Documentation/devicetree/bindings/timer/renesas,ostm.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,ostm.yaml
@@ -26,6 +26,7 @@ properties:
- renesas,r9a07g043-ostm # RZ/G2UL and RZ/Five
- renesas,r9a07g044-ostm # RZ/G2{L,LC}
- renesas,r9a07g054-ostm # RZ/V2L
+ - renesas,r9a09g057-ostm # RZ/V2H(P)
- const: renesas,ostm # Generic
reg:
@@ -58,6 +59,7 @@ if:
- renesas,r9a07g043-ostm
- renesas,r9a07g044-ostm
- renesas,r9a07g054-ostm
+ - renesas,r9a09g057-ostm
then:
required:
- resets
--
2.34.1
From: Lad Prabhakar <[email protected]>
RZ/V2H(P) (R9A09G057) SoC has Generic Timer Module(a.k.a OSTM) which
needs to deassert the reset line before accessing any registers just
like the RZ/G2L SoC.
Enable the entry point for RZ/V2H(P) SoC so that we can deassert
the reset line in probe callback.
While at it use IS_ENABLED() macro instead of open coding.
Signed-off-by: Lad Prabhakar <[email protected]>
---
drivers/clocksource/renesas-ostm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c
index 8da972dc1713..b8b3c82b2528 100644
--- a/drivers/clocksource/renesas-ostm.c
+++ b/drivers/clocksource/renesas-ostm.c
@@ -224,7 +224,7 @@ static int __init ostm_init(struct device_node *np)
TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
-#ifdef CONFIG_ARCH_RZG2L
+#if IS_ENABLED(CONFIG_ARCH_RZG2L) || IS_ENABLED(CONFIG_ARCH_R9A09G057)
static int __init ostm_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
--
2.34.1
On Mon, Mar 18, 2024 at 5:08 PM Prabhakar <[email protected]> wrote:
> From: Lad Prabhakar <[email protected]>
>
> Document the General Timer Module (a.k.a OSTM) block on Renesas RZ/V2H(P)
> ("R9A09G057") SoC, which is identical to the one found on the RZ/A1H and
> RZ/G2L SoCs. Add the "renesas,r9a09g057-ostm" compatible string for the
> RZ/V2H(P) SoC.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Prabhakar,
Thanks for your patch!
On Mon, Mar 18, 2024 at 5:08 PM Prabhakar <[email protected]> wrote:
> From: Lad Prabhakar <[email protected]>
>
> RZ/V2H(P) (R9A09G057) SoC has Generic Timer Module(a.k.a OSTM) which
> needs to deassert the reset line before accessing any registers just
> like the RZ/G2L SoC.
>
> Enable the entry point for RZ/V2H(P) SoC so that we can deassert
> the reset line in probe callback.
This is not really what is happening.
As OSTM on RZ/V2H has a reset specified, the early call to ostm_init()
through TIMER_OF_DECLARE() always fails with -EPROBE_DEFER, as resets
are not available that early in the boot process. Hence the driver
needs to be reprobed later through the platform driver probe.
> While at it use IS_ENABLED() macro instead of open coding.
I don't see how the code was open-coding IS_ENABLED()?
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> --- a/drivers/clocksource/renesas-ostm.c
> +++ b/drivers/clocksource/renesas-ostm.c
> @@ -224,7 +224,7 @@ static int __init ostm_init(struct device_node *np)
>
> TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
>
> -#ifdef CONFIG_ARCH_RZG2L
> +#if IS_ENABLED(CONFIG_ARCH_RZG2L) || IS_ENABLED(CONFIG_ARCH_R9A09G057)
I think you want to use "defined()" instead of "IS_ENABLED()"?
> static int __init ostm_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
Thank you for the review.
On Tue, Mar 19, 2024 at 8:33 AM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Prabhakar,
>
> Thanks for your patch!
>
> On Mon, Mar 18, 2024 at 5:08 PM Prabhakar <prabhakar.csengg@gmailcom> wrote:
> > From: Lad Prabhakar <[email protected]>
> >
> > RZ/V2H(P) (R9A09G057) SoC has Generic Timer Module(a.k.a OSTM) which
> > needs to deassert the reset line before accessing any registers just
> > like the RZ/G2L SoC.
> >
> > Enable the entry point for RZ/V2H(P) SoC so that we can deassert
> > the reset line in probe callback.
>
> This is not really what is happening.
> As OSTM on RZ/V2H has a reset specified, the early call to ostm_init()
> through TIMER_OF_DECLARE() always fails with -EPROBE_DEFER, as resets
> are not available that early in the boot process. Hence the driver
> needs to be reprobed later through the platform driver probe.
>
Thank you for clarification. Ill update the commit description as above.
> > While at it use IS_ENABLED() macro instead of open coding.
>
> I don't see how the code was open-coding IS_ENABLED()?
>
Ahh..
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
>
> > --- a/drivers/clocksource/renesas-ostm.c
> > +++ b/drivers/clocksource/renesas-ostm.c
> > @@ -224,7 +224,7 @@ static int __init ostm_init(struct device_node *np)
> >
> > TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
> >
> > -#ifdef CONFIG_ARCH_RZG2L
> > +#if IS_ENABLED(CONFIG_ARCH_RZG2L) || IS_ENABLED(CONFIG_ARCH_R9A09G057)
>
> I think you want to use "defined()" instead of "IS_ENABLED()"?
>
OK, I will use defined().
Cheers,
Prabhakar
> > static int __init ostm_probe(struct platform_device *pdev)
> > {
> > struct device *dev = &pdev->dev;
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
On Mon, Mar 18, 2024 at 04:07:30PM +0000, Prabhakar wrote:
> From: Lad Prabhakar <[email protected]>
>
> Document the General Timer Module (a.k.a OSTM) block on Renesas RZ/V2H(P)
> ("R9A09G057") SoC, which is identical to the one found on the RZ/A1H and
> RZ/G2L SoCs. Add the "renesas,r9a09g057-ostm" compatible string for the
> RZ/V2H(P) SoC.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
Acked-by: Conor Dooley <[email protected]>