Scott,
On 29 February 2016 at 23:38, Scott Wood <[email protected]> wrote:
[...]
> Could you post a diff of what the decompiled trees look like before and after
> this change (e.g. interrupts went from 2-cell to 4-cell)? It is very hard to
> review in this form. Or better, like the config change, have a commit that
> first makes changes to what the unified trees will be, and then a second
> commit that generates the same output using includes.
Yes I'll surely do it.
>> +/include/ "qoriq-mpic.dtsi"
>> + pic@40000 {
>> + compatible = "chrp,open-pic";
>> + };
>
> This is removing the fsl,mpic compatible, which is required for 4-cell
> interrupt specifiers.
Ok.
>> +&pci0 {
>> + compatible = "fsl,mpc8641-pcie";
>> + device_type = "pci";
>> + #size-cells = <2>;
>> + #address-cells = <3>;
>> + bus-range = <0x0 0xff>;
>> + clock-frequency = <33333333>;
>
> The clock frequency of PCI Express is not 33 MHz.
A lot of dtsi files into fsl directory have got that value!
>> diff --git a/arch/powerpc/boot/dts/fsl/mpc8641si-pre.dtsi
[...]
>> +/dts-v1/;
>> +
>> +/ {
>> + compatible = "fsl,MPC8641";
>
> This compatible is pointless -- it will be overwritten by the board
> compatible.
Ok.
Thanks for have reviewed my patches.
Ciao,
Alessio
On Tue, 2016-03-01 at 15:55 +0100, Alessio Igor Bogani wrote:
> Scott,
>
> On 29 February 2016 at 23:38, Scott Wood <[email protected]> wrote:
> [...]
> >
> > > +&pci0 {
> > > + compatible = "fsl,mpc8641-pcie";
> > > + device_type = "pci";
> > > + #size-cells = <2>;
> > > + #address-cells = <3>;
> > > + bus-range = <0x0 0xff>;
> > > + clock-frequency = <33333333>;
> >
> > The clock frequency of PCI Express is not 33 MHz.
>
> A lot of dtsi files into fsl directory have got that value!
Well, they shouldn't. :-P
This isn't the first time I've told someone to take that out.
-Scott