This series contains dt-bindings updates and device trees for Apple
silicon devices based on the M2 SoC (t8112).
Device tree validation depends ont the dart-t8110 bindings queued in
the iommu tree for 6.3 [1] and support for "local-mac-address" for
brcm,bcm4329-fmac based devices [2]. The latter fixes validation errors
for the existing M1 and M1 Pro/Max/Ultra device trees.
The device trees are tested with the downstream Asahi Linux kernel and
on top of v6.2-rc5. The hardware is of limited use with the upstream
kernel. The notebooks miss keyboard/trackpad drivers and usb support.
The Mac mini does not yet have a boot framebuffer and lacks usb support
as well.
The PMU (performance monitor) driver needs a small update which I'll
send out separately. All other driver changes are already queued. The
dt-bindings changes should be merged through asahi-soc to ensure
devicetree validation.
1: https://lore.kernel.org/linux-iommu/[email protected]/
2: https://lore.kernel.org/linux-devicetree/[email protected]/
Signed-off-by: Janne Grunau <[email protected]>
---
Hector Martin (2):
dt-bindings: power: apple,pmgr-pwrstate: Add t8112 compatible
arm64: dts: apple: t8112: Initial t8112 (M2) device trees
Janne Grunau (15):
dt-bindings: arm: apple: apple,pmgr: Add t8112-pmgr compatible
dt-bindings: watchdog: apple,wdt: Add t8112-wdt compatible
dt-bindings: arm: cpus: Add apple,avalanche & blizzard compatibles
dt-bindings: interrupt-controller: apple,aic2: Add apple,t8112-aic compatible
dt-bindings: arm-pmu: Add PMU compatible strings for Apple M2 cores
dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible string
dt-bindings: mailbox: apple,mailbox: Add t8112 compatibles
dt-bindings: nvme: apple: Add apple,t8112-nvme-ans2 compatible string
dt-bindings: pci: apple,pcie: Add t8112 support
dt-bindings: pinctrl: apple,pinctrl: Add apple,t8112-pinctrl compatible
dt-bindings: i2c: apple,i2c: Add apple,t8112-i2c compatible
dt-bindings: clock: apple,nco: Add t8112-nco compatible
dt-bindings: sound: apple,mca: Add t8112-mca compatible
dt-bindings: dma: apple,admac: Add t8112-admac compatible
dt-bindings: arm: apple: Add t8112 j413/j473/j493 compatibles
Documentation/devicetree/bindings/arm/apple.yaml | 15 +
.../devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 +
Documentation/devicetree/bindings/arm/cpus.yaml | 2 +
Documentation/devicetree/bindings/arm/pmu.yaml | 2 +
.../devicetree/bindings/clock/apple,nco.yaml | 1 +
.../devicetree/bindings/dma/apple,admac.yaml | 1 +
.../devicetree/bindings/i2c/apple,i2c.yaml | 1 +
.../bindings/interrupt-controller/apple,aic2.yaml | 23 +-
.../devicetree/bindings/iommu/apple,sart.yaml | 11 +-
.../devicetree/bindings/mailbox/apple,mailbox.yaml | 2 +
.../devicetree/bindings/nvme/apple,nvme-ans.yaml | 5 +-
.../devicetree/bindings/pci/apple,pcie.yaml | 1 +
.../devicetree/bindings/pinctrl/apple,pinctrl.yaml | 1 +
.../bindings/power/apple,pmgr-pwrstate.yaml | 1 +
.../devicetree/bindings/sound/apple,mca.yaml | 1 +
.../devicetree/bindings/watchdog/apple,wdt.yaml | 1 +
arch/arm64/boot/dts/apple/Makefile | 3 +
arch/arm64/boot/dts/apple/t8112-j413.dts | 71 ++
arch/arm64/boot/dts/apple/t8112-j473.dts | 60 +
arch/arm64/boot/dts/apple/t8112-j493.dts | 60 +
arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 81 ++
arch/arm64/boot/dts/apple/t8112-pmgr.dtsi | 1141 ++++++++++++++++++++
arch/arm64/boot/dts/apple/t8112.dtsi | 904 ++++++++++++++++
23 files changed, 2382 insertions(+), 7 deletions(-)
---
base-commit: 1b929c02afd37871d5afb9d498426f83432e71c2
change-id: 20230202-asahi-t8112-dt-6fc880c8cd73
Best regards,
--
Janne Grunau <[email protected]>
The block on Apple M2 SoCs is compatible with the existing driver so
just add its per-SoC compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
index 0dc957a56d35..673277a7a224 100644
--- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
+++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
@@ -23,6 +23,7 @@ properties:
items:
- enum:
- apple,t8103-pmgr
+ - apple,t8112-pmgr
- apple,t6000-pmgr
- const: apple,pmgr
- const: syscon
--
2.39.1
The block on the Apple M2 SoC is compatible with the existing driver so
add its per-SoC compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/watchdog/apple,wdt.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml
index e58c56a6fdf6..3d7e2a2bf1f1 100644
--- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml
@@ -17,6 +17,7 @@ properties:
items:
- enum:
- apple,t8103-wdt
+ - apple,t8112-wdt
- apple,t6000-wdt
- const: apple,wdt
--
2.39.1
These are the CPU cores in the Apple silicon M2 SoC.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
index 01b5a9c689a2..ac79fbb1479d 100644
--- a/Documentation/devicetree/bindings/arm/cpus.yaml
+++ b/Documentation/devicetree/bindings/arm/cpus.yaml
@@ -85,6 +85,8 @@ properties:
compatible:
enum:
+ - apple,avalanche
+ - apple,blizzard
- apple,icestorm
- apple,firestorm
- arm,arm710t
--
2.39.1
The Apple M2 SoC uses AICv2 and is compatible with the existing driver.
Add its per-SoC compatible.
Since multi-die versions of the M2 are not expected decrease
'#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled
inside the driver.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
.../bindings/interrupt-controller/apple,aic2.yaml | 23 +++++++++++++++++++---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
index 06948c0e36a5..120e23ff668c 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
@@ -31,19 +31,22 @@ description: |
properties:
compatible:
items:
- - const: apple,t6000-aic
+ - enum:
+ - apple,t8112-aic
+ - apple,t6000-aic
- const: apple,aic2
interrupt-controller: true
'#interrupt-cells':
- const: 4
+ minimum: 3
+ maximum: 4
description: |
The 1st cell contains the interrupt type:
- 0: Hardware IRQ
- 1: FIQ
- The 2nd cell contains the die ID.
+ The 2nd cell contains the die ID (optional).
The next cell contains the interrupt number.
- HW IRQs: interrupt number
@@ -98,6 +101,20 @@ properties:
- apple,fiq-index
- cpus
+if:
+ properties:
+ compatible:
+ contains:
+ const: apple,t8112-aic
+then:
+ properties:
+ '#interrupt-cells':
+ maximum: 3
+else:
+ properties:
+ '#interrupt-cells':
+ minimum: 4
+
required:
- compatible
- '#interrupt-cells'
--
2.39.1
The PMUs on the avalanche and blizzard CPU two micro-architectures are
mostly compatible with M1 ones. They miss support for a single counter
according to Apple's PMU counter list.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
The necessary driver update will be sent separately.
---
Documentation/devicetree/bindings/arm/pmu.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml
index dbb6f3dc5ae5..e14358bf0b9c 100644
--- a/Documentation/devicetree/bindings/arm/pmu.yaml
+++ b/Documentation/devicetree/bindings/arm/pmu.yaml
@@ -20,6 +20,8 @@ properties:
items:
- enum:
- apm,potenza-pmu
+ - apple,avalanche-pmu
+ - apple,blizzard-pmu
- apple,firestorm-pmu
- apple,icestorm-pmu
- arm,armv8-pmuv3 # Only for s/w models
--
2.39.1
"apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as
well. To allow for later discovered incompatibilities use
'"apple,t8112-sart", "apple,t6000-sart"' as compatible string.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/iommu/apple,sart.yaml | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml
index 1524fa3094ef..07d2d68a87df 100644
--- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml
+++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml
@@ -28,9 +28,14 @@ description:
properties:
compatible:
- enum:
- - apple,t6000-sart
- - apple,t8103-sart
+ oneOf:
+ - items:
+ - const: apple,t8112-sart
+ - const: apple,t6000-sart
+ - items:
+ enum:
+ - apple,t6000-sart
+ - apple,t8103-sart
reg:
maxItems: 1
--
2.39.1
The mailbox hardware remains unchanged on M2 SoCs so just add its
per-SoC compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml
index 5c5c328b3134..4c0668e5f0bd 100644
--- a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml
@@ -29,6 +29,7 @@ properties:
items:
- enum:
- apple,t8103-asc-mailbox
+ - apple,t8112-asc-mailbox
- apple,t6000-asc-mailbox
- const: apple,asc-mailbox-v4
@@ -39,6 +40,7 @@ properties:
items:
- enum:
- apple,t8103-m3-mailbox
+ - apple,t8112-m3-mailbox
- apple,t6000-m3-mailbox
- const: apple,m3-mailbox-v2
--
2.39.1
"apple,t8112-nvme-ans2" as found on Apple M2 SoCs is compatible with the
existing driver. Add its SoC specific compatible string to allow special
handling if it'll be necessary.
t8112 uses only 2 power-domains as no 4 and 8 TB configurations are
offered.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
index 34dd1cc67124..fc6555724e18 100644
--- a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
+++ b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
@@ -14,6 +14,7 @@ properties:
items:
- enum:
- apple,t8103-nvme-ans2
+ - apple,t8112-nvme-ans2
- apple,t6000-nvme-ans2
- const: apple,nvme-ans2
@@ -65,7 +66,9 @@ if:
properties:
compatible:
contains:
- const: apple,t8103-nvme-ans2
+ enum:
+ - apple,t8103-nvme-ans2
+ - apple,t8112-nvme-ans2
then:
properties:
power-domains:
--
2.39.1
The block found in the Apple M2 SoC is compatible with the existing
driver, and supports 4 downstream ports like the t6000 one.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/pci/apple,pcie.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
index aa38680aaaca..215ff9a9c835 100644
--- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
@@ -33,6 +33,7 @@ properties:
items:
- enum:
- apple,t8103-pcie
+ - apple,t8112-pcie
- apple,t6000-pcie
- const: apple,pcie
--
2.39.1
This new SoC uses the same pinctrl hardware, so just add a new per-SoC
compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
index d3b11351ca45..684c03a6bd40 100644
--- a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
@@ -19,6 +19,7 @@ properties:
items:
- enum:
- apple,t8103-pinctrl
+ - apple,t8112-pinctrl
- apple,t6000-pinctrl
- const: apple,pinctrl
--
2.39.1
This block on the Apple M2 is compatible with the existing driver so
just add the per-SoC compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/i2c/apple,i2c.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml
index 4ac61fec90e2..3f0e94189f2d 100644
--- a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml
@@ -23,6 +23,7 @@ properties:
items:
- enum:
- apple,t8103-i2c
+ - apple,t8112-i2c
- apple,t6000-i2c
- const: apple,i2c
--
2.39.1
The block found on Apple's M2 SoC is compatible with the existing driver
so add its per-SoC compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/clock/apple,nco.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/apple,nco.yaml b/Documentation/devicetree/bindings/clock/apple,nco.yaml
index 74eab5c0d24a..8b8411dc42f6 100644
--- a/Documentation/devicetree/bindings/clock/apple,nco.yaml
+++ b/Documentation/devicetree/bindings/clock/apple,nco.yaml
@@ -23,6 +23,7 @@ properties:
- enum:
- apple,t6000-nco
- apple,t8103-nco
+ - apple,t8112-nco
- const: apple,nco
clocks:
--
2.39.1
The block found on Apple's M2 SoC is compatible with the existing driver
so add its per-SoC compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/sound/apple,mca.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/sound/apple,mca.yaml b/Documentation/devicetree/bindings/sound/apple,mca.yaml
index 40e3a202f443..5c6ec08c7d24 100644
--- a/Documentation/devicetree/bindings/sound/apple,mca.yaml
+++ b/Documentation/devicetree/bindings/sound/apple,mca.yaml
@@ -23,6 +23,7 @@ properties:
- enum:
- apple,t6000-mca
- apple,t8103-mca
+ - apple,t8112-mca
- const: apple,mca
reg:
--
2.39.1
The block found on Apple's M2 SoC is compatible with the existing driver
so add its per-SoC compatible.
Signed-off-by: Janne Grunau <[email protected]>
---
This trivial dt-bindings update should be merged through the asahi-soc
tree to ensure validation of the Apple M2 (t8112) devicetrees in this
series.
---
Documentation/devicetree/bindings/dma/apple,admac.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml
index 97282469e4af..beb09f115f40 100644
--- a/Documentation/devicetree/bindings/dma/apple,admac.yaml
+++ b/Documentation/devicetree/bindings/dma/apple,admac.yaml
@@ -26,6 +26,7 @@ properties:
- enum:
- apple,t6000-admac
- apple,t8103-admac
+ - apple,t8112-admac
- const: apple,admac
reg:
--
2.39.1
This adds the following apple,t8112 platforms:
- apple,j413 - MacBook Air (M2, 2022)
- apple,j473 - Mac mini (M2, 2023)
- apple,j493 - MacBook Pro (13-inch, M2, 2022)
Signed-off-by: Janne Grunau <[email protected]>
---
Documentation/devicetree/bindings/arm/apple.yaml | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml
index da78c69774f2..883fd67e3752 100644
--- a/Documentation/devicetree/bindings/arm/apple.yaml
+++ b/Documentation/devicetree/bindings/arm/apple.yaml
@@ -19,6 +19,12 @@ description: |
- MacBook Air (M1, 2020)
- iMac (24-inch, M1, 2021)
+ Devices based on the "M2" SoC:
+
+ - MacBook Air (M2, 2022)
+ - MacBook Pro (13-inch, M2, 2022)
+ - Mac mini (M2, 2023)
+
And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:
- MacBook Pro (14-inch, M1 Pro, 2021)
@@ -70,6 +76,15 @@ properties:
- const: apple,t8103
- const: apple,arm-platform
+ - description: Apple M2 SoC based platforms
+ items:
+ - enum:
+ - apple,j413 # MacBook Air (M2, 2022)
+ - apple,j473 # Mac mini (M2, 2023)
+ - apple,j493 # MacBook Pro (13-inch, M2, 2022)
+ - const: apple,t8112
+ - const: apple,arm-platform
+
- description: Apple M1 Pro SoC based platforms
items:
- enum:
--
2.39.1
From: Hector Martin <[email protected]>
This adds device trees for the following devices:
- Macbook Air (M2, 2022)
- Macbook Pro 13" (M2, 2022)
- Mac mini (M2, 2023)
Signed-off-by: Hector Martin <[email protected]>
Co-developed-by: Janne Grunau <[email protected]>
Signed-off-by: Janne Grunau <[email protected]>
---
arch/arm64/boot/dts/apple/Makefile | 3 +
arch/arm64/boot/dts/apple/t8112-j413.dts | 71 ++
arch/arm64/boot/dts/apple/t8112-j473.dts | 60 ++
arch/arm64/boot/dts/apple/t8112-j493.dts | 60 ++
arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 81 ++
arch/arm64/boot/dts/apple/t8112-pmgr.dtsi | 1141 +++++++++++++++++++++++++++++
arch/arm64/boot/dts/apple/t8112.dtsi | 904 +++++++++++++++++++++++
7 files changed, 2320 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile
index 5a7506ff5ea3..aec5e29cdfb7 100644
--- a/arch/arm64/boot/dts/apple/Makefile
+++ b/arch/arm64/boot/dts/apple/Makefile
@@ -10,3 +10,6 @@ dtb-$(CONFIG_ARCH_APPLE) += t6000-j316s.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6001-j316c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6001-j375c.dtb
dtb-$(CONFIG_ARCH_APPLE) += t6002-j375d.dtb
+dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb
+dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb
+dtb-$(CONFIG_ARCH_APPLE) += t8112-j493.dtb
diff --git a/arch/arm64/boot/dts/apple/t8112-j413.dts b/arch/arm64/boot/dts/apple/t8112-j413.dts
new file mode 100644
index 000000000000..0e5b5add92cf
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8112-j413.dts
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple MacBook Air (M2, 2022)
+ *
+ * target-type: J413
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8112.dtsi"
+#include "t8112-jxxx.dtsi"
+
+/ {
+ compatible = "apple,j413", "apple,t8112", "apple,arm-platform";
+ model = "Apple MacBook Air (13-inch, M2, 2022)";
+
+ aliases {
+ bluetooth0 = &bluetooth0;
+ wifi0 = &wifi0;
+ };
+};
+
+/*
+ * Force the bus number assignments so that we can declare some of the
+ * on-board devices and properties that are populated by the bootloader
+ * (such as MAC addresses).
+ */
+&port00 {
+ bus-range = <1 1>;
+ wifi0: wifi@0,0 {
+ compatible = "pci14e4,4433";
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ /* To be filled by the loader */
+ local-mac-address = [00 10 18 00 00 10];
+ apple,antenna-sku = "XX";
+ brcm,board-type = "apple,hokkaido";
+ };
+
+ bluetooth0: bluetooth@0,1 {
+ compatible = "pci14e4,5f71";
+ reg = <0x10100 0x0 0x0 0x0 0x0>;
+ /* To be filled by the loader */
+ local-bd-address = [00 00 00 00 00 00];
+ brcm,board-type = "apple,hokkaido";
+ };
+};
+
+/*
+ * Remove unused PCIe ports
+ */
+
+/delete-node/ &port01;
+/delete-node/ &port02;
+/delete-node/ &port03;
+
+&i2c0 {
+ /* MagSafe port */
+ hpm5: usb-pd@3a {
+ compatible = "apple,cd321x";
+ reg = <0x3a>;
+ interrupt-parent = <&pinctrl_ap>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";
+ };
+};
+
+&i2c4 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/apple/t8112-j473.dts b/arch/arm64/boot/dts/apple/t8112-j473.dts
new file mode 100644
index 000000000000..55950d0a73c5
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8112-j473.dts
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple Mac mini (M2, 2023)
+ *
+ * target-type: J473
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8112.dtsi"
+#include "t8112-jxxx.dtsi"
+
+/ {
+ compatible = "apple,j473", "apple,t8112", "apple,arm-platform";
+ model = "Apple Mac mini (M2, 2023)";
+
+ aliases {
+ bluetooth0 = &bluetooth0;
+ ethernet0 = ðernet0;
+ wifi0 = &wifi0;
+ };
+};
+
+/*
+ * Force the bus number assignments so that we can declare some of the
+ * on-board devices and properties that are populated by the bootloader
+ * (such as MAC addresses).
+ */
+&port00 {
+ bus-range = <1 1>;
+};
+
+&port01 {
+ bus-range = <2 2>;
+};
+
+&port02 {
+ bus-range = <3 3>;
+ ethernet0: ethernet@0,0 {
+ reg = <0x30000 0x0 0x0 0x0 0x0>;
+ /* To be filled by the loader */
+ local-mac-address = [00 10 18 00 00 00];
+ };
+};
+
+&pcie1_dart {
+ status = "okay";
+};
+
+&pcie2_dart {
+ status = "okay";
+};
+
+/*
+ * Remove unused PCIe port
+ */
+
+/delete-node/ &port03;
diff --git a/arch/arm64/boot/dts/apple/t8112-j493.dts b/arch/arm64/boot/dts/apple/t8112-j493.dts
new file mode 100644
index 000000000000..bfd81f413764
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8112-j493.dts
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple MacBook Pro (13-inch, M1, 2022)
+ *
+ * target-type: J493
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8112.dtsi"
+#include "t8112-jxxx.dtsi"
+
+/ {
+ compatible = "apple,j493", "apple,t8112", "apple,arm-platform";
+ model = "Apple MacBook Pro (13-inch, M2, 2022)";
+
+ aliases {
+ bluetooth0 = &bluetooth0;
+ wifi0 = &wifi0;
+ };
+};
+
+/*
+ * Force the bus number assignments so that we can declare some of the
+ * on-board devices and properties that are populated by the bootloader
+ * (such as MAC addresses).
+ */
+&port00 {
+ bus-range = <1 1>;
+ wifi0: wifi@0,0 {
+ compatible = "pci14e4,4425";
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ /* To be filled by the loader */
+ local-mac-address = [00 00 00 00 00 00];
+ apple,antenna-sku = "XX";
+ brcm,board-type = "apple,kyushu";
+ };
+
+ bluetooth0: bluetooth@0,1 {
+ compatible = "pci14e4,5f69";
+ reg = <0x10100 0x0 0x0 0x0 0x0>;
+ /* To be filled by the loader */
+ local-bd-address = [00 00 00 00 00 00];
+ brcm,board-type = "apple,kyushu";
+ };
+};
+
+/*
+ * Remove unused PCIe ports
+ */
+
+/delete-node/ &port01;
+/delete-node/ &port02;
+/delete-node/ &port03;
+
+&i2c4 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi
new file mode 100644
index 000000000000..f5edf61113e7
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi
@@ -0,0 +1,81 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple M2 MacBook Air/Pro (M2, 2022)
+ *
+ * This file contains parts common to all Apple M2 devices using the t8112.
+ *
+ * target-type: J493, J413
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/ {
+ aliases {
+ serial0 = &serial0;
+ serial2 = &serial2;
+ };
+
+ chosen {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ stdout-path = "serial0";
+
+ framebuffer0: framebuffer@0 {
+ compatible = "apple,simple-framebuffer", "simple-framebuffer";
+ reg = <0 0 0 0>; /* To be filled by loader */
+ /* Format properties will be added by loader */
+ status = "disabled";
+ };
+ };
+
+ memory@800000000 {
+ device_type = "memory";
+ reg = <0x8 0 0x2 0>; /* To be filled by loader */
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ hpm0: usb-pd@38 {
+ compatible = "apple,cd321x";
+ reg = <0x38>;
+ interrupt-parent = <&pinctrl_ap>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";
+ };
+
+ hpm1: usb-pd@3f {
+ compatible = "apple,cd321x";
+ reg = <0x3f>;
+ interrupt-parent = <&pinctrl_ap>;
+ interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";
+ };
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&nco_clkref {
+ clock-frequency = <900000000>;
+};
diff --git a/arch/arm64/boot/dts/apple/t8112-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8112-pmgr.dtsi
new file mode 100644
index 000000000000..0f2d810921c8
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8112-pmgr.dtsi
@@ -0,0 +1,1141 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * PMGR Power domains for the Apple T8112 "M2" SoC
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+
+&pmgr {
+ ps_sbr: power-controller@100 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x100 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sbr";
+ apple,always-on; /* Core device */
+ };
+
+ ps_aic: power-controller@108 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x108 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "aic";
+ apple,always-on; /* Core device */
+ };
+
+ ps_dwi: power-controller@110 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x110 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dwi";
+ apple,always-on; /* Core device */
+ };
+
+ ps_soc_spmi0: power-controller@118 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x118 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "soc_spmi0";
+ };
+
+ ps_gpio: power-controller@120 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x120 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "gpio";
+ };
+
+ ps_pms_busif: power-controller@128 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x128 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_busif";
+ apple,always-on; /* Core device */
+ };
+
+ ps_pms: power-controller@130 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x130 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms";
+ apple,always-on; /* Core device */
+ };
+
+ ps_pms_c1ppt: power-controller@160 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x160 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_c1ppt";
+ power-domains = <&ps_pms>;
+ };
+
+ ps_soc_dpe: power-controller@168 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x168 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "soc_dpe";
+ apple,always-on; /* Core device */
+ };
+
+ ps_pmgr_soc_ocla: power-controller@170 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x170 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pmgr_soc_ocla";
+ power-domains = <&ps_pms>;
+ };
+
+ ps_ispsens0: power-controller@178 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x178 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens0";
+ };
+
+ ps_ispsens1: power-controller@180 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x180 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens1";
+ };
+
+ ps_ispsens2: power-controller@188 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x188 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens2";
+ };
+
+ ps_ispsens3: power-controller@190 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x190 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens3";
+ };
+
+ ps_pcie_ref: power-controller@198 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x198 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pcie_ref";
+ };
+
+ ps_aft0: power-controller@1a0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1a0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "aft0";
+ };
+
+ ps_imx: power-controller@1a8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1a8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "imx";
+ apple,always-on; /* Apple fabric, critical block */
+ };
+
+ ps_sio_busif: power-controller@1b0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1b0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio_busif";
+ };
+
+ ps_sio: power-controller@1b8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1b8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio";
+ apple,always-on;
+ power-domains = <&ps_sio_busif>;
+ };
+
+ ps_sio_cpu: power-controller@1c0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1c0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio_cpu";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_fpwm0: power-controller@1c8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1c8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "fpwm0";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_fpwm1: power-controller@1d0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1d0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "fpwm1";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_fpwm2: power-controller@1d8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1d8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "fpwm2";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c0: power-controller@1e0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1e0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c0";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c1: power-controller@1e8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1e8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c1";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c2: power-controller@1f0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1f0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c2";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c3: power-controller@1f8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1f8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c3";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c4: power-controller@200 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x200 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c4";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_spi_p: power-controller@208 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x208 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi_p";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_uart_p: power-controller@210 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x210 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart_p";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_audio_p: power-controller@218 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x218 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "audio_p";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_aes: power-controller@220 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x220 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "aes";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_spi0: power-controller@228 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x228 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi0";
+ power-domains = <&ps_spi_p>;
+ };
+
+ ps_spi1: power-controller@230 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x230 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi1";
+ power-domains = <&ps_spi_p>;
+ };
+
+ ps_spi2: power-controller@238 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x238 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi2";
+ power-domains = <&ps_spi_p>;
+ };
+
+ ps_spi3: power-controller@240 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x240 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi3";
+ power-domains = <&ps_spi_p>;
+ };
+
+ ps_spi4: power-controller@248 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x248 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi4";
+ power-domains = <&ps_spi_p>;
+ };
+
+ ps_spi5: power-controller@250 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x250 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi5";
+ power-domains = <&ps_spi_p>;
+ };
+
+ ps_uart_n: power-controller@258 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x258 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart_n";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart0: power-controller@260 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x260 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart0";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart1: power-controller@268 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x268 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart1";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart2: power-controller@270 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x270 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart2";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart3: power-controller@278 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x278 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart3";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart4: power-controller@280 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x280 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart4";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart5: power-controller@288 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x288 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart5";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart6: power-controller@290 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x290 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart6";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart7: power-controller@298 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x298 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart7";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart8: power-controller@2a0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2a0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart8";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_sio_adma: power-controller@2a8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2a8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio_adma";
+ power-domains = <&ps_spi_p>, <&ps_audio_p>;
+ };
+
+ ps_dpa0: power-controller@2b0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2b0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dpa0";
+ power-domains = <&ps_audio_p>;
+ };
+
+ ps_dpa1: power-controller@2b8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2b8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dpa1";
+ power-domains = <&ps_audio_p>;
+ };
+
+ ps_mca0: power-controller@2c0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2c0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca0";
+ power-domains = <&ps_sio_adma>, <&ps_audio_p>;
+ };
+
+ ps_mca1: power-controller@2c8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2c8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca1";
+ power-domains = <&ps_sio_adma>, <&ps_audio_p>;
+ };
+
+ ps_mca2: power-controller@2d0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2d0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca2";
+ power-domains = <&ps_sio_adma>, <&ps_audio_p>;
+ };
+
+ ps_mca3: power-controller@2d8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2d8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca3";
+ power-domains = <&ps_sio_adma>, <&ps_audio_p>;
+ };
+
+ ps_mca4: power-controller@2e0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2e0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca4";
+ power-domains = <&ps_sio_adma>, <&ps_audio_p>;
+ };
+
+ ps_mca5: power-controller@2e8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2e8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca5";
+ power-domains = <&ps_sio_adma>, <&ps_audio_p>;
+ };
+
+ ps_mcc: power-controller@2f0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2f0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mcc";
+ apple,always-on; /* Memory controller */
+ };
+
+ ps_dcs0: power-controller@2f8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2f8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs0";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs2: power-controller@300 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x300 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs2";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs1: power-controller@308 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x308 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs1";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs3: power-controller@310 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x310 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs3";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs4: power-controller@318 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x318 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs4";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs5: power-controller@320 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x320 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs5";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs6: power-controller@328 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x328 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs6";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs7: power-controller@330 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x330 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs7";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_smx0: power-controller@338 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x338 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "smx0";
+ apple,always-on; /* Apple fabric, critical block */
+ };
+
+ ps_smx1: power-controller@340 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x340 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "smx1";
+ apple,always-on; /* Apple fabric, critical block */
+ };
+
+ ps_apcie: power-controller@348 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x348 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "apcie";
+ power-domains = <&ps_imx>, <&ps_pcie_ref>;
+ };
+
+ ps_rmx0: power-controller@350 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x350 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "rmx0";
+ /* Apple Fabric, display/image stuff: this can power down */
+ };
+
+ ps_rmx1: power-controller@358 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x358 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "rmx1";
+ /* Apple Fabric, display/image stuff: this can power down */
+ };
+
+ ps_cmx: power-controller@360 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x360 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "cmx";
+ apple,always-on; /* Apple fabric, critical block */
+ };
+
+ ps_mmx: power-controller@368 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x368 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mmx";
+ /* Apple Fabric, media stuff: this can power down */
+ };
+
+ ps_disp0_sys: power-controller@370 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x370 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "disp0_sys";
+ power-domains = <&ps_rmx1>;
+ apple,always-on; /* TODO: figure out if we can enable PM here */
+ };
+
+ ps_disp0_fe: power-controller@378 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x378 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "disp0_fe";
+ power-domains = <&ps_disp0_sys>;
+ apple,always-on; /* TODO: figure out if we can enable PM here */
+ };
+
+ ps_dispext_sys: power-controller@380 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x380 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispext_sys";
+ power-domains = <&ps_rmx0>;
+ };
+
+ ps_dispext_fe: power-controller@388 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x388 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispext_fe";
+ power-domains = <&ps_dispext_sys>;
+ };
+
+ ps_dispext_cpu0: power-controller@3c8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3c8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispext_cpu0";
+ power-domains = <&ps_dispext_fe>;
+ apple,min-state = <4>;
+ };
+
+ ps_dptx_ext_phy: power-controller@3d8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3d8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dptx_ext_phy";
+ };
+
+ ps_dispdfr_fe: power-controller@3e0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3e0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispdfr_fe";
+ power-domains = <&ps_rmx0>;
+ };
+
+ ps_dispdfr_be: power-controller@3e8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3e8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispdfr_be";
+ power-domains = <&ps_dispdfr_fe>;
+ };
+
+ ps_mipi_dsi: power-controller@3f0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3f0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mipi_dsi";
+ power-domains = <&ps_dispdfr_be>;
+ };
+
+ ps_jpg: power-controller@3f8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3f8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "jpg";
+ power-domains = <&ps_cmx>;
+ };
+
+ ps_apcie_gp: power-controller@400 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x400 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "apcie_gp";
+ power-domains = <&ps_apcie>;
+ apple,always-on; /* Breaks things if shut down */
+ };
+
+ ps_msr: power-controller@408 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x408 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "msr";
+ power-domains = <&ps_imx>;
+ };
+
+ ps_pmp: power-controller@410 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x410 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pmp";
+ apple,always-on;
+ };
+
+ ps_pms_sram: power-controller@418 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x418 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_sram";
+ apple,always-on;
+ };
+
+ ps_msr_ase_core: power-controller@420 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x420 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "msr_ase_core";
+ power-domains = <&ps_msr>;
+ };
+
+ ps_ans: power-controller@428 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x428 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ans";
+ power-domains = <&ps_imx>;
+ };
+
+ ps_gfx: power-controller@430 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x430 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "gfx";
+ };
+
+ ps_isp_sys: power-controller@438 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x438 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "isp_sys";
+ power-domains = <&ps_rmx1>;
+ };
+
+ ps_venc_sys: power-controller@440 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x440 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_sys";
+ power-domains = <&ps_rmx1>;
+ };
+
+ ps_avd_sys: power-controller@448 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x448 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "avd_sys";
+ power-domains = <&ps_mmx>;
+ };
+
+ ps_apcie_st: power-controller@450 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x450 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "apcie_st";
+ power-domains = <&ps_apcie>, <&ps_ans>;
+ };
+
+ ps_atc0_common: power-controller@458 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x458 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_common";
+ power-domains = <&ps_imx>;
+ };
+
+ ps_atc0_pcie: power-controller@460 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x460 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_pcie";
+ power-domains = <&ps_atc0_common>;
+ };
+
+ ps_atc0_cio: power-controller@468 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x468 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_cio";
+ power-domains = <&ps_atc0_common>;
+ };
+
+ ps_atc0_cio_pcie: power-controller@470 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x470 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_cio_pcie";
+ power-domains = <&ps_atc0_cio>;
+ };
+
+ ps_atc0_cio_usb: power-controller@478 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x478 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_cio_usb";
+ power-domains = <&ps_atc0_cio>;
+ };
+
+ ps_atc1_common: power-controller@480 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x480 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_common";
+ power-domains = <&ps_rmx0>;
+ };
+
+ ps_atc1_pcie: power-controller@488 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x488 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_pcie";
+ power-domains = <&ps_atc1_common>;
+ };
+
+ ps_atc1_cio: power-controller@490 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x490 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_cio";
+ power-domains = <&ps_atc1_common>;
+ };
+
+ ps_atc1_cio_pcie: power-controller@498 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x498 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_cio_pcie";
+ power-domains = <&ps_atc1_cio>;
+ };
+
+ ps_atc1_cio_usb: power-controller@4a0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x4a0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_cio_usb";
+ power-domains = <&ps_atc1_cio>;
+ };
+
+ ps_ane_sys: power-controller@4a8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x4a8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ane_sys";
+ power-domains = <&ps_mmx>;
+ };
+
+ ps_scodec: power-controller@4b0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x4b0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "scodec";
+ power-domains = <&ps_rmx0>;
+ };
+
+ ps_sep: power-controller@c00 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xc00 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sep";
+ apple,always-on;
+ };
+
+ ps_venc_dma: power-controller@8000 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8000 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_dma";
+ power-domains = <&ps_venc_sys>;
+ };
+
+ ps_venc_pipe4: power-controller@8008 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8008 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_pipe4";
+ power-domains = <&ps_venc_dma>;
+ };
+
+ ps_venc_pipe5: power-controller@8010 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8010 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_pipe5";
+ power-domains = <&ps_venc_dma>;
+ };
+
+ ps_venc_me0: power-controller@8018 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8018 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_me0";
+ power-domains = <&ps_venc_pipe5>, <&ps_venc_pipe4>;
+ };
+
+ ps_venc_me1: power-controller@8020 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8020 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_me1";
+ power-domains = <&ps_venc_pipe5>, <&ps_venc_pipe4>;
+ };
+
+ ps_disp0_cpu0: power-controller@10000 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x10000 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "disp0_cpu0";
+ power-domains = <&ps_disp0_fe>;
+ apple,min-state = <4>;
+ };
+};
+
+&pmgr_mini {
+
+ ps_debug_gated: power-controller@58 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x58 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "debug_gated";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_spmi0: power-controller@60 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x60 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_spmi0";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_spmi1: power-controller@68 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x68 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_spmi1";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_aon: power-controller@70 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x70 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_aon";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_msg: power-controller@78 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x78 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "msg";
+ };
+
+ ps_nub_gpio: power-controller@80 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x80 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_gpio";
+ apple,always-on;
+ };
+
+ ps_atc0_usb_aon: power-controller@88 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x88 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_usb_aon";
+ apple,always-on; /* Needs to stay on for dwc3 to work */
+ };
+
+ ps_atc1_usb_aon: power-controller@90 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x90 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_usb_aon";
+ apple,always-on; /* Needs to stay on for dwc3 to work */
+ };
+
+ ps_atc0_usb: power-controller@98 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x98 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_usb";
+ power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;
+ };
+
+ ps_atc1_usb: power-controller@a0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xa0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_usb";
+ power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;
+ };
+
+ ps_nub_fabric: power-controller@a8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xa8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_fabric";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_sram: power-controller@b0 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xb0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_sram";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_debug_switch: power-controller@b8 {
+ compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xb8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "debug_switch";
+ apple,always-on; /* Core AON device */
+ };
+};
+
diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi
new file mode 100644
index 000000000000..974443913f6a
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t8112.dtsi
@@ -0,0 +1,904 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple T8112 "M2" SoC
+ *
+ * Other names: H14G
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/apple-aic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/apple.h>
+#include <dt-bindings/spmi/spmi.h>
+
+/ {
+ compatible = "apple,t8112", "apple,arm-platform";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu_e0>;
+ };
+ core1 {
+ cpu = <&cpu_e1>;
+ };
+ core2 {
+ cpu = <&cpu_e2>;
+ };
+ core3 {
+ cpu = <&cpu_e3>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu_p0>;
+ };
+ core1 {
+ cpu = <&cpu_p1>;
+ };
+ core2 {
+ cpu = <&cpu_p2>;
+ };
+ core3 {
+ cpu = <&cpu_p3>;
+ };
+ };
+ };
+
+ cpu_e0: cpu@0 {
+ compatible = "apple,blizzard";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&ecluster_opp>;
+ capacity-dmips-mhz = <756>;
+ performance-domains = <&cpufreq_e>;
+ next-level-cache = <&l2_cache_0>;
+ i-cache-size = <0x20000>;
+ d-cache-size = <0x10000>;
+ };
+
+ cpu_e1: cpu@1 {
+ compatible = "apple,blizzard";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&ecluster_opp>;
+ capacity-dmips-mhz = <756>;
+ performance-domains = <&cpufreq_e>;
+ next-level-cache = <&l2_cache_0>;
+ i-cache-size = <0x20000>;
+ d-cache-size = <0x10000>;
+ };
+
+ cpu_e2: cpu@2 {
+ compatible = "apple,blizzard";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&ecluster_opp>;
+ capacity-dmips-mhz = <756>;
+ performance-domains = <&cpufreq_e>;
+ next-level-cache = <&l2_cache_0>;
+ i-cache-size = <0x20000>;
+ d-cache-size = <0x10000>;
+ };
+
+ cpu_e3: cpu@3 {
+ compatible = "apple,blizzard";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&ecluster_opp>;
+ capacity-dmips-mhz = <756>;
+ performance-domains = <&cpufreq_e>;
+ next-level-cache = <&l2_cache_0>;
+ i-cache-size = <0x20000>;
+ d-cache-size = <0x10000>;
+ };
+
+ cpu_p0: cpu@10100 {
+ compatible = "apple,avalanche";
+ device_type = "cpu";
+ reg = <0x0 0x10100>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&pcluster_opp>;
+ capacity-dmips-mhz = <1024>;
+ performance-domains = <&cpufreq_p>;
+ next-level-cache = <&l2_cache_1>;
+ i-cache-size = <0x30000>;
+ d-cache-size = <0x20000>;
+ };
+
+ cpu_p1: cpu@10101 {
+ compatible = "apple,avalanche";
+ device_type = "cpu";
+ reg = <0x0 0x10101>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&pcluster_opp>;
+ capacity-dmips-mhz = <1024>;
+ performance-domains = <&cpufreq_p>;
+ next-level-cache = <&l2_cache_1>;
+ i-cache-size = <0x30000>;
+ d-cache-size = <0x20000>;
+ };
+
+ cpu_p2: cpu@10102 {
+ compatible = "apple,avalanche";
+ device_type = "cpu";
+ reg = <0x0 0x10102>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&pcluster_opp>;
+ capacity-dmips-mhz = <1024>;
+ performance-domains = <&cpufreq_p>;
+ next-level-cache = <&l2_cache_1>;
+ i-cache-size = <0x30000>;
+ d-cache-size = <0x20000>;
+ };
+
+ cpu_p3: cpu@10103 {
+ compatible = "apple,avalanche";
+ device_type = "cpu";
+ reg = <0x0 0x10103>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&pcluster_opp>;
+ capacity-dmips-mhz = <1024>;
+ performance-domains = <&cpufreq_p>;
+ next-level-cache = <&l2_cache_1>;
+ i-cache-size = <0x30000>;
+ d-cache-size = <0x20000>;
+ };
+
+ l2_cache_0: l2-cache-0 {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x400000>;
+ };
+
+ l2_cache_1: l2-cache-1 {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x1000000>;
+ };
+ };
+
+ ecluster_opp: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp01 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-level = <1>;
+ clock-latency-ns = <7500>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-level = <2>;
+ clock-latency-ns = <20000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1284000000>;
+ opp-level = <3>;
+ clock-latency-ns = <22000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1752000000>;
+ opp-level = <4>;
+ clock-latency-ns = <30000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <2004000000>;
+ opp-level = <5>;
+ clock-latency-ns = <35000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <2256000000>;
+ opp-level = <6>;
+ clock-latency-ns = <39000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <2424000000>;
+ opp-level = <7>;
+ clock-latency-ns = <53000>;
+ };
+ };
+
+ pcluster_opp: opp-table-1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp01 {
+ opp-hz = /bits/ 64 <660000000>;
+ opp-level = <1>;
+ clock-latency-ns = <9000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <924000000>;
+ opp-level = <2>;
+ clock-latency-ns = <19000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1188000000>;
+ opp-level = <3>;
+ clock-latency-ns = <22000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1452000000>;
+ opp-level = <4>;
+ clock-latency-ns = <24000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-level = <5>;
+ clock-latency-ns = <26000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1968000000>;
+ opp-level = <6>;
+ clock-latency-ns = <28000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <2208000000>;
+ opp-level = <7>;
+ clock-latency-ns = <30000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <2400000000>;
+ opp-level = <8>;
+ clock-latency-ns = <33000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <2568000000>;
+ opp-level = <9>;
+ clock-latency-ns = <34000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <2724000000>;
+ opp-level = <10>;
+ clock-latency-ns = <36000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <2868000000>;
+ opp-level = <11>;
+ clock-latency-ns = <41000>;
+ };
+ opp12 {
+ opp-hz = /bits/ 64 <2988000000>;
+ opp-level = <12>;
+ clock-latency-ns = <42000>;
+ };
+ opp13 {
+ opp-hz = /bits/ 64 <3096000000>;
+ opp-level = <13>;
+ clock-latency-ns = <44000>;
+ };
+ opp14 {
+ opp-hz = /bits/ 64 <3204000000>;
+ opp-level = <14>;
+ clock-latency-ns = <46000>;
+ };
+ /* Not available until CPU deep sleep is implemented */
+#if 0
+ opp15 {
+ opp-hz = /bits/ 64 <3324000000>;
+ opp-level = <15>;
+ clock-latency-ns = <62000>;
+ turbo-mode;
+ };
+ opp16 {
+ opp-hz = /bits/ 64 <3408000000>;
+ opp-level = <16>;
+ clock-latency-ns = <62000>;
+ turbo-mode;
+ };
+ opp17 {
+ opp-hz = /bits/ 64 <3504000000>;
+ opp-level = <17>;
+ clock-latency-ns = <62000>;
+ turbo-mode;
+ };
+#endif
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&aic>;
+ interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
+ interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu-e {
+ compatible = "apple,blizzard-pmu";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_FIQ AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmu-p {
+ compatible = "apple,avalanche-pmu";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_FIQ AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ clkref: clock-ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "clkref";
+ };
+
+ /*
+ * This is a fabulated representation of the input clock
+ * to NCO since we don't know the true clock tree.
+ */
+ nco_clkref: clock-ref-nco {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "nco_ref";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ranges;
+ nonposted-mmio;
+
+ cpufreq_e: cpufreq@210e20000 {
+ compatible = "apple,t8112-cluster-cpufreq", "apple,cluster-cpufreq";
+ reg = <0x2 0x10e20000 0 0x1000>;
+ #performance-domain-cells = <0>;
+ };
+
+ cpufreq_p: cpufreq@211e20000 {
+ compatible = "apple,t8112-cluster-cpufreq", "apple,cluster-cpufreq";
+ reg = <0x2 0x11e20000 0 0x1000>;
+ #performance-domain-cells = <0>;
+ };
+
+ sio_dart: iommu@235004000 {
+ compatible = "apple,t8110-dart";
+ reg = <0x2 0x35004000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 769 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&ps_sio_cpu>;
+ };
+
+ i2c0: i2c@235010000 {
+ compatible = "apple,t8112-i2c", "apple,i2c";
+ reg = <0x2 0x35010000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 761 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@235014000 {
+ compatible = "apple,t8112-i2c", "apple,i2c";
+ reg = <0x2 0x35014000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 762 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c1>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@235018000 {
+ compatible = "apple,t8112-i2c", "apple,i2c";
+ reg = <0x2 0x35018000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 763 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c2>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@23501c000 {
+ compatible = "apple,t8112-i2c", "apple,i2c";
+ reg = <0x2 0x3501c000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 764 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c3>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@235020000 {
+ compatible = "apple,t8112-i2c", "apple,i2c";
+ reg = <0x2 0x35020000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 765 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c4_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c4>;
+ status = "disabled";
+ };
+
+ serial0: serial@235200000 {
+ compatible = "apple,s5l-uart";
+ reg = <0x2 0x35200000 0x0 0x1000>;
+ reg-io-width = <4>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 739 IRQ_TYPE_LEVEL_HIGH>;
+ /*
+ * TODO: figure out the clocking properly, there may
+ * be a third selectable clock.
+ */
+ clocks = <&clkref>, <&clkref>;
+ clock-names = "uart", "clk_uart_baud0";
+ power-domains = <&ps_uart0>;
+ status = "disabled";
+ };
+
+ serial2: serial@235208000 {
+ compatible = "apple,s5l-uart";
+ reg = <0x2 0x35208000 0x0 0x1000>;
+ reg-io-width = <4>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 741 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkref>, <&clkref>;
+ clock-names = "uart", "clk_uart_baud0";
+ power-domains = <&ps_uart2>;
+ status = "disabled";
+ };
+
+ admac: dma-controller@238200000 {
+ compatible = "apple,t8112-admac", "apple,admac";
+ reg = <0x2 0x38200000 0x0 0x34000>;
+ dma-channels = <24>;
+ interrupts-extended = <0>,
+ <&aic AIC_IRQ 760 IRQ_TYPE_LEVEL_HIGH>,
+ <0>,
+ <0>;
+ #dma-cells = <1>;
+ iommus = <&sio_dart 2>;
+ power-domains = <&ps_sio_adma>;
+ resets = <&ps_audio_p>;
+ };
+
+ mca: i2s@238400000 {
+ compatible = "apple,t8112-mca", "apple,mca";
+ reg = <0x2 0x38400000 0x0 0x18000>,
+ <0x2 0x38300000 0x0 0x30000>;
+
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 753 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 754 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 755 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 756 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 757 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 758 IRQ_TYPE_LEVEL_HIGH>;
+
+ resets = <&ps_audio_p>;
+ clocks = <&nco 0>, <&nco 1>, <&nco 2>,
+ <&nco 3>, <&nco 4>, <&nco 4>;
+ power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>,
+ <&ps_mca2>, <&ps_mca3>, <&ps_mca4>, <&ps_mca5>;
+ dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
+ <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>,
+ <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>,
+ <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>,
+ <&admac 16>, <&admac 17>, <&admac 18>, <&admac 19>,
+ <&admac 20>, <&admac 21>, <&admac 22>, <&admac 23>;
+ dma-names = "tx0a", "rx0a", "tx0b", "rx0b",
+ "tx1a", "rx1a", "tx1b", "rx1b",
+ "tx2a", "rx2a", "tx2b", "rx2b",
+ "tx3a", "rx3a", "tx3b", "rx3b",
+ "tx4a", "rx4a", "tx4b", "rx4b",
+ "tx5a", "rx5a", "tx5b", "rx5b";
+
+ #sound-dai-cells = <1>;
+ };
+
+ nco: clock-controller@23b044000 {
+ compatible = "apple,t8112-nco", "apple,nco";
+ reg = <0x2 0x3b044000 0x0 0x14000>;
+ clocks = <&nco_clkref>;
+ #clock-cells = <1>;
+ };
+
+ aic: interrupt-controller@23b0c0000 {
+ compatible = "apple,t8112-aic", "apple,aic2";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x2 0x3b0c0000 0x0 0x8000>,
+ <0x2 0x3b0c8000 0x0 0x4>;
+ reg-names = "core", "event";
+ power-domains = <&ps_aic>;
+
+ affinities {
+ e-core-pmu-affinity {
+ apple,fiq-index = <AIC_CPU_PMU_E>;
+ cpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3>;
+ };
+
+ p-core-pmu-affinity {
+ apple,fiq-index = <AIC_CPU_PMU_P>;
+ cpus = <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>;
+ };
+ };
+ };
+
+ pmgr: power-management@23b700000 {
+ compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x2 0x3b700000 0 0x14000>;
+ };
+
+ pinctrl_ap: pinctrl@23c100000 {
+ compatible = "apple,t8112-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x3c100000 0x0 0x100000>;
+ power-domains = <&ps_gpio>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_ap 0 0 213>;
+ apple,npins = <213>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 199 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 200 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 201 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 202 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 203 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 204 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 205 IRQ_TYPE_LEVEL_HIGH>;
+
+ i2c0_pins: i2c0-pins {
+ pinmux = <APPLE_PINMUX(111, 1)>,
+ <APPLE_PINMUX(110, 1)>;
+ };
+
+ i2c1_pins: i2c1-pins {
+ pinmux = <APPLE_PINMUX(113, 1)>,
+ <APPLE_PINMUX(112, 1)>;
+ };
+
+ i2c2_pins: i2c2-pins {
+ pinmux = <APPLE_PINMUX(87, 1)>,
+ <APPLE_PINMUX(86, 1)>;
+ };
+
+ i2c3_pins: i2c3-pins {
+ pinmux = <APPLE_PINMUX(54, 1)>,
+ <APPLE_PINMUX(53, 1)>;
+ };
+
+ i2c4_pins: i2c4-pins {
+ pinmux = <APPLE_PINMUX(131, 1)>,
+ <APPLE_PINMUX(130, 1)>;
+ };
+
+ spi3_pins: spi3-pins {
+ pinmux = <APPLE_PINMUX(46, 1)>,
+ <APPLE_PINMUX(47, 1)>,
+ <APPLE_PINMUX(48, 1)>,
+ <APPLE_PINMUX(49, 1)>;
+ };
+
+ pcie_pins: pcie-pins {
+ pinmux = <APPLE_PINMUX(162, 1)>,
+ <APPLE_PINMUX(163, 1)>,
+ <APPLE_PINMUX(164, 1)>;
+ // TODO: 1 more CLKREQs
+ };
+ };
+
+ pinctrl_nub: pinctrl@23d1f0000 {
+ compatible = "apple,t8112-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x3d1f0000 0x0 0x4000>;
+ power-domains = <&ps_nub_gpio>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_nub 0 0 24>;
+ apple,npins = <24>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 371 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 372 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 373 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 374 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 375 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 376 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 377 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pmgr_mini: power-management@23d280000 {
+ compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x2 0x3d280000 0 0x4000>;
+ };
+
+ wdt: watchdog@23d2b0000 {
+ compatible = "apple,t8112-wdt", "apple,wdt";
+ reg = <0x2 0x3d2b0000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 379 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_smc: pinctrl@23e820000 {
+ compatible = "apple,t8112-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x3e820000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_smc 0 0 18>;
+ apple,npins = <18>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 490 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 491 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 492 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 493 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 494 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 495 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 496 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_aop: pinctrl@24a820000 {
+ compatible = "apple,t8112-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x4a820000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_aop 0 0 54>;
+ apple,npins = <54>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 301 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 302 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 303 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 304 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 305 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 306 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 307 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ ans_mbox: mbox@277408000 {
+ compatible = "apple,t8112-asc-mailbox", "apple,asc-mailbox-v4";
+ reg = <0x2 0x77408000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 717 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 718 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 719 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 720 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "send-empty", "send-not-empty",
+ "recv-empty", "recv-not-empty";
+ #mbox-cells = <0>;
+ power-domains = <&ps_ans>;
+ };
+
+ sart: sart@27bc50000 {
+ compatible = "apple,t8112-sart", "apple,t6000-sart";
+ reg = <0x2 0x7bc50000 0x0 0x10000>;
+ power-domains = <&ps_ans>;
+ };
+
+ nvme@27bcc0000 {
+ compatible = "apple,t8112-nvme-ans2", "apple,nvme-ans2";
+ reg = <0x2 0x7bcc0000 0x0 0x40000>,
+ <0x2 0x77400000 0x0 0x4000>;
+ reg-names = "nvme", "ans";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 724 IRQ_TYPE_LEVEL_HIGH>;
+ mboxes = <&ans_mbox>;
+ apple,sart = <&sart>;
+ power-domains = <&ps_ans>, <&ps_apcie_st>;
+ power-domain-names = "ans", "apcie0";
+ resets = <&ps_ans>;
+ };
+
+ pcie0_dart: iommu@681008000 {
+ compatible = "apple,t8110-dart";
+ reg = <0x6 0x81008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 782 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_gp>;
+ };
+
+ pcie1_dart: iommu@682008000 {
+ compatible = "apple,t8110-dart";
+ reg = <0x6 0x82008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 785 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_gp>;
+ status = "disabled";
+ };
+
+ pcie2_dart: iommu@683008000 {
+ compatible = "apple,t8110-dart";
+ reg = <0x6 0x83008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 788 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_gp>;
+ status = "disabled";
+ };
+
+ pcie3_dart: iommu@684008000 {
+ compatible = "apple,t8110-dart";
+ reg = <0x6 0x84008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 791 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_gp>;
+ status = "disabled";
+ };
+
+ pcie0: pcie@690000000 {
+ compatible = "apple,t8112-pcie", "apple,pcie";
+ device_type = "pci";
+
+ reg = <0x6 0x90000000 0x0 0x1000000>,
+ <0x6 0x80000000 0x0 0x100000>,
+ <0x6 0x81000000 0x0 0x4000>,
+ <0x6 0x82000000 0x0 0x4000>,
+ <0x6 0x83000000 0x0 0x4000>,
+ <0x6 0x84000000 0x0 0x4000>;
+ reg-names = "config", "rc", "port0", "port1", "port2", "port3";
+
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 784 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 787 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 790 IRQ_TYPE_LEVEL_HIGH>;
+
+ msi-controller;
+ msi-parent = <&pcie0>;
+ msi-ranges = <&aic AIC_IRQ 793 IRQ_TYPE_EDGE_RISING 32>;
+
+ iommu-map = <0x100 &pcie0_dart 0 1>,
+ <0x200 &pcie1_dart 1 1>,
+ <0x300 &pcie2_dart 2 1>,
+ <0x400 &pcie3_dart 3 1>;
+ iommu-map-mask = <0xff00>;
+
+ bus-range = <0 4>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
+ <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
+
+ power-domains = <&ps_apcie_gp>;
+ pinctrl-0 = <&pcie_pins>;
+ pinctrl-names = "default";
+
+ port00: pci@0,0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 166 GPIO_ACTIVE_LOW>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
+ <0 0 0 2 &port00 0 0 0 1>,
+ <0 0 0 3 &port00 0 0 0 2>,
+ <0 0 0 4 &port00 0 0 0 3>;
+ };
+
+ port01: pci@1,0 {
+ device_type = "pci";
+ reg = <0x800 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 167 GPIO_ACTIVE_LOW>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
+ <0 0 0 2 &port01 0 0 0 1>,
+ <0 0 0 3 &port01 0 0 0 2>,
+ <0 0 0 4 &port01 0 0 0 3>;
+ };
+
+ port02: pci@2,0 {
+ device_type = "pci";
+ reg = <0x1000 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 168 GPIO_ACTIVE_LOW>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
+ <0 0 0 2 &port02 0 0 0 1>,
+ <0 0 0 3 &port02 0 0 0 2>,
+ <0 0 0 4 &port02 0 0 0 3>;
+ };
+
+ /* TODO: GPIO unknown */
+ port03: pci@3,0 {
+ device_type = "pci";
+ reg = <0x1800 0x0 0x0 0x0 0x0>;
+ //reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
+ <0 0 0 2 &port03 0 0 0 1>,
+ <0 0 0 3 &port03 0 0 0 2>,
+ <0 0 0 4 &port03 0 0 0 3>;
+ };
+ };
+ };
+};
+
+#include "t8112-pmgr.dtsi"
--
2.39.1
On Sun, Feb 12, 2023 at 04:41:22PM +0100, Janne Grunau wrote:
> This block on the Apple M2 is compatible with the existing driver so
> just add the per-SoC compatible.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
Acked-by: Wolfram Sang <[email protected]> # for I2C
> On 12. 2. 2023, at 16:41, Janne Grunau <[email protected]> wrote:
>
> This series contains dt-bindings updates and device trees for Apple
> silicon devices based on the M2 SoC (t8112).
>
> Device tree validation depends ont the dart-t8110 bindings queued in
> the iommu tree for 6.3 [1] and support for "local-mac-address" for
> brcm,bcm4329-fmac based devices [2]. The latter fixes validation errors
> for the existing M1 and M1 Pro/Max/Ultra device trees.
>
> The device trees are tested with the downstream Asahi Linux kernel and
> on top of v6.2-rc5. The hardware is of limited use with the upstream
> kernel. The notebooks miss keyboard/trackpad drivers and usb support.
> The Mac mini does not yet have a boot framebuffer and lacks usb support
> as well.
>
> The PMU (performance monitor) driver needs a small update which I'll
> send out separately. All other driver changes are already queued. The
> dt-bindings changes should be merged through asahi-soc to ensure
> devicetree validation.
>
> 1: https://lore.kernel.org/linux-iommu/[email protected]/
> 2: https://lore.kernel.org/linux-devicetree/[email protected]/
>
> Signed-off-by: Janne Grunau <[email protected]>
For nco, mca, admac binding changes:
Acked-by: Martin Povišer <[email protected]>
On Sun, 12 Feb 2023 15:41:15 +0000,
Janne Grunau <[email protected]> wrote:
>
> The Apple M2 SoC uses AICv2 and is compatible with the existing driver.
> Add its per-SoC compatible.
> Since multi-die versions of the M2 are not expected decrease
> '#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled
> inside the driver.
>
> Signed-off-by: Janne Grunau <[email protected]>
Acked-by: Marc Zyngier <[email protected]>
M.
--
Without deviation from the norm, progress is not possible.
On 12-02-23, 16:41, Janne Grunau wrote:
> The block found on Apple's M2 SoC is compatible with the existing driver
> so add its per-SoC compatible.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
> ---
> This trivial dt-bindings update should be merged through the asahi-soc
> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> series.
Acked-by: Vinod Koul <[email protected]>
--
~Vinod
On Sun, Feb 12, 2023 at 4:41 PM Janne Grunau <[email protected]> wrote:
> This new SoC uses the same pinctrl hardware, so just add a new per-SoC
> compatible.
>
> Signed-off-by: Janne Grunau <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
On 12/02/2023 16:41, Janne Grunau wrote:
> The block on Apple M2 SoCs is compatible with the existing driver so
> just add its per-SoC compatible.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
> ---
> This trivial dt-bindings update should be merged through the asahi-soc
> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> series.
No, the bindings go via subsystem. Just because you want to validate
something is not really a reason - you can validate on next. Don't
create special rules for Asahi... or rather - why Asahi is special than
everyone else?
> ---
> Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 12/02/2023 16:41, Janne Grunau wrote:
> The block on the Apple M2 SoC is compatible with the existing driver so
> add its per-SoC compatible.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
> ---
> This trivial dt-bindings update should be merged through the asahi-soc
> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> series.
Same comment as before, that's not a valid reason.
Best regards,
Krzysztof
On 12/02/2023 16:41, Janne Grunau wrote:
> These are the CPU cores in the Apple silicon M2 SoC.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
> ---
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 12/02/2023 16:41, Janne Grunau wrote:
> The Apple M2 SoC uses AICv2 and is compatible with the existing driver.
> Add its per-SoC compatible.
> Since multi-die versions of the M2 are not expected decrease
> '#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled
> inside the driver.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
> ---
> This trivial dt-bindings update should be merged through the asahi-soc
> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> series.
> ---
> .../bindings/interrupt-controller/apple,aic2.yaml | 23 +++++++++++++++++++---
> 1 file changed, 20 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> index 06948c0e36a5..120e23ff668c 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> @@ -31,19 +31,22 @@ description: |
> properties:
> compatible:
> items:
> - - const: apple,t6000-aic
> + - enum:
> + - apple,t8112-aic
> + - apple,t6000-aic
> - const: apple,aic2
>
> interrupt-controller: true
>
> '#interrupt-cells':
> - const: 4
> + minimum: 3
> + maximum: 4
> description: |
> The 1st cell contains the interrupt type:
> - 0: Hardware IRQ
> - 1: FIQ
>
> - The 2nd cell contains the die ID.
> + The 2nd cell contains the die ID (optional).
>
> The next cell contains the interrupt number.
> - HW IRQs: interrupt number
> @@ -98,6 +101,20 @@ properties:
> - apple,fiq-index
> - cpus
>
> +if:
Put it under allOf. After "required:", just like example-schema asks for.
> + properties:
> + compatible:
> + contains:
> + const: apple,t8112-aic
> +then:
> + properties:
> + '#interrupt-cells':
> + maximum: 3
Shouldn't this be:
const: 3
> +else:
> + properties:
> + '#interrupt-cells':
> + minimum: 4
const: 4
Best regards,
Krzysztof
On 12/02/2023 16:41, Janne Grunau wrote:
> The PMUs on the avalanche and blizzard CPU two micro-architectures are
> mostly compatible with M1 ones. They miss support for a single counter
> according to Apple's PMU counter list.
>
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 12/02/2023 16:41, Janne Grunau wrote:
> "apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as
> well. To allow for later discovered incompatibilities use
> '"apple,t8112-sart", "apple,t6000-sart"' as compatible string.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
> ---
> This trivial dt-bindings update should be merged through the asahi-soc
> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> series.
Same comment as in other cases.
> ---
> Documentation/devicetree/bindings/iommu/apple,sart.yaml | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml
> index 1524fa3094ef..07d2d68a87df 100644
> --- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml
> +++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml
> @@ -28,9 +28,14 @@ description:
>
> properties:
> compatible:
> - enum:
> - - apple,t6000-sart
> - - apple,t8103-sart
> + oneOf:
> + - items:
> + - const: apple,t8112-sart
> + - const: apple,t6000-sart
> + - items:
Drop items.
> + enum:
> + - apple,t6000-sart
> + - apple,t8103-sart
>
> reg:
> maxItems: 1
>
Best regards,
Krzysztof
On 12/02/2023 16:41, Janne Grunau wrote:
> This adds the following apple,t8112 platforms:
>
> - apple,j413 - MacBook Air (M2, 2022)
> - apple,j473 - Mac mini (M2, 2023)
> - apple,j493 - MacBook Pro (13-inch, M2, 2022)
>
> Signed-off-by: Janne Grunau <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/apple.yaml | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml
> index da78c69774f2..883fd67e3752 100644
> --- a/Documentation/devicetree/bindings/arm/apple.yaml
> +++ b/Documentation/devicetree/bindings/arm/apple.yaml
> @@ -19,6 +19,12 @@ description: |
> - MacBook Air (M1, 2020)
> - iMac (24-inch, M1, 2021)
>
> + Devices based on the "M2" SoC:
> +
> + - MacBook Air (M2, 2022)
> + - MacBook Pro (13-inch, M2, 2022)
> + - Mac mini (M2, 2023)
Aren't you now repeating exactly what is in the schema? Keep only one...
> +
> And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:
>
> - MacBook Pro (14-inch, M1 Pro, 2021)
> @@ -70,6 +76,15 @@ properties:
> - const: apple,t8103
> - const: apple,arm-platform
>
> + - description: Apple M2 SoC based platforms
> + items:
> + - enum:
> + - apple,j413 # MacBook Air (M2, 2022)
> + - apple,j473 # Mac mini (M2, 2023)
> + - apple,j493 # MacBook Pro (13-inch, M2, 2022)
Best regards,
Krzysztof
On 12/02/2023 16:41, Janne Grunau wrote:
> From: Hector Martin <[email protected]>
>
> This adds device trees for the following devices:
> - Macbook Air (M2, 2022)
> - Macbook Pro 13" (M2, 2022)
> - Mac mini (M2, 2023)
>
> Signed-off-by: Hector Martin <[email protected]>
> Co-developed-by: Janne Grunau <[email protected]>
> Signed-off-by: Janne Grunau <[email protected]>
> ---
> arch/arm64/boot/dts/apple/Makefile | 3 +
> arch/arm64/boot/dts/apple/t8112-j413.dts | 71 ++
> arch/arm64/boot/dts/apple/t8112-j473.dts | 60 ++
> arch/arm64/boot/dts/apple/t8112-j493.dts | 60 ++
> arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 81 ++
> arch/arm64/boot/dts/apple/t8112-pmgr.dtsi | 1141 +++++++++++++++++++++++++++++
> arch/arm64/boot/dts/apple/t8112.dtsi | 904 +++++++++++++++++++++++
> 7 files changed, 2320 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile
> index 5a7506ff5ea3..aec5e29cdfb7 100644
> --- a/arch/arm64/boot/dts/apple/Makefile
> +++ b/arch/arm64/boot/dts/apple/Makefile
> @@ -10,3 +10,6 @@ dtb-$(CONFIG_ARCH_APPLE) += t6000-j316s.dtb
> dtb-$(CONFIG_ARCH_APPLE) += t6001-j316c.dtb
> dtb-$(CONFIG_ARCH_APPLE) += t6001-j375c.dtb
> dtb-$(CONFIG_ARCH_APPLE) += t6002-j375d.dtb
> +dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb
> +dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb
> +dtb-$(CONFIG_ARCH_APPLE) += t8112-j493.dtb
> diff --git a/arch/arm64/boot/dts/apple/t8112-j413.dts b/arch/arm64/boot/dts/apple/t8112-j413.dts
> new file mode 100644
> index 000000000000..0e5b5add92cf
> --- /dev/null
> +++ b/arch/arm64/boot/dts/apple/t8112-j413.dts
> @@ -0,0 +1,71 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Apple MacBook Air (M2, 2022)
> + *
> + * target-type: J413
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
> +/dts-v1/;
> +
> +#include "t8112.dtsi"
> +#include "t8112-jxxx.dtsi"
> +
> +/ {
> + compatible = "apple,j413", "apple,t8112", "apple,arm-platform";
> + model = "Apple MacBook Air (13-inch, M2, 2022)";
> +
> + aliases {
> + bluetooth0 = &bluetooth0;
> + wifi0 = &wifi0;
> + };
> +};
> +
> +/*
> + * Force the bus number assignments so that we can declare some of the
> + * on-board devices and properties that are populated by the bootloader
> + * (such as MAC addresses).
> + */
> +&port00 {
> + bus-range = <1 1>;
> + wifi0: wifi@0,0 {
> + compatible = "pci14e4,4433";
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> + /* To be filled by the loader */
> + local-mac-address = [00 10 18 00 00 10];
> + apple,antenna-sku = "XX";
> + brcm,board-type = "apple,hokkaido";
> + };
> +
> + bluetooth0: bluetooth@0,1 {
> + compatible = "pci14e4,5f71";
> + reg = <0x10100 0x0 0x0 0x0 0x0>;
> + /* To be filled by the loader */
> + local-bd-address = [00 00 00 00 00 00];
> + brcm,board-type = "apple,hokkaido";
> + };
> +};
> +
> +/*
> + * Remove unused PCIe ports
> + */
> +
> +/delete-node/ &port01;
You should not delete devices just because they are unused. Externally
visible buses should be just disabled in DTSI and you enable them when
needed. Not the opposite way.
What's more, you must node delete nodes just because they are "not
used". This not anymore proper description of hardware.
> +/delete-node/ &port02;
> +/delete-node/ &port03;
> +
> +&i2c0 {
> + /* MagSafe port */
> + hpm5: usb-pd@3a {
> + compatible = "apple,cd321x";
> + reg = <0x3a>;
> + interrupt-parent = <&pinctrl_ap>;
> + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "irq";
> + };
> +};
> +
> +&i2c4 {
> + status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/apple/t8112-j473.dts b/arch/arm64/boot/dts/apple/t8112-j473.dts
> new file mode 100644
> index 000000000000..55950d0a73c5
> --- /dev/null
> +++ b/arch/arm64/boot/dts/apple/t8112-j473.dts
> @@ -0,0 +1,60 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Apple Mac mini (M2, 2023)
> + *
> + * target-type: J473
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
> +/dts-v1/;
(....)
> +
> + ps_debug_switch: power-controller@b8 {
> + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xb8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "debug_switch";
> + apple,always-on; /* Core AON device */
> + };
> +};
> +
> diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi
> new file mode 100644
> index 000000000000..974443913f6a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/apple/t8112.dtsi
> @@ -0,0 +1,904 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Apple T8112 "M2" SoC
> + *
> + * Other names: H14G
> + *
> + * Copyright The Asahi Linux Contributors
> + */
(...)
> +
> + aic: interrupt-controller@23b0c0000 {
> + compatible = "apple,t8112-aic", "apple,aic2";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x2 0x3b0c0000 0x0 0x8000>,
> + <0x2 0x3b0c8000 0x0 0x4>;
> + reg-names = "core", "event";
> + power-domains = <&ps_aic>;
> +
> + affinities {
> + e-core-pmu-affinity {
> + apple,fiq-index = <AIC_CPU_PMU_E>;
> + cpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3>;
> + };
> +
> + p-core-pmu-affinity {
> + apple,fiq-index = <AIC_CPU_PMU_P>;
> + cpus = <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>;
> + };
> + };
> + };
> +
> + pmgr: power-management@23b700000 {
> + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
Why this is simple-mfd?
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x2 0x3b700000 0 0x14000>;
> + };
> +
> + pmgr_mini: power-management@23d280000 {
> + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
Why this is simple-mfd?
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x2 0x3d280000 0 0x4000>;
> + };
Best regards,
Krzysztof
On 2023-02-13 12:10:36 +0100, Krzysztof Kozlowski wrote:
> On 12/02/2023 16:41, Janne Grunau wrote:
> > The block on Apple M2 SoCs is compatible with the existing driver so
> > just add its per-SoC compatible.
> >
> > Signed-off-by: Janne Grunau <[email protected]>
> >
> > ---
> > This trivial dt-bindings update should be merged through the asahi-soc
> > tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> > series.
>
> No, the bindings go via subsystem. Just because you want to validate
> something is not really a reason - you can validate on next. Don't
> create special rules for Asahi... or rather - why Asahi is special than
> everyone else?
We did that 2 or 3 times in the past without commnts that it is not
desired so I wasn't aware that this would be special handling.
Merging binding and devicetree updates together looks to me like the
most sensible option since dtbs validation is the only testable
dependecy of dt binding updates.
Keeping them together ensures the dtbs validate without delaying
devicetree changes by one kernel release after the dt-bindings change
was merged.
I suppose it works out most of the time if the merge request is sent
only if it validates in next. That still depends on the merge order in
the merge window but -rc1 should be fine.
I'll consider devicetree validation as eventually valid from now on and
not care too much about it.
Janne
On 13/02/2023 12:57, Janne Grunau wrote:
> On 2023-02-13 12:10:36 +0100, Krzysztof Kozlowski wrote:
>> On 12/02/2023 16:41, Janne Grunau wrote:
>>> The block on Apple M2 SoCs is compatible with the existing driver so
>>> just add its per-SoC compatible.
>>>
>>> Signed-off-by: Janne Grunau <[email protected]>
>>>
>>> ---
>>> This trivial dt-bindings update should be merged through the asahi-soc
>>> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
>>> series.
>>
>> No, the bindings go via subsystem. Just because you want to validate
>> something is not really a reason - you can validate on next. Don't
>> create special rules for Asahi... or rather - why Asahi is special than
>> everyone else?
>
> We did that 2 or 3 times in the past without commnts that it is not
> desired so I wasn't aware that this would be special handling.
>
> Merging binding and devicetree updates together looks to me like the
> most sensible option since dtbs validation is the only testable
> dependecy of dt binding updates.
But it is not the recommended practice. Bindings were always going with
drivers and this was said by Rob multiple times.
For sure if there is no driver update at all or subsystem maintainer is
not responsive, bindings were picked up by SoC folks, but it's rather
fallback, not the main path.
> Keeping them together ensures the dtbs validate without delaying
> devicetree changes by one kernel release after the dt-bindings change
> was merged.
dtbs will validate on next and in next release the same way if bindings
go via subsystem. I don't see the benefit nor any difference for
validation. What type of delay? Why would you ever need it?
> I suppose it works out most of the time if the merge request is sent
> only if it validates in next. That still depends on the merge order in
> the merge window but -rc1 should be fine.
There is no requirement of dtbs_check for bisectability. Bindings are
separate (also exported to other users), thus it is expected to have
here async.
>
> I'll consider devicetree validation as eventually valid from now on and
> not care too much about it.
Everything will validate once reaches next as well...
Best regards,
Krzysztof
On 13/02/2023 12:57, Janne Grunau wrote:
> On 2023-02-13 12:10:36 +0100, Krzysztof Kozlowski wrote:
>> On 12/02/2023 16:41, Janne Grunau wrote:
>>> The block on Apple M2 SoCs is compatible with the existing driver so
>>> just add its per-SoC compatible.
>>>
>>> Signed-off-by: Janne Grunau <[email protected]>
>>>
>>> ---
>>> This trivial dt-bindings update should be merged through the asahi-soc
>>> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
>>> series.
>>
>> No, the bindings go via subsystem. Just because you want to validate
>> something is not really a reason - you can validate on next. Don't
>> create special rules for Asahi... or rather - why Asahi is special than
>> everyone else?
>
> We did that 2 or 3 times in the past without commnts that it is not
> desired so I wasn't aware that this would be special handling.
>
> Merging binding and devicetree updates together looks to me like the
> most sensible option since dtbs validation is the only testable
> dependecy of dt binding updates.
> Keeping them together ensures the dtbs validate without delaying
> devicetree changes by one kernel release after the dt-bindings change
> was merged.
> I suppose it works out most of the time if the merge request is sent
> only if it validates in next. That still depends on the merge order in
> the merge window but -rc1 should be fine.
BTW, your approach causes also bisectability with checkpatch on the
drivers or the delay of drivers... Therefore not much solved here.
Best regards,
Krzysztof
On 2023-02-13 12:12:25 +0100, Krzysztof Kozlowski wrote:
> On 12/02/2023 16:41, Janne Grunau wrote:
> > The Apple M2 SoC uses AICv2 and is compatible with the existing driver.
> > Add its per-SoC compatible.
> > Since multi-die versions of the M2 are not expected decrease
> > '#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled
> > inside the driver.
> >
> > Signed-off-by: Janne Grunau <[email protected]>
> >
> > ---
> > This trivial dt-bindings update should be merged through the asahi-soc
> > tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> > series.
> > ---
> > .../bindings/interrupt-controller/apple,aic2.yaml | 23 +++++++++++++++++++---
> > 1 file changed, 20 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> > index 06948c0e36a5..120e23ff668c 100644
> > --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml
> > @@ -31,19 +31,22 @@ description: |
> > properties:
> > compatible:
> > items:
> > - - const: apple,t6000-aic
> > + - enum:
> > + - apple,t8112-aic
> > + - apple,t6000-aic
> > - const: apple,aic2
> >
> > interrupt-controller: true
> >
> > '#interrupt-cells':
> > - const: 4
> > + minimum: 3
> > + maximum: 4
> > description: |
> > The 1st cell contains the interrupt type:
> > - 0: Hardware IRQ
> > - 1: FIQ
> >
> > - The 2nd cell contains the die ID.
> > + The 2nd cell contains the die ID (optional).
> >
> > The next cell contains the interrupt number.
> > - HW IRQs: interrupt number
> > @@ -98,6 +101,20 @@ properties:
> > - apple,fiq-index
> > - cpus
> >
> > +if:
>
> Put it under allOf. After "required:", just like example-schema asks for.
moved
> > + properties:
> > + compatible:
> > + contains:
> > + const: apple,t8112-aic
> > +then:
> > + properties:
> > + '#interrupt-cells':
> > + maximum: 3
>
> Shouldn't this be:
> const: 3
same effect but more explicit, bot changed
> > +else:
> > + properties:
> > + '#interrupt-cells':
> > + minimum: 4
>
> const: 4
thanks
Janne
On Sun, Feb 12, 2023 at 04:41:24PM +0100, Janne Grunau wrote:
> This trivial dt-bindings update should be merged through the asahi-soc
> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> series.
Given that we're at -rc8 it seems like it would be more sensible
to just merge this now so it's in -rc1, it doesn't seem likely
that everything will get sorted prior to the merge window?
On 2023-02-13 12:13:55 +0100, Krzysztof Kozlowski wrote:
> On 12/02/2023 16:41, Janne Grunau wrote:
> > "apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as
> > well. To allow for later discovered incompatibilities use
> > '"apple,t8112-sart", "apple,t6000-sart"' as compatible string.
> >
> > Signed-off-by: Janne Grunau <[email protected]>
> >
> > ---
> > This trivial dt-bindings update should be merged through the asahi-soc
> > tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> > series.
>
> Same comment as in other cases.
dropped from all commits and cover letter.
> > ---
> > Documentation/devicetree/bindings/iommu/apple,sart.yaml | 11 ++++++++---
> > 1 file changed, 8 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml
> > index 1524fa3094ef..07d2d68a87df 100644
> > --- a/Documentation/devicetree/bindings/iommu/apple,sart.yaml
> > +++ b/Documentation/devicetree/bindings/iommu/apple,sart.yaml
> > @@ -28,9 +28,14 @@ description:
> >
> > properties:
> > compatible:
> > - enum:
> > - - apple,t6000-sart
> > - - apple,t8103-sart
> > + oneOf:
> > + - items:
> > + - const: apple,t8112-sart
> > + - const: apple,t6000-sart
> > + - items:
>
> Drop items.
done
> > + enum:
> > + - apple,t6000-sart
> > + - apple,t8103-sart
> >
> > reg:
> > maxItems: 1
> >
thanks
On 12/02/2023 16:41, Janne Grunau wrote:
> The block found on Apple's M2 SoC is compatible with the existing driver
> so add its per-SoC compatible.
>
> Signed-off-by: Janne Grunau <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On 2023-02-13 12:15:55 +0100, Krzysztof Kozlowski wrote:
> On 12/02/2023 16:41, Janne Grunau wrote:
> > This adds the following apple,t8112 platforms:
> >
> > - apple,j413 - MacBook Air (M2, 2022)
> > - apple,j473 - Mac mini (M2, 2023)
> > - apple,j493 - MacBook Pro (13-inch, M2, 2022)
> >
> > Signed-off-by: Janne Grunau <[email protected]>
> > ---
> > Documentation/devicetree/bindings/arm/apple.yaml | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml
> > index da78c69774f2..883fd67e3752 100644
> > --- a/Documentation/devicetree/bindings/arm/apple.yaml
> > +++ b/Documentation/devicetree/bindings/arm/apple.yaml
> > @@ -19,6 +19,12 @@ description: |
> > - MacBook Air (M1, 2020)
> > - iMac (24-inch, M1, 2021)
> >
> > + Devices based on the "M2" SoC:
> > +
> > + - MacBook Air (M2, 2022)
> > + - MacBook Pro (13-inch, M2, 2022)
> > + - Mac mini (M2, 2023)
>
> Aren't you now repeating exactly what is in the schema? Keep only one...
yes but I think the duplication is OK. I consider the description for
human consumption and the schema for computer consumption. The comments
in the schema are aids to for editing the schema. This follows the
existing pattern for M1 and M1 Pro/Max/Ultra based devices in this file.
Janne
On 2023-02-13 12:22:11 +0100, Krzysztof Kozlowski wrote:
> On 12/02/2023 16:41, Janne Grunau wrote:
> > From: Hector Martin <[email protected]>
> >
> > This adds device trees for the following devices:
> > - Macbook Air (M2, 2022)
> > - Macbook Pro 13" (M2, 2022)
> > - Mac mini (M2, 2023)
> >
> > Signed-off-by: Hector Martin <[email protected]>
> > Co-developed-by: Janne Grunau <[email protected]>
> > Signed-off-by: Janne Grunau <[email protected]>
> > ---
> > arch/arm64/boot/dts/apple/Makefile | 3 +
> > arch/arm64/boot/dts/apple/t8112-j413.dts | 71 ++
> > arch/arm64/boot/dts/apple/t8112-j473.dts | 60 ++
> > arch/arm64/boot/dts/apple/t8112-j493.dts | 60 ++
> > arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 81 ++
> > arch/arm64/boot/dts/apple/t8112-pmgr.dtsi | 1141 +++++++++++++++++++++++++++++
> > arch/arm64/boot/dts/apple/t8112.dtsi | 904 +++++++++++++++++++++++
> > 7 files changed, 2320 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile
> > index 5a7506ff5ea3..aec5e29cdfb7 100644
> > --- a/arch/arm64/boot/dts/apple/Makefile
> > +++ b/arch/arm64/boot/dts/apple/Makefile
> > @@ -10,3 +10,6 @@ dtb-$(CONFIG_ARCH_APPLE) += t6000-j316s.dtb
> > dtb-$(CONFIG_ARCH_APPLE) += t6001-j316c.dtb
> > dtb-$(CONFIG_ARCH_APPLE) += t6001-j375c.dtb
> > dtb-$(CONFIG_ARCH_APPLE) += t6002-j375d.dtb
> > +dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb
> > +dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb
> > +dtb-$(CONFIG_ARCH_APPLE) += t8112-j493.dtb
> > diff --git a/arch/arm64/boot/dts/apple/t8112-j413.dts b/arch/arm64/boot/dts/apple/t8112-j413.dts
> > new file mode 100644
> > index 000000000000..0e5b5add92cf
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/apple/t8112-j413.dts
> > @@ -0,0 +1,71 @@
> > +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> > +/*
> > + * Apple MacBook Air (M2, 2022)
> > + *
> > + * target-type: J413
> > + *
> > + * Copyright The Asahi Linux Contributors
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "t8112.dtsi"
> > +#include "t8112-jxxx.dtsi"
> > +
> > +/ {
> > + compatible = "apple,j413", "apple,t8112", "apple,arm-platform";
> > + model = "Apple MacBook Air (13-inch, M2, 2022)";
> > +
> > + aliases {
> > + bluetooth0 = &bluetooth0;
> > + wifi0 = &wifi0;
> > + };
> > +};
> > +
> > +/*
> > + * Force the bus number assignments so that we can declare some of the
> > + * on-board devices and properties that are populated by the bootloader
> > + * (such as MAC addresses).
> > + */
> > +&port00 {
> > + bus-range = <1 1>;
> > + wifi0: wifi@0,0 {
> > + compatible = "pci14e4,4433";
> > + reg = <0x10000 0x0 0x0 0x0 0x0>;
> > + /* To be filled by the loader */
> > + local-mac-address = [00 10 18 00 00 10];
> > + apple,antenna-sku = "XX";
> > + brcm,board-type = "apple,hokkaido";
> > + };
> > +
> > + bluetooth0: bluetooth@0,1 {
> > + compatible = "pci14e4,5f71";
> > + reg = <0x10100 0x0 0x0 0x0 0x0>;
> > + /* To be filled by the loader */
> > + local-bd-address = [00 00 00 00 00 00];
> > + brcm,board-type = "apple,hokkaido";
> > + };
> > +};
> > +
> > +/*
> > + * Remove unused PCIe ports
> > + */
> > +
> > +/delete-node/ &port01;
>
> You should not delete devices just because they are unused. Externally
> visible buses should be just disabled in DTSI and you enable them when
> needed. Not the opposite way.
>
> What's more, you must node delete nodes just because they are "not
> used". This not anymore proper description of hardware.
I agree, this is copied from the M1 and M1 Pro/Max/Ultra devictrees.
I'll fix it there as well.
>
> > +/delete-node/ &port02;
> > +/delete-node/ &port03;
> > +
> > +&i2c0 {
> > + /* MagSafe port */
> > + hpm5: usb-pd@3a {
> > + compatible = "apple,cd321x";
> > + reg = <0x3a>;
> > + interrupt-parent = <&pinctrl_ap>;
> > + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> > + interrupt-names = "irq";
> > + };
> > +};
> > +
> > +&i2c4 {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/apple/t8112-j473.dts b/arch/arm64/boot/dts/apple/t8112-j473.dts
> > new file mode 100644
> > index 000000000000..55950d0a73c5
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/apple/t8112-j473.dts
> > @@ -0,0 +1,60 @@
> > +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> > +/*
> > + * Apple Mac mini (M2, 2023)
> > + *
> > + * target-type: J473
> > + *
> > + * Copyright The Asahi Linux Contributors
> > + */
> > +
> > +/dts-v1/;
>
> (....)
>
>
> > +
> > + ps_debug_switch: power-controller@b8 {
> > + compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
> > + reg = <0xb8 4>;
> > + #power-domain-cells = <0>;
> > + #reset-cells = <0>;
> > + label = "debug_switch";
> > + apple,always-on; /* Core AON device */
> > + };
> > +};
> > +
> > diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi
> > new file mode 100644
> > index 000000000000..974443913f6a
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/apple/t8112.dtsi
> > @@ -0,0 +1,904 @@
> > +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> > +/*
> > + * Apple T8112 "M2" SoC
> > + *
> > + * Other names: H14G
> > + *
> > + * Copyright The Asahi Linux Contributors
> > + */
>
>
> (...)
>
> > +
> > + aic: interrupt-controller@23b0c0000 {
> > + compatible = "apple,t8112-aic", "apple,aic2";
> > + #interrupt-cells = <3>;
> > + interrupt-controller;
> > + reg = <0x2 0x3b0c0000 0x0 0x8000>,
> > + <0x2 0x3b0c8000 0x0 0x4>;
> > + reg-names = "core", "event";
> > + power-domains = <&ps_aic>;
> > +
> > + affinities {
> > + e-core-pmu-affinity {
> > + apple,fiq-index = <AIC_CPU_PMU_E>;
> > + cpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3>;
> > + };
> > +
> > + p-core-pmu-affinity {
> > + apple,fiq-index = <AIC_CPU_PMU_P>;
> > + cpus = <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>;
> > + };
> > + };
> > + };
> > +
> > + pmgr: power-management@23b700000 {
> > + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
>
> Why this is simple-mfd?
I suppose because the syscon device is not limited to power domain
controls. The dt-bindings in arm/apple/apple,pmgr.yaml specify those
compatibles. See the original discussion in:
https://lore.kernel.org/linux-devicetree/[email protected]/
>
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + reg = <0x2 0x3b700000 0 0x14000>;
> > + };
>
>
> > +
> > + pmgr_mini: power-management@23d280000 {
> > + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
>
> Why this is simple-mfd?
see above
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + reg = <0x2 0x3d280000 0 0x4000>;
> > + };
>
thanks
Janne
On 13/02/2023 15:01, Janne Grunau wrote:
>>> +
>>> + pmgr: power-management@23b700000 {
>>> + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
>>
>> Why this is simple-mfd?
>
> I suppose because the syscon device is not limited to power domain
> controls. The dt-bindings in arm/apple/apple,pmgr.yaml specify those
> compatibles. See the original discussion in:
>
> https://lore.kernel.org/linux-devicetree/[email protected]/
This did not answer my concerns. There are no children here.
Best regards,
Krzysztof
On 2023-02-13 15:36:33 +0100, Krzysztof Kozlowski wrote:
> On 13/02/2023 15:01, Janne Grunau wrote:
> >>> +
> >>> + pmgr: power-management@23b700000 {
> >>> + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
> >>
> >> Why this is simple-mfd?
> >
> > I suppose because the syscon device is not limited to power domain
> > controls. The dt-bindings in arm/apple/apple,pmgr.yaml specify those
> > compatibles. See the original discussion in:
> >
> > https://lore.kernel.org/linux-devicetree/[email protected]/
>
> This did not answer my concerns. There are no children here.
The child nodes are in t8112-pmgr.dtsi
Janne
On 13/02/2023 16:08, Janne Grunau wrote:
> On 2023-02-13 15:36:33 +0100, Krzysztof Kozlowski wrote:
>> On 13/02/2023 15:01, Janne Grunau wrote:
>>>>> +
>>>>> + pmgr: power-management@23b700000 {
>>>>> + compatible = "apple,t8112-pmgr", "apple,pmgr", "syscon", "simple-mfd";
>>>>
>>>> Why this is simple-mfd?
>>>
>>> I suppose because the syscon device is not limited to power domain
>>> controls. The dt-bindings in arm/apple/apple,pmgr.yaml specify those
>>> compatibles. See the original discussion in:
>>>
>>> https://lore.kernel.org/linux-devicetree/[email protected]/
>>
>> This did not answer my concerns. There are no children here.
>
> The child nodes are in t8112-pmgr.dtsi
Ahhh, so this is overridden? Then it's fine.
Best regards,
Krzysztof
On 13/02/2023 21.10, Krzysztof Kozlowski wrote:
> On 13/02/2023 12:57, Janne Grunau wrote:
>> On 2023-02-13 12:10:36 +0100, Krzysztof Kozlowski wrote:
>>> On 12/02/2023 16:41, Janne Grunau wrote:
>>>> The block on Apple M2 SoCs is compatible with the existing driver so
>>>> just add its per-SoC compatible.
>>>>
>>>> Signed-off-by: Janne Grunau <[email protected]>
>>>>
>>>> ---
>>>> This trivial dt-bindings update should be merged through the asahi-soc
>>>> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
>>>> series.
>>>
>>> No, the bindings go via subsystem. Just because you want to validate
>>> something is not really a reason - you can validate on next. Don't
>>> create special rules for Asahi... or rather - why Asahi is special than
>>> everyone else?
>>
>> We did that 2 or 3 times in the past without commnts that it is not
>> desired so I wasn't aware that this would be special handling.
>>
>> Merging binding and devicetree updates together looks to me like the
>> most sensible option since dtbs validation is the only testable
>> dependecy of dt binding updates.
>
> But it is not the recommended practice. Bindings were always going with
> drivers and this was said by Rob multiple times.
>
> For sure if there is no driver update at all or subsystem maintainer is
> not responsive, bindings were picked up by SoC folks, but it's rather
> fallback, not the main path.
Rob also said that we can do trivial compatible additions ourselves and
don't have to involve him or subsystem maintainers. It's too trivial to
count as a "binding" change.
Let's not make this harder than it is. We have a pile of compatibles to
add every SoC that will only keep growing, and we have the situation
where this is largely a formality because it turns out the hardware *is*
compatible anyway (we just change the top compatible just in case). The
list of subsystems we touch will only keep growing. None of those
subsystem maintainers have any useful input to add to this, as the only
people with the information about what compatibles go together or don't
is us (since we're reverse engineering the hardware). All the relevant
bindings are listed in our section of MAINTAINERS. This stuff isn't
worth gratuitous added complexity and involvement. It's hard enough
getting driver changes into the kernel, let's not make it hard to get
devices that *don't* need driver changes on top of that.
>> I'll consider devicetree validation as eventually valid from now on and
>> not care too much about it.
>
> Everything will validate once reaches next as well...
Only once both changes hit next. If the DT change hits next first, it
won't validate. If the DT change hits mainline first, it won't validate.
AIUI from what Rob decently told me, this is okay, so we can submit
proper bindings changes to drivers from now on. But I still maintain
that *trivial compatible additions* should go through SoC because
there's no point in involving 15 subsystems instead of 1 every time
Apple releases a new SoC that's compatible with previous ones on 14
subsystems.
- Hector
On 12/02/2023 16:41, Janne Grunau wrote:
> - MacBook Pro (14-inch, M1 Pro, 2021)
> @@ -70,6 +76,15 @@ properties:
> - const: apple,t8103
> - const: apple,arm-platform
>
> + - description: Apple M2 SoC based platforms
> + items:
> + - enum:
> + - apple,j413 # MacBook Air (M2, 2022)
> + - apple,j473 # Mac mini (M2, 2023)
> + - apple,j493 # MacBook Pro (13-inch, M2, 2022)
> + - const: apple,t8112
> + - const: apple,arm-platform
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Sun, Feb 12, 2023 at 04:41:24PM +0100, Janne Grunau wrote:
> This trivial dt-bindings update should be merged through the asahi-soc
> tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> series.
I didn't get a response to my query about the nearness to the
merge window and the prospects of the series hitting v6.3, though
I do see that there's a new version needed for some of the other
patches. I'm just going to go ahead and apply so it's there and
I don't need to worry about or see resends, in case the rest of
the series is going to go in it's not the end of the world if it
gets applied twice anyway so
Reviewed-by: Mark Brown <[email protected]>
On 2023-02-16 16:00:24 +0000, Mark Brown wrote:
> On Sun, Feb 12, 2023 at 04:41:24PM +0100, Janne Grunau wrote:
>
> > This trivial dt-bindings update should be merged through the asahi-soc
> > tree to ensure validation of the Apple M2 (t8112) devicetrees in this
> > series.
>
> I didn't get a response to my query about the nearness to the
> merge window and the prospects of the series hitting v6.3, though
> I do see that there's a new version needed for some of the other
> patches. I'm just going to go ahead and apply so it's there and
> I don't need to worry about or see resends, in case the rest of
> the series is going to go in it's not the end of the world if it
> gets applied twice anyway so
Sorry, I forgot to answer. The devicetree commit is too late for 6.3. If
some of the binding updates make it into v6.3-rc1 it will get dropped.
> Reviewed-by: Mark Brown <[email protected]>
Thanks
Janne
Quoting Janne Grunau (2023-02-12 07:41:23)
> The block found on Apple's M2 SoC is compatible with the existing driver
> so add its per-SoC compatible.
>
> Signed-off-by: Janne Grunau <[email protected]>
>
> ---
Acked-by: Stephen Boyd <[email protected]>
On Sun, 12 Feb 2023 16:41:10 +0100, Janne Grunau wrote:
> This series contains dt-bindings updates and device trees for Apple
> silicon devices based on the M2 SoC (t8112).
>
> Device tree validation depends ont the dart-t8110 bindings queued in
> the iommu tree for 6.3 [1] and support for "local-mac-address" for
> brcm,bcm4329-fmac based devices [2]. The latter fixes validation errors
> for the existing M1 and M1 Pro/Max/Ultra device trees.
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[14/17] dt-bindings: sound: apple,mca: Add t8112-mca compatible
commit: b361d5d2464a88184f6e17a6462719ba79180b1a
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark