The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
cores.
Reviewed-by: Guo Ren <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Acked-by: Chao Wei <[email protected]>
Signed-off-by: Chen Wang <[email protected]>
---
arch/riscv/Kconfig.socs | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 6833d01e2e70..d4df7b5d0f16 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -22,6 +22,11 @@ config SOC_SIFIVE
help
This enables support for SiFive SoC platform hardware.
+config ARCH_SOPHGO
+ bool "Sophgo SoCs"
+ help
+ This enables support for Sophgo SoC platform hardware.
+
config ARCH_STARFIVE
def_bool SOC_STARFIVE
--
2.25.1
Sorry, please ignore this email due to not sending out in thread.
On 2023/10/4 22:20, Chen Wang wrote:
> The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
> cores.
>
> Reviewed-by: Guo Ren <[email protected]>
> Reviewed-by: Conor Dooley <[email protected]>
> Acked-by: Chao Wei <[email protected]>
> Signed-off-by: Chen Wang <[email protected]>
> ---
> arch/riscv/Kconfig.socs | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 6833d01e2e70..d4df7b5d0f16 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -22,6 +22,11 @@ config SOC_SIFIVE
> help
> This enables support for SiFive SoC platform hardware.
>
> +config ARCH_SOPHGO
> + bool "Sophgo SoCs"
> + help
> + This enables support for Sophgo SoC platform hardware.
> +
> config ARCH_STARFIVE
> def_bool SOC_STARFIVE
>