From: Shravan Chippa <[email protected]>
Changes from V3 -> V4:
Removed unnecessary parentheses and extra space
Added review tags
Changes from V2 -> V3:
Removed whitespace
Change naming convention of the macros (modified code as per new macros)
updated with new API device_get_match_data()
modified dt-bindings as per the commmets from v2
modified compatible name string for mpfs platform
Changes from V1 -> V2:
Removed internal review tags
Commit massages modified.
Added devicetree patch with new compatible name for mpfs platform
Added of_dma_controller_free() clenup call in sf_pdma_remove() function
V1:
This series does the following
1. Adds a PolarFire SoC specific compatible and code to support for
out-of-order dma transfers
2. Adds generic device tree bindings support by using
of_dma_controller_register()
Shravan Chippa (4):
dmaengine: sf-pdma: Support of_dma_controller_register()
dt-bindings: dma: sf-pdma: add new compatible name
dmaengine: sf-pdma: add mpfs-pdma compatible name
riscv: dts: microchip: add specific compatible for mpfs' pdma
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 1 +
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
drivers/dma/sf-pdma/sf-pdma.c | 71 ++++++++++++++++++-
drivers/dma/sf-pdma/sf-pdma.h | 8 ++-
4 files changed, 77 insertions(+), 5 deletions(-)
--
2.34.1
From: Shravan Chippa <[email protected]>
Add specific compatible for PolarFire SoC for The SiFive PDMA driver
Reviewed-by: Conor Dooley <[email protected]>
Signed-off-by: Shravan Chippa <[email protected]>
---
arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi
index 104504352e99..f43486e9a090 100644
--- a/arch/riscv/boot/dts/microchip/mpfs.dtsi
+++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi
@@ -221,7 +221,7 @@ plic: interrupt-controller@c000000 {
};
pdma: dma-controller@3000000 {
- compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
+ compatible = "microchip,mpfs-pdma", "sifive,pdma0";
reg = <0x0 0x3000000 0x0 0x8000>;
interrupt-parent = <&plic>;
interrupts = <5 6>, <7 8>, <9 10>, <11 12>;
--
2.34.1
From: Shravan Chippa <[email protected]>
Sifive platform dma does not allow out-of-order transfers,
Add a PolarFire SoC specific compatible and code to support
for out-of-order dma transfers
Reviewed-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Shravan Chippa <[email protected]>
---
drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
drivers/dma/sf-pdma/sf-pdma.h | 8 +++++++-
2 files changed, 31 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
index 4c456bdef882..82ab12c40743 100644
--- a/drivers/dma/sf-pdma/sf-pdma.c
+++ b/drivers/dma/sf-pdma/sf-pdma.c
@@ -25,6 +25,8 @@
#include "sf-pdma.h"
+#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
+
#ifndef readq
static inline unsigned long long readq(void __iomem *addr)
{
@@ -66,7 +68,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
u64 dst, u64 src, u64 size)
{
- desc->xfer_type = PDMA_FULL_SPEED;
+ desc->xfer_type = desc->chan->pdma->transfer_type;
desc->xfer_size = size;
desc->dst_addr = dst;
desc->src_addr = src;
@@ -520,6 +522,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
static int sf_pdma_probe(struct platform_device *pdev)
{
+ const struct sf_pdma_driver_platdata *ddata;
struct sf_pdma *pdma;
int ret, n_chans;
const enum dma_slave_buswidth widths =
@@ -545,6 +548,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
pdma->n_chans = n_chans;
+ pdma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
+
+ ddata = device_get_match_data(&pdev->dev);
+ if (ddata) {
+ if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
+ pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
+ }
+
pdma->membase = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(pdma->membase))
return PTR_ERR(pdma->membase);
@@ -632,9 +643,19 @@ static int sf_pdma_remove(struct platform_device *pdev)
return 0;
}
+static const struct sf_pdma_driver_platdata mpfs_pdma = {
+ .quirks = PDMA_QUIRK_NO_STRICT_ORDERING,
+};
+
static const struct of_device_id sf_pdma_dt_ids[] = {
- { .compatible = "sifive,fu540-c000-pdma" },
- { .compatible = "sifive,pdma0" },
+ {
+ .compatible = "sifive,fu540-c000-pdma",
+ }, {
+ .compatible = "sifive,pdma0",
+ }, {
+ .compatible = "microchip,mpfs-pdma",
+ .data = &mpfs_pdma,
+ },
{},
};
MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
index 5c398a83b491..267e79a5e0a5 100644
--- a/drivers/dma/sf-pdma/sf-pdma.h
+++ b/drivers/dma/sf-pdma/sf-pdma.h
@@ -48,7 +48,8 @@
#define PDMA_ERR_STATUS_MASK GENMASK(31, 31)
/* Transfer Type */
-#define PDMA_FULL_SPEED 0xFF000008
+#define PDMA_FULL_SPEED 0xFF000000
+#define PDMA_STRICT_ORDERING BIT(3)
/* Error Recovery */
#define MAX_RETRY 1
@@ -112,8 +113,13 @@ struct sf_pdma {
struct dma_device dma_dev;
void __iomem *membase;
void __iomem *mappedbase;
+ u32 transfer_type;
u32 n_chans;
struct sf_pdma_chan chans[];
};
+struct sf_pdma_driver_platdata {
+ u32 quirks;
+};
+
#endif /* _SF_PDMA_H */
--
2.34.1
Hi,
Gentle ping!
Thanks,
Shravan
> -----Original Message-----
> From: shravan chippa <[email protected]>
> Sent: Tuesday, October 31, 2023 10:58 AM
> To: [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]
> Cc: [email protected]; [email protected]; linux-
> [email protected]; [email protected]; Nagasuresh Relli -
> I67208 <[email protected]>; Praveen Kumar - I30718
> <[email protected]>; shravan Chippa - I35088
> <[email protected]>
> Subject: [PATCH v4 0/4] dma: sf-pdma: various sf-pdma updates for the mpfs
> platform
>
> From: Shravan Chippa <[email protected]>
>
> Changes from V3 -> V4:
>
> Removed unnecessary parentheses and extra space Added review tags
>
> Changes from V2 -> V3:
>
> Removed whitespace
> Change naming convention of the macros (modified code as per new macros)
> updated with new API device_get_match_data() modified dt-bindings as per
> the commmets from v2 modified compatible name string for mpfs platform
>
> Changes from V1 -> V2:
>
> Removed internal review tags
> Commit massages modified.
> Added devicetree patch with new compatible name for mpfs platform Added
> of_dma_controller_free() clenup call in sf_pdma_remove() function
>
> V1:
>
> This series does the following
> 1. Adds a PolarFire SoC specific compatible and code to support for out-of-
> order dma transfers
>
> 2. Adds generic device tree bindings support by using
> of_dma_controller_register()
>
> Shravan Chippa (4):
> dmaengine: sf-pdma: Support of_dma_controller_register()
> dt-bindings: dma: sf-pdma: add new compatible name
> dmaengine: sf-pdma: add mpfs-pdma compatible name
> riscv: dts: microchip: add specific compatible for mpfs' pdma
>
> .../bindings/dma/sifive,fu540-c000-pdma.yaml | 1 +
> arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +-
> drivers/dma/sf-pdma/sf-pdma.c | 71 ++++++++++++++++++-
> drivers/dma/sf-pdma/sf-pdma.h | 8 ++-
> 4 files changed, 77 insertions(+), 5 deletions(-)
>
> --
> 2.34.1
On 31-10-23, 10:57, shravan chippa wrote:
> From: Shravan Chippa <[email protected]>
>
> Sifive platform dma does not allow out-of-order transfers,
> Add a PolarFire SoC specific compatible and code to support
> for out-of-order dma transfers
By default dma xtions are not supposed to be out of order, so why does
it make sense specifying that here?
>
> Reviewed-by: Emil Renner Berthing <[email protected]>
> Signed-off-by: Shravan Chippa <[email protected]>
> ---
> drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> drivers/dma/sf-pdma/sf-pdma.h | 8 +++++++-
> 2 files changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c
> index 4c456bdef882..82ab12c40743 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.c
> +++ b/drivers/dma/sf-pdma/sf-pdma.c
> @@ -25,6 +25,8 @@
>
> #include "sf-pdma.h"
>
> +#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
> +
> #ifndef readq
> static inline unsigned long long readq(void __iomem *addr)
> {
> @@ -66,7 +68,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
> static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> u64 dst, u64 src, u64 size)
> {
> - desc->xfer_type = PDMA_FULL_SPEED;
> + desc->xfer_type = desc->chan->pdma->transfer_type;
> desc->xfer_size = size;
> desc->dst_addr = dst;
> desc->src_addr = src;
> @@ -520,6 +522,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct of_phandle_args *dma_spec,
>
> static int sf_pdma_probe(struct platform_device *pdev)
> {
> + const struct sf_pdma_driver_platdata *ddata;
> struct sf_pdma *pdma;
> int ret, n_chans;
> const enum dma_slave_buswidth widths =
> @@ -545,6 +548,14 @@ static int sf_pdma_probe(struct platform_device *pdev)
>
> pdma->n_chans = n_chans;
>
> + pdma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
> +
> + ddata = device_get_match_data(&pdev->dev);
> + if (ddata) {
> + if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
> + pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
> + }
> +
> pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> if (IS_ERR(pdma->membase))
> return PTR_ERR(pdma->membase);
> @@ -632,9 +643,19 @@ static int sf_pdma_remove(struct platform_device *pdev)
> return 0;
> }
>
> +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> + .quirks = PDMA_QUIRK_NO_STRICT_ORDERING,
> +};
> +
> static const struct of_device_id sf_pdma_dt_ids[] = {
> - { .compatible = "sifive,fu540-c000-pdma" },
> - { .compatible = "sifive,pdma0" },
> + {
> + .compatible = "sifive,fu540-c000-pdma",
> + }, {
> + .compatible = "sifive,pdma0",
> + }, {
> + .compatible = "microchip,mpfs-pdma",
> + .data = &mpfs_pdma,
> + },
> {},
> };
> MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> diff --git a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index 5c398a83b491..267e79a5e0a5 100644
> --- a/drivers/dma/sf-pdma/sf-pdma.h
> +++ b/drivers/dma/sf-pdma/sf-pdma.h
> @@ -48,7 +48,8 @@
> #define PDMA_ERR_STATUS_MASK GENMASK(31, 31)
>
> /* Transfer Type */
> -#define PDMA_FULL_SPEED 0xFF000008
> +#define PDMA_FULL_SPEED 0xFF000000
> +#define PDMA_STRICT_ORDERING BIT(3)
>
> /* Error Recovery */
> #define MAX_RETRY 1
> @@ -112,8 +113,13 @@ struct sf_pdma {
> struct dma_device dma_dev;
> void __iomem *membase;
> void __iomem *mappedbase;
> + u32 transfer_type;
> u32 n_chans;
> struct sf_pdma_chan chans[];
> };
>
> +struct sf_pdma_driver_platdata {
> + u32 quirks;
> +};
> +
> #endif /* _SF_PDMA_H */
> --
> 2.34.1
--
~Vinod
Hi Vinod,
> -----Original Message-----
> From: Vinod Koul <[email protected]>
> Sent: Friday, November 24, 2023 5:42 PM
> To: shravan Chippa - I35088 <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]; [email protected]; Nagasuresh Relli -
> I67208 <[email protected]>; Praveen Kumar - I30718
> <[email protected]>; Emil Renner Berthing
> <[email protected]>
> Subject: Re: [PATCH v4 3/4] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
>
> [Some people who received this message don't often get email from
> [email protected]. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On 31-10-23, 10:57, shravan chippa wrote:
> > From: Shravan Chippa <[email protected]>
> >
> > Sifive platform dma does not allow out-of-order transfers, Add a
> > PolarFire SoC specific compatible and code to support for out-of-order
> > dma transfers
>
> By default dma xtions are not supposed to be out of order, so why does it
> make sense specifying that here?
All the DMA transfers are mostly in-order; however, sf-pdma IP has programable configuration:
we can select the transfer type either in-order or out-of-order.
Sf-pdam IP will only support mem-to-mem transfers.
We got better throughput in the PolarFire SoC platform if we use out-of-order DMA transfers type, instead of in-order configuration in the sf-pdma IP.
test results for in-order:
- moved 16 MB from 0x89000000 using pdmacpy to 0x88000000 (chan: 0) in 0.068962 secs (232.012 MB per sec)
test results for out-of-order:
- moved 16 MB from 0x89000000 using pdmacpy to 0x88000000 (chan: 0) in 0.037020 secs (432.199 MB per sec)
Thanks,
Shravan
>
> >
> > Reviewed-by: Emil Renner Berthing <[email protected]>
> > Signed-off-by: Shravan Chippa <[email protected]>
> > ---
> > drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h | 8 +++++++-
> > 2 files changed, 31 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index 4c456bdef882..82ab12c40743
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -25,6 +25,8 @@
> >
> > #include "sf-pdma.h"
> >
> > +#define PDMA_QUIRK_NO_STRICT_ORDERING BIT(0)
> > +
> > #ifndef readq
> > static inline unsigned long long readq(void __iomem *addr) { @@
> > -66,7 +68,7 @@ static struct sf_pdma_desc *sf_pdma_alloc_desc(struct
> > sf_pdma_chan *chan) static void sf_pdma_fill_desc(struct sf_pdma_desc
> *desc,
> > u64 dst, u64 src, u64 size) {
> > - desc->xfer_type = PDMA_FULL_SPEED;
> > + desc->xfer_type = desc->chan->pdma->transfer_type;
> > desc->xfer_size = size;
> > desc->dst_addr = dst;
> > desc->src_addr = src;
> > @@ -520,6 +522,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> > of_phandle_args *dma_spec,
> >
> > static int sf_pdma_probe(struct platform_device *pdev) {
> > + const struct sf_pdma_driver_platdata *ddata;
> > struct sf_pdma *pdma;
> > int ret, n_chans;
> > const enum dma_slave_buswidth widths = @@ -545,6 +548,14 @@
> > static int sf_pdma_probe(struct platform_device *pdev)
> >
> > pdma->n_chans = n_chans;
> >
> > + pdma->transfer_type = PDMA_FULL_SPEED | PDMA_STRICT_ORDERING;
> > +
> > + ddata = device_get_match_data(&pdev->dev);
> > + if (ddata) {
> > + if (ddata->quirks & PDMA_QUIRK_NO_STRICT_ORDERING)
> > + pdma->transfer_type &= ~PDMA_STRICT_ORDERING;
> > + }
> > +
> > pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(pdma->membase))
> > return PTR_ERR(pdma->membase); @@ -632,9 +643,19 @@
> > static int sf_pdma_remove(struct platform_device *pdev)
> > return 0;
> > }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > + .quirks = PDMA_QUIRK_NO_STRICT_ORDERING, };
> > +
> > static const struct of_device_id sf_pdma_dt_ids[] = {
> > - { .compatible = "sifive,fu540-c000-pdma" },
> > - { .compatible = "sifive,pdma0" },
> > + {
> > + .compatible = "sifive,fu540-c000-pdma",
> > + }, {
> > + .compatible = "sifive,pdma0",
> > + }, {
> > + .compatible = "microchip,mpfs-pdma",
> > + .data = &mpfs_pdma,
> > + },
> > {},
> > };
> > MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids); diff --git
> > a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index
> > 5c398a83b491..267e79a5e0a5 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -48,7 +48,8 @@
> > #define PDMA_ERR_STATUS_MASK GENMASK(31, 31)
> >
> > /* Transfer Type */
> > -#define PDMA_FULL_SPEED 0xFF000008
> > +#define PDMA_FULL_SPEED 0xFF000000
> > +#define PDMA_STRICT_ORDERING BIT(3)
> >
> > /* Error Recovery */
> > #define MAX_RETRY 1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> > struct dma_device dma_dev;
> > void __iomem *membase;
> > void __iomem *mappedbase;
> > + u32 transfer_type;
> > u32 n_chans;
> > struct sf_pdma_chan chans[];
> > };
> >
> > +struct sf_pdma_driver_platdata {
> > + u32 quirks;
> > +};
> > +
> > #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
>
> --
> ~Vinod