pci1xxxx is a PCIe switch with a multi-function endpoint on one of its
downstream ports. Quad-uart is one of the functions in the multi-function
endpoint. This patch adds device driver for the quad-uart function and
enumerates between 1 to 4 instances of uarts based on the PCIe subsystem
device ID.
The changes from v1->v2->v3->v4->v5->v6 are mentioned in each patch in
the patchset.
Thanks to Andy Shevchenko, Ilpo Jarvinen, Chritophe JAILLET, Geert
Uytterhoeven, Greg KH for their review comments.
Kumaravel Thiagarajan (4):
serial: 8250_pci: Add serial8250_pci_setup_port definition in
8250_pcilib.c
serial: 8250_pci1xxxx: Add driver for quad-uart support.
serial: 8250_pci1xxxx: Add RS485 support to quad-uart driver
serial: 8250_pci1xxxx: Add power management functions to quad-uart
driver
MAINTAINERS | 7 +
drivers/tty/serial/8250/8250_pci.c | 24 +-
drivers/tty/serial/8250/8250_pci1xxxx.c | 463 ++++++++++++++++++++++++
drivers/tty/serial/8250/8250_pcilib.c | 38 ++
drivers/tty/serial/8250/8250_pcilib.h | 9 +
drivers/tty/serial/8250/8250_port.c | 8 +
drivers/tty/serial/8250/Kconfig | 15 +
drivers/tty/serial/8250/Makefile | 2 +
include/uapi/linux/serial_core.h | 3 +
9 files changed, 547 insertions(+), 22 deletions(-)
create mode 100644 drivers/tty/serial/8250/8250_pci1xxxx.c
create mode 100644 drivers/tty/serial/8250/8250_pcilib.c
create mode 100644 drivers/tty/serial/8250/8250_pcilib.h
--
2.25.1
Move implementation of setup_port API to serial8250_pci_setup_port
Co-developed-by: Tharun Kumar P <[email protected]>
Signed-off-by: Tharun Kumar P <[email protected]>
Signed-off-by: Kumaravel Thiagarajan <[email protected]>
---
Changes in v6:
- Made this patch first patch of the patch series
Changes in v5:
- This is the new patch added in v5 version of this patchset
- Moved implementation of setup_port from 8250_pci.c to 8250_pcilib.c
---
drivers/tty/serial/8250/8250_pci.c | 24 ++---------------
drivers/tty/serial/8250/8250_pcilib.c | 38 +++++++++++++++++++++++++++
drivers/tty/serial/8250/8250_pcilib.h | 9 +++++++
drivers/tty/serial/8250/Kconfig | 4 +++
drivers/tty/serial/8250/Makefile | 1 +
5 files changed, 54 insertions(+), 22 deletions(-)
create mode 100644 drivers/tty/serial/8250/8250_pcilib.c
create mode 100644 drivers/tty/serial/8250/8250_pcilib.h
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index 6f66dc2ebacc..69ff367b08de 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -24,6 +24,7 @@
#include <asm/io.h>
#include "8250.h"
+#include "8250_pcilib.h"
/*
* init function returns:
@@ -89,28 +90,7 @@ static int
setup_port(struct serial_private *priv, struct uart_8250_port *port,
u8 bar, unsigned int offset, int regshift)
{
- struct pci_dev *dev = priv->dev;
-
- if (bar >= PCI_STD_NUM_BARS)
- return -EINVAL;
-
- if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) {
- if (!pcim_iomap(dev, bar, 0) && !pcim_iomap_table(dev))
- return -ENOMEM;
-
- port->port.iotype = UPIO_MEM;
- port->port.iobase = 0;
- port->port.mapbase = pci_resource_start(dev, bar) + offset;
- port->port.membase = pcim_iomap_table(dev)[bar] + offset;
- port->port.regshift = regshift;
- } else {
- port->port.iotype = UPIO_PORT;
- port->port.iobase = pci_resource_start(dev, bar) + offset;
- port->port.mapbase = 0;
- port->port.membase = NULL;
- port->port.regshift = 0;
- }
- return 0;
+ return serial8250_pci_setup_port(priv->dev, port, bar, offset, regshift);
}
/*
diff --git a/drivers/tty/serial/8250/8250_pcilib.c b/drivers/tty/serial/8250/8250_pcilib.c
new file mode 100644
index 000000000000..e5a4a9b22c81
--- /dev/null
+++ b/drivers/tty/serial/8250/8250_pcilib.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * 8250 PCI library.
+ *
+ * Copyright (C) 2001 Russell King, All Rights Reserved.
+ */
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+
+#include "8250.h"
+
+int serial8250_pci_setup_port(struct pci_dev *dev, struct uart_8250_port *port,
+ u8 bar, unsigned int offset, int regshift)
+{
+ if (bar >= PCI_STD_NUM_BARS)
+ return -EINVAL;
+
+ if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) {
+ if (!pcim_iomap(dev, bar, 0) && !pcim_iomap_table(dev))
+ return -ENOMEM;
+
+ port->port.iotype = UPIO_MEM;
+ port->port.iobase = 0;
+ port->port.mapbase = pci_resource_start(dev, bar) + offset;
+ port->port.membase = pcim_iomap_table(dev)[bar] + offset;
+ port->port.regshift = regshift;
+ } else {
+ port->port.iotype = UPIO_PORT;
+ port->port.iobase = pci_resource_start(dev, bar) + offset;
+ port->port.mapbase = 0;
+ port->port.membase = NULL;
+ port->port.regshift = 0;
+ }
+ return 0;
+}
+EXPORT_SYMBOL_GPL(serial8250_pci_setup_port);
diff --git a/drivers/tty/serial/8250/8250_pcilib.h b/drivers/tty/serial/8250/8250_pcilib.h
new file mode 100644
index 000000000000..41ef01d5c3c5
--- /dev/null
+++ b/drivers/tty/serial/8250/8250_pcilib.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * 8250 PCI library header file.
+ *
+ * Copyright (C) 2001 Russell King, All Rights Reserved.
+ */
+
+int serial8250_pci_setup_port(struct pci_dev *dev, struct uart_8250_port *port, u8 bar,
+ unsigned int offset, int regshift);
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig
index d0b49e15fbf5..3088eaff3ad0 100644
--- a/drivers/tty/serial/8250/Kconfig
+++ b/drivers/tty/serial/8250/Kconfig
@@ -132,6 +132,7 @@ config SERIAL_8250_DMA
config SERIAL_8250_PCI
tristate "8250/16550 PCI device support"
depends on SERIAL_8250 && PCI
+ select SERIAL_8250_PCILIB
default SERIAL_8250
help
This builds standard PCI serial support. You may be able to
@@ -500,6 +501,9 @@ config SERIAL_8250_MID
Intel Medfield SOC and various other Intel platforms that is not
covered by the more generic SERIAL_8250_PCI option.
+config SERIAL_8250_PCILIB
+ bool
+
config SERIAL_8250_PERICOM
tristate "Support for Pericom and Acces I/O serial ports"
default SERIAL_8250
diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile
index bee908f99ea0..b9179d1f104b 100644
--- a/drivers/tty/serial/8250/Makefile
+++ b/drivers/tty/serial/8250/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_SERIAL_8250) += 8250.o 8250_base.o
8250_base-$(CONFIG_SERIAL_8250_DMA) += 8250_dma.o
8250_base-$(CONFIG_SERIAL_8250_DWLIB) += 8250_dwlib.o
8250_base-$(CONFIG_SERIAL_8250_FINTEK) += 8250_fintek.o
+8250_base-$(CONFIG_SERIAL_8250_PCILIB) += 8250_pcilib.o
obj-$(CONFIG_SERIAL_8250_GSC) += 8250_gsc.o
obj-$(CONFIG_SERIAL_8250_PCI) += 8250_pci.o
obj-$(CONFIG_SERIAL_8250_EXAR) += 8250_exar.o
--
2.25.1
pci1xxxx uart supports RS485 mode of operation in the hardware with
auto-direction control with configurable delay for releasing RTS after
the transmission. This patch adds support for the RS485 mode.
Co-developed-by: Tharun Kumar P <[email protected]>
Signed-off-by: Tharun Kumar P <[email protected]>
Signed-off-by: Kumaravel Thiagarajan <[email protected]>
---
Changes in v6:
- Modified datatype of delay_in_baud_periods to u64 to avoid overflows
Changes in v5:
- Removed unnecessary assignments
- Corrected styling issues in comments
Changes in v4:
- No Change
Changes in v3:
- Remove flags sanitization in driver which is taken care in core
Changes in v2:
- move pci1xxxx_rs485_config to a separate patch with
pci1xxxx_rs485_supported.
---
drivers/tty/serial/8250/8250_pci1xxxx.c | 49 +++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/tty/serial/8250/8250_pci1xxxx.c b/drivers/tty/serial/8250/8250_pci1xxxx.c
index d5037e76b636..7585066d6baf 100644
--- a/drivers/tty/serial/8250/8250_pci1xxxx.c
+++ b/drivers/tty/serial/8250/8250_pci1xxxx.c
@@ -145,6 +145,53 @@ static void pci1xxxx_set_divisor(struct uart_port *port, unsigned int baud,
port->membase + UART_BAUD_CLK_DIVISOR_REG);
}
+static int pci1xxxx_rs485_config(struct uart_port *port,
+ struct ktermios *termios,
+ struct serial_rs485 *rs485)
+{
+ u32 clock_div = readl(port->membase + UART_BAUD_CLK_DIVISOR_REG);
+ u64 delay_in_baud_periods;
+ u32 baud_period_in_ns;
+ u32 data = 0;
+
+ /*
+ * pci1xxxx's uart hardware supports only RTS delay after
+ * Tx and in units of bit times to a maximum of 15
+ */
+ if (rs485->flags & SER_RS485_ENABLED) {
+ data = ADCL_CFG_EN | ADCL_CFG_PIN_SEL;
+
+ if (!(rs485->flags & SER_RS485_RTS_ON_SEND))
+ data |= ADCL_CFG_POL_SEL;
+
+ if (rs485->delay_rts_after_send) {
+ baud_period_in_ns =
+ FIELD_GET(BAUD_CLOCK_DIV_INT_MSK, clock_div) *
+ UART_BIT_SAMPLE_CNT;
+ delay_in_baud_periods =
+ rs485->delay_rts_after_send * NSEC_PER_MSEC /
+ baud_period_in_ns;
+ delay_in_baud_periods =
+ min_t(u64, delay_in_baud_periods,
+ FIELD_MAX(ADCL_CFG_RTS_DELAY_MASK));
+ data |= FIELD_PREP(ADCL_CFG_RTS_DELAY_MASK,
+ delay_in_baud_periods);
+ rs485->delay_rts_after_send =
+ baud_period_in_ns * delay_in_baud_periods /
+ NSEC_PER_MSEC;
+ }
+ }
+ writel(data, port->membase + ADCL_CFG_REG);
+ return 0;
+}
+
+static const struct serial_rs485 pci1xxxx_rs485_supported = {
+ .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
+ SER_RS485_RTS_AFTER_SEND,
+ .delay_rts_after_send = 1,
+ /* Delay RTS before send is not supported */
+};
+
static int pci1xxxx_setup(struct pci1xxxx_8250 *priv,
struct uart_8250_port *port, int port_idx)
{
@@ -155,6 +202,8 @@ static int pci1xxxx_setup(struct pci1xxxx_8250 *priv,
port->port.set_termios = serial8250_do_set_termios;
port->port.get_divisor = pci1xxxx_get_divisor;
port->port.set_divisor = pci1xxxx_set_divisor;
+ port->port.rs485_config = pci1xxxx_rs485_config;
+ port->port.rs485_supported = pci1xxxx_rs485_supported;
ret = serial8250_pci_setup_port(priv->pdev, port, 0, port_idx * 256, 0);
if (ret < 0)
--
2.25.1
On Thu, 1 Dec 2022, Kumaravel Thiagarajan wrote:
> Move implementation of setup_port API to serial8250_pci_setup_port
>
> Co-developed-by: Tharun Kumar P <[email protected]>
> Signed-off-by: Tharun Kumar P <[email protected]>
> Signed-off-by: Kumaravel Thiagarajan <[email protected]>
> ---
> Changes in v6:
> - Made this patch first patch of the patch series
>
> Changes in v5:
> - This is the new patch added in v5 version of this patchset
> - Moved implementation of setup_port from 8250_pci.c to 8250_pcilib.c
>
> ---
> diff --git a/drivers/tty/serial/8250/8250_pcilib.h b/drivers/tty/serial/8250/8250_pcilib.h
> new file mode 100644
> index 000000000000..41ef01d5c3c5
> --- /dev/null
> +++ b/drivers/tty/serial/8250/8250_pcilib.h
> @@ -0,0 +1,9 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * 8250 PCI library header file.
> + *
> + * Copyright (C) 2001 Russell King, All Rights Reserved.
> + */
You shouldn't depend on .c file having things included for you. So
please add these:
#include "8250.h"
struct pci_dev;
Other than that,
Reviewed-by: Ilpo J?rvinen <[email protected]>
> +
> +int serial8250_pci_setup_port(struct pci_dev *dev, struct uart_8250_port *port, u8 bar,
> + unsigned int offset, int regshift);
--
i.
On Thu, 1 Dec 2022, Kumaravel Thiagarajan wrote:
> pci1xxxx uart supports RS485 mode of operation in the hardware with
> auto-direction control with configurable delay for releasing RTS after
> the transmission. This patch adds support for the RS485 mode.
>
> Co-developed-by: Tharun Kumar P <[email protected]>
> Signed-off-by: Tharun Kumar P <[email protected]>
> Signed-off-by: Kumaravel Thiagarajan <[email protected]>
> ---
> Changes in v6:
> - Modified datatype of delay_in_baud_periods to u64 to avoid overflows
>
> Changes in v5:
> - Removed unnecessary assignments
> - Corrected styling issues in comments
>
> Changes in v4:
> - No Change
>
> Changes in v3:
> - Remove flags sanitization in driver which is taken care in core
>
> Changes in v2:
> - move pci1xxxx_rs485_config to a separate patch with
> pci1xxxx_rs485_supported.
> ---
> drivers/tty/serial/8250/8250_pci1xxxx.c | 49 +++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/tty/serial/8250/8250_pci1xxxx.c b/drivers/tty/serial/8250/8250_pci1xxxx.c
> index d5037e76b636..7585066d6baf 100644
> --- a/drivers/tty/serial/8250/8250_pci1xxxx.c
> +++ b/drivers/tty/serial/8250/8250_pci1xxxx.c
> @@ -145,6 +145,53 @@ static void pci1xxxx_set_divisor(struct uart_port *port, unsigned int baud,
> port->membase + UART_BAUD_CLK_DIVISOR_REG);
> }
>
> +static int pci1xxxx_rs485_config(struct uart_port *port,
> + struct ktermios *termios,
> + struct serial_rs485 *rs485)
> +{
> + u32 clock_div = readl(port->membase + UART_BAUD_CLK_DIVISOR_REG);
Maybe move this into the block where it's needed?
> + u64 delay_in_baud_periods;
> + u32 baud_period_in_ns;
> + u32 data = 0;
data seems a bit too generic name for a variable? At minimum I'd suggest
using cfg or mode_cfg (I couldn't guess where ADCL comes from, perhaps it
has some component which would make the variable name better).
> +
> + /*
> + * pci1xxxx's uart hardware supports only RTS delay after
> + * Tx and in units of bit times to a maximum of 15
> + */
> + if (rs485->flags & SER_RS485_ENABLED) {
> + data = ADCL_CFG_EN | ADCL_CFG_PIN_SEL;
> +
> + if (!(rs485->flags & SER_RS485_RTS_ON_SEND))
> + data |= ADCL_CFG_POL_SEL;
> +
> + if (rs485->delay_rts_after_send) {
> + baud_period_in_ns =
> + FIELD_GET(BAUD_CLOCK_DIV_INT_MSK, clock_div) *
> + UART_BIT_SAMPLE_CNT;
> + delay_in_baud_periods =
> + rs485->delay_rts_after_send * NSEC_PER_MSEC /
> + baud_period_in_ns;
> + delay_in_baud_periods =
> + min_t(u64, delay_in_baud_periods,
> + FIELD_MAX(ADCL_CFG_RTS_DELAY_MASK));
> + data |= FIELD_PREP(ADCL_CFG_RTS_DELAY_MASK,
> + delay_in_baud_periods);
> + rs485->delay_rts_after_send =
> + baud_period_in_ns * delay_in_baud_periods /
> + NSEC_PER_MSEC;
> + }
> + }
> + writel(data, port->membase + ADCL_CFG_REG);
> + return 0;
> +}
> +
> +static const struct serial_rs485 pci1xxxx_rs485_supported = {
> + .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
> + SER_RS485_RTS_AFTER_SEND,
> + .delay_rts_after_send = 1,
> + /* Delay RTS before send is not supported */
> +};
> +
> static int pci1xxxx_setup(struct pci1xxxx_8250 *priv,
> struct uart_8250_port *port, int port_idx)
> {
> @@ -155,6 +202,8 @@ static int pci1xxxx_setup(struct pci1xxxx_8250 *priv,
> port->port.set_termios = serial8250_do_set_termios;
> port->port.get_divisor = pci1xxxx_get_divisor;
> port->port.set_divisor = pci1xxxx_set_divisor;
> + port->port.rs485_config = pci1xxxx_rs485_config;
> + port->port.rs485_supported = pci1xxxx_rs485_supported;
>
> ret = serial8250_pci_setup_port(priv->pdev, port, 0, port_idx * 256, 0);
> if (ret < 0)
>
Reviewed-by: Ilpo J?rvinen <[email protected]>
--
i.
On Thu, Dec 01, 2022 at 11:06:53AM +0200, Ilpo J?rvinen wrote:
> On Thu, 1 Dec 2022, Kumaravel Thiagarajan wrote:
...
> > +/*
> > + * 8250 PCI library header file.
> > + *
> > + * Copyright (C) 2001 Russell King, All Rights Reserved.
> > + */
>
> You shouldn't depend on .c file having things included for you. So
> please add these:
> #include "8250.h"
TBH I don't see how this is used here, but types.h for sure is missing.
> struct pci_dev;
+ blank line
struct uart_8250_port;
> Other than that,
> Reviewed-by: Ilpo J?rvinen <[email protected]>
>
> > +int serial8250_pci_setup_port(struct pci_dev *dev, struct uart_8250_port *port, u8 bar,
> > + unsigned int offset, int regshift);
--
With Best Regards,
Andy Shevchenko
On Thu, Dec 01, 2022 at 10:21:43AM +0530, Kumaravel Thiagarajan wrote:
> Move implementation of setup_port API to serial8250_pci_setup_port
We refer to the functions as func().
Moreover the grammatical period is what each end of sentence should have.
> +EXPORT_SYMBOL_GPL(serial8250_pci_setup_port);
Make it namespaced from day 1.
SERIAL_8250_PCI would be good name for symbol namespaces.
--
With Best Regards,
Andy Shevchenko
> From: Andy Shevchenko <[email protected]>
> Sent: Thursday, December 1, 2022 5:42 PM
> To: Ilpo J?rvinen <[email protected]>
> Subject: Re: [PATCH v6 tty-next 1/4] serial: 8250_pci: Add
> serial8250_pci_setup_port definition in 8250_pcilib.c
>
> > struct pci_dev;
>
> + blank line
>
> struct uart_8250_port;
Hi Andy,
Is the blank line required here?
Thanks,
Tharun Kumar P
On Tue, Dec 06, 2022 at 07:09:29PM +0000, [email protected] wrote:
> > From: Andy Shevchenko <[email protected]>
> > Sent: Thursday, December 1, 2022 5:42 PM
> > > struct pci_dev;
> >
> > + blank line
> >
> > struct uart_8250_port;
>
> Is the blank line required here?
Strictly speaking no, it's not required. But it shows the group of generic
forward declarations and specific to the topic (driver / subsystem).
--
With Best Regards,
Andy Shevchenko
> -----Original Message-----
> From: Ilpo J?rvinen <[email protected]>
> Sent: Thursday, December 1, 2022 3:17 PM
> To: Kumaravel Thiagarajan - I21417 <[email protected]>
> Subject: Re: [PATCH v6 tty-next 3/4] serial: 8250_pci1xxxx: Add RS485
> support to quad-uart driver
>
> On Thu, 1 Dec 2022, Kumaravel Thiagarajan wrote:
>
> > pci1xxxx uart supports RS485 mode of operation in the hardware with
> > auto-direction control with configurable delay for releasing RTS after
> > the transmission. This patch adds support for the RS485 mode.
> >
> >
> > +static int pci1xxxx_rs485_config(struct uart_port *port,
> > + struct ktermios *termios,
> > + struct serial_rs485 *rs485) {
> > + u32 clock_div = readl(port->membase +
> > +UART_BAUD_CLK_DIVISOR_REG);
>
> Maybe move this into the block where it's needed?
>
> > + u64 delay_in_baud_periods;
> > + u32 baud_period_in_ns;
> > + u32 data = 0;
>
> data seems a bit too generic name for a variable? At minimum I'd suggest
> using cfg or mode_cfg (I couldn't guess where ADCL comes from, perhaps it
> has some component which would make the variable name better).
Hi Ilpo,
We just noticed after submitting v7 that this email of yours got forwarded to spam folder by our IT infrastructure automatically and we missed it.
We will take care of this in v8.
Thank You.
Regards,
Kumar