2023-06-22 01:15:29

by Ilkka Koskinen

[permalink] [raw]
Subject: [PATCH 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit writes

Split the 64-bit register accesses if 64-bit access is not supported
by the PMU.

Signed-off-by: Ilkka Koskinen <[email protected]>
---
drivers/perf/arm_cspmu/arm_cspmu.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c
index e2b7827c4563..0f517152cb4e 100644
--- a/drivers/perf/arm_cspmu/arm_cspmu.c
+++ b/drivers/perf/arm_cspmu/arm_cspmu.c
@@ -696,7 +696,10 @@ static void arm_cspmu_write_counter(struct perf_event *event, u64 val)
if (use_64b_counter_reg(cspmu)) {
offset = counter_offset(sizeof(u64), event->hw.idx);

- writeq(val, cspmu->base1 + offset);
+ if (cspmu->has_atomic_dword)
+ writeq(val, cspmu->base1 + offset);
+ else
+ lo_hi_writeq(val, cspmu->base1 + offset);
} else {
offset = counter_offset(sizeof(u32), event->hw.idx);

--
2.40.1



2023-06-22 11:04:29

by Besar Wicaksono

[permalink] [raw]
Subject: RE: [PATCH 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit writes



> -----Original Message-----
> From: Ilkka Koskinen <[email protected]>
> Sent: Thursday, June 22, 2023 8:12 AM
> To: Will Deacon <[email protected]>; Robin Murphy <[email protected]>;
> Besar Wicaksono <[email protected]>; Suzuki K Poulose
> <[email protected]>; Mark Rutland <[email protected]>
> Cc: Ilkka Koskinen <[email protected]>; linux-arm-
> [email protected]; [email protected]
> Subject: [PATCH 1/4] perf: arm_cspmu: Split 64-bit write to 32-bit writes
>
> External email: Use caution opening links or attachments
>
>
> Split the 64-bit register accesses if 64-bit access is not supported
> by the PMU.
>
> Signed-off-by: Ilkka Koskinen <[email protected]>

Reviewed-by: Besar Wicaksono <[email protected]>

Thanks,
Besar

> ---
> drivers/perf/arm_cspmu/arm_cspmu.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c
> b/drivers/perf/arm_cspmu/arm_cspmu.c
> index e2b7827c4563..0f517152cb4e 100644
> --- a/drivers/perf/arm_cspmu/arm_cspmu.c
> +++ b/drivers/perf/arm_cspmu/arm_cspmu.c
> @@ -696,7 +696,10 @@ static void arm_cspmu_write_counter(struct
> perf_event *event, u64 val)
> if (use_64b_counter_reg(cspmu)) {
> offset = counter_offset(sizeof(u64), event->hw.idx);
>
> - writeq(val, cspmu->base1 + offset);
> + if (cspmu->has_atomic_dword)
> + writeq(val, cspmu->base1 + offset);
> + else
> + lo_hi_writeq(val, cspmu->base1 + offset);
> } else {
> offset = counter_offset(sizeof(u32), event->hw.idx);
>
> --
> 2.40.1