From: Kieran Bingham <[email protected]>
Provide the display output using the sn65dsi86 MIPI DSI bridge.
Signed-off-by: Kieran Bingham <[email protected]>
---
.../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
index a0a1a1da0d87..5530bb82de6b 100644
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
@@ -66,6 +66,15 @@ memory@700000000 {
reg = <0x7 0x00000000 0x0 0x80000000>;
};
+ reg_1p2v: regulator-1p2v {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.2V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@@ -83,6 +92,46 @@ reg_3p3v: regulator-3p3v {
regulator-boot-on;
regulator-always-on;
};
+
+ mini-dp-con {
+ compatible = "dp-connector";
+ label = "CN5";
+ type = "mini";
+
+ port {
+ mini_dp_con_in: endpoint {
+ remote-endpoint = <&sn65dsi86_out>;
+ };
+ };
+ };
+
+ sn65dsi86_refclk: sn65dsi86-refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <38400000>;
+ };
+};
+
+&dsi0 {
+ status = "okay";
+
+ clocks = <&cpg CPG_MOD 415>,
+ <&cpg CPG_CORE R8A779A0_CLK_DSI>,
+ <&extal_clk>;
+ clock-names = "fck", "dsi", "extal";
+
+ ports {
+ port@1 {
+ endpoint {
+ remote-endpoint = <&sn65dsi86_in>;
+ data-lanes = <1 2 3 4>;
+ };
+ };
+ };
+};
+
+&du {
+ status = "okay";
};
&extal_clk {
@@ -114,6 +163,41 @@ &i2c1 {
status = "okay";
clock-frequency = <400000>;
+
+ sn65dsi86@2c {
+ compatible = "ti,sn65dsi86";
+ reg = <0x2c>;
+
+ clocks = <&sn65dsi86_refclk>;
+ clock-names = "refclk";
+
+ interrupt-parent = <&gpio1>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+
+ vccio-supply = <®_1p8v>;
+ vpll-supply = <®_1p8v>;
+ vcca-supply = <®_1p2v>;
+ vcc-supply = <®_1p2v>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ sn65dsi86_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ sn65dsi86_out: endpoint {
+ remote-endpoint = <&mini_dp_con_in>;
+ };
+ };
+ };
+ };
};
&i2c6 {
--
2.30.2
Hi Kieran,
On Thu, Sep 2, 2021 at 1:53 AM Kieran Bingham
<[email protected]> wrote:
> From: Kieran Bingham <[email protected]>
>
> Provide the display output using the sn65dsi86 MIPI DSI bridge.
>
> Signed-off-by: Kieran Bingham <[email protected]>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> @@ -66,6 +66,15 @@ memory@700000000 {
> reg = <0x7 0x00000000 0x0 0x80000000>;
> };
>
> + reg_1p2v: regulator-1p2v {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-1.2V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> reg_1p8v: regulator-1p8v {
> compatible = "regulator-fixed";
> regulator-name = "fixed-1.8V";
> @@ -83,6 +92,46 @@ reg_3p3v: regulator-3p3v {
> regulator-boot-on;
> regulator-always-on;
> };
> +
> + mini-dp-con {
> + compatible = "dp-connector";
> + label = "CN5";
> + type = "mini";
> +
> + port {
> + mini_dp_con_in: endpoint {
> + remote-endpoint = <&sn65dsi86_out>;
> + };
> + };
> + };
> +
> + sn65dsi86_refclk: sn65dsi86-refclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <38400000>;
> + };
> +};
> +
> +&dsi0 {
> + status = "okay";
> +
> + clocks = <&cpg CPG_MOD 415>,
> + <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> + <&extal_clk>;
> + clock-names = "fck", "dsi", "extal";
Ah, that's where the third clock was hiding ;-)
Is this hardwired to extal, or board-specific?
In case of the former, I think it should be moved to the .dtsi.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hello,
On Tue, Sep 21, 2021 at 05:59:24PM +0200, Geert Uytterhoeven wrote:
> On Thu, Sep 2, 2021 at 1:53 AM Kieran Bingham wrote:
> > From: Kieran Bingham <[email protected]>
> >
> > Provide the display output using the sn65dsi86 MIPI DSI bridge.
> >
> > Signed-off-by: Kieran Bingham <[email protected]>
>
> Thanks for your patch!
>
> > --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> > @@ -66,6 +66,15 @@ memory@700000000 {
> > reg = <0x7 0x00000000 0x0 0x80000000>;
> > };
> >
> > + reg_1p2v: regulator-1p2v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "fixed-1.2V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > reg_1p8v: regulator-1p8v {
> > compatible = "regulator-fixed";
> > regulator-name = "fixed-1.8V";
> > @@ -83,6 +92,46 @@ reg_3p3v: regulator-3p3v {
> > regulator-boot-on;
> > regulator-always-on;
> > };
> > +
> > + mini-dp-con {
> > + compatible = "dp-connector";
> > + label = "CN5";
> > + type = "mini";
> > +
> > + port {
> > + mini_dp_con_in: endpoint {
> > + remote-endpoint = <&sn65dsi86_out>;
> > + };
> > + };
> > + };
> > +
> > + sn65dsi86_refclk: sn65dsi86-refclk {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <38400000>;
> > + };
> > +};
> > +
> > +&dsi0 {
> > + status = "okay";
> > +
> > + clocks = <&cpg CPG_MOD 415>,
> > + <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> > + <&extal_clk>;
> > + clock-names = "fck", "dsi", "extal";
>
> Ah, that's where the third clock was hiding ;-)
>
> Is this hardwired to extal, or board-specific?
> In case of the former, I think it should be moved to the .dtsi.
I think this is actually incorrect. The clock name, according to the
bindings, is "pll", and it's documented as a 16.66MHz PLL reference
clock. It comes from the CPG, but I'm not sure which clock it actually
is.
--
Regards,
Laurent Pinchart
Hi Kieran,
Thank you for the patch.
On Thu, Sep 02, 2021 at 12:53:30AM +0100, Kieran Bingham wrote:
> From: Kieran Bingham <[email protected]>
>
> Provide the display output using the sn65dsi86 MIPI DSI bridge.
>
> Signed-off-by: Kieran Bingham <[email protected]>
> ---
> .../boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 84 +++++++++++++++++++
> 1 file changed, 84 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> index a0a1a1da0d87..5530bb82de6b 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi
> @@ -66,6 +66,15 @@ memory@700000000 {
> reg = <0x7 0x00000000 0x0 0x80000000>;
> };
>
> + reg_1p2v: regulator-1p2v {
> + compatible = "regulator-fixed";
> + regulator-name = "fixed-1.2V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
1.8V is a weird voltage for a 1.2V regulator :-)
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> reg_1p8v: regulator-1p8v {
> compatible = "regulator-fixed";
> regulator-name = "fixed-1.8V";
> @@ -83,6 +92,46 @@ reg_3p3v: regulator-3p3v {
> regulator-boot-on;
> regulator-always-on;
> };
> +
> + mini-dp-con {
> + compatible = "dp-connector";
> + label = "CN5";
> + type = "mini";
> +
> + port {
> + mini_dp_con_in: endpoint {
> + remote-endpoint = <&sn65dsi86_out>;
> + };
> + };
> + };
> +
> + sn65dsi86_refclk: sn65dsi86-refclk {
I'd name the node x6-clk after the components on the board (or clk-x6).
The label can stay the same, up to you.
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <38400000>;
> + };
> +};
> +
> +&dsi0 {
> + status = "okay";
> +
> + clocks = <&cpg CPG_MOD 415>,
> + <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> + <&extal_clk>;
> + clock-names = "fck", "dsi", "extal";
As discussed separately, this should go to r8a79a0.dtsi, and the last
clock should be named "pll".
Reviewed-by: Laurent Pinchart <[email protected]>
> +
> + ports {
> + port@1 {
> + endpoint {
> + remote-endpoint = <&sn65dsi86_in>;
> + data-lanes = <1 2 3 4>;
> + };
> + };
> + };
> +};
> +
> +&du {
> + status = "okay";
> };
>
> &extal_clk {
> @@ -114,6 +163,41 @@ &i2c1 {
>
> status = "okay";
> clock-frequency = <400000>;
> +
> + sn65dsi86@2c {
> + compatible = "ti,sn65dsi86";
> + reg = <0x2c>;
> +
> + clocks = <&sn65dsi86_refclk>;
> + clock-names = "refclk";
> +
> + interrupt-parent = <&gpio1>;
> + interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
> +
> + vccio-supply = <®_1p8v>;
> + vpll-supply = <®_1p8v>;
> + vcca-supply = <®_1p2v>;
> + vcc-supply = <®_1p2v>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + sn65dsi86_in: endpoint {
> + remote-endpoint = <&dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + sn65dsi86_out: endpoint {
> + remote-endpoint = <&mini_dp_con_in>;
> + };
> + };
> + };
> + };
> };
>
> &i2c6 {
--
Regards,
Laurent Pinchart