Adding cclpex node to represent Tegra234 cpufreq.
Tegra234 uses some of the CRAB (Control Register Access Bus)
registers for cpu frequency requests. These registers are
memory mapped to CCPLEX_MMCRAB_ARM region. In this node, mapping
the range of MMCRAB registers required only for cpu frequency info.
Signed-off-by: Sumit Gupta <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index aaace605bdaa..610207f3f967 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -1258,6 +1258,13 @@
};
};
+ ccplex@e000000 {
+ compatible = "nvidia,tegra234-ccplex-cluster";
+ reg = <0x0 0x0e000000 0x0 0x5ffff>;
+ nvidia,bpmp = <&bpmp>;
+ status = "okay";
+ };
+
sram@40000000 {
compatible = "nvidia,tegra234-sysram", "mmio-sram";
reg = <0x0 0x40000000 0x0 0x80000>;
--
2.17.1
On 16/03/2022 13:58, Sumit Gupta wrote:
> Adding cclpex node to represent Tegra234 cpufreq.
> Tegra234 uses some of the CRAB (Control Register Access Bus)
> registers for cpu frequency requests. These registers are
> memory mapped to CCPLEX_MMCRAB_ARM region. In this node, mapping
> the range of MMCRAB registers required only for cpu frequency info.
>
> Signed-off-by: Sumit Gupta <[email protected]>
> ---
> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> index aaace605bdaa..610207f3f967 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> @@ -1258,6 +1258,13 @@
> };
> };
>
> + ccplex@e000000 {
> + compatible = "nvidia,tegra234-ccplex-cluster";
> + reg = <0x0 0x0e000000 0x0 0x5ffff>;
> + nvidia,bpmp = <&bpmp>;
> + status = "okay";
> + };
> +
> sram@40000000 {
> compatible = "nvidia,tegra234-sysram", "mmio-sram";
> reg = <0x0 0x40000000 0x0 0x80000>;
We need to add this compatible string to a DT binding doc somewhere.
Cheers
Jon
--
nvpublic
On Mon, Mar 21, 2022 at 06:24:21PM +0530, Sumit Gupta wrote:
>
>
> > > Adding cclpex node to represent Tegra234 cpufreq.
> > > Tegra234 uses some of the CRAB (Control Register Access Bus)
> > > registers for cpu frequency requests. These registers are
> > > memory mapped to CCPLEX_MMCRAB_ARM region. In this node, mapping
> > > the range of MMCRAB registers required only for cpu frequency info.
> > >
> > > Signed-off-by: Sumit Gupta <[email protected]>
> > > ---
> > > arch/arm64/boot/dts/nvidia/tegra234.dtsi | 7 +++++++
> > > 1 file changed, 7 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > > b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > > index aaace605bdaa..610207f3f967 100644
> > > --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > > +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
> > > @@ -1258,6 +1258,13 @@
> > > };
> > > };
> > > + ccplex@e000000 {
> > > + compatible = "nvidia,tegra234-ccplex-cluster";
> > > + reg = <0x0 0x0e000000 0x0 0x5ffff>;
> > > + nvidia,bpmp = <&bpmp>;
> > > + status = "okay";
> > > + };
> > > +
> > > sram@40000000 {
> > > compatible = "nvidia,tegra234-sysram", "mmio-sram";
> > > reg = <0x0 0x40000000 0x0 0x80000>;
> >
> >
> > We need to add this compatible string to a DT binding doc somewhere.
> It seems the binding doc was previously posted in [1] for T186 SoC.
> Same will be applicable for T234 SoC also. Only compatible string need to be
> added.
> Should I sent a separate patch after converting it to yaml format and add
> compatible string (or) send as part of v2.
>
> [1] https://lkml.org/lkml/2017/4/3/324
Yeah, it's probably best to pick up Mikko's patch, convert the bindings
to YAML and then make the addition of the Tegra234 compatible string a
separate patch on top of that. Alternatively you may want to add the
compatible string while doing the conversion since it's just a one-line
change.
Thierry
>> Adding cclpex node to represent Tegra234 cpufreq.
>> Tegra234 uses some of the CRAB (Control Register Access Bus)
>> registers for cpu frequency requests. These registers are
>> memory mapped to CCPLEX_MMCRAB_ARM region. In this node, mapping
>> the range of MMCRAB registers required only for cpu frequency info.
>>
>> Signed-off-by: Sumit Gupta <[email protected]>
>> ---
>> arch/arm64/boot/dts/nvidia/tegra234.dtsi | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> index aaace605bdaa..610207f3f967 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
>> @@ -1258,6 +1258,13 @@
>> };
>> };
>> + ccplex@e000000 {
>> + compatible = "nvidia,tegra234-ccplex-cluster";
>> + reg = <0x0 0x0e000000 0x0 0x5ffff>;
>> + nvidia,bpmp = <&bpmp>;
>> + status = "okay";
>> + };
>> +
>> sram@40000000 {
>> compatible = "nvidia,tegra234-sysram", "mmio-sram";
>> reg = <0x0 0x40000000 0x0 0x80000>;
>
>
> We need to add this compatible string to a DT binding doc somewhere.
It seems the binding doc was previously posted in [1] for T186 SoC.
Same will be applicable for T234 SoC also. Only compatible string need
to be added.
Should I sent a separate patch after converting it to yaml format and
add compatible string (or) send as part of v2.
[1] https://lkml.org/lkml/2017/4/3/324
>
> Cheers
> Jon
>