Probably like most people, I find the detail of the available
retbleed mitigations obscure. In particular, for zen2 the options
*might* include ibpb or unret.
But I have failed to find what 'unret' actually means. Any
pointers, please ?
While ibpb might be available (and slow), on my Renoir with
microcode level (0860106h) there were no newer microcode versions
available when I last looked (a few weeks ago) but note 7 at the
bottom of
https://www.amd.com/system/files/documents/technical-guidance-for-mitigating-branch-type-confusion_v
7_20220712.pdf
implies that the relevant bit is only set on Renoir in 0860109h and
later.
Some of the text in that pdf implies that at least one of the
options could be set if not already set from the microcode, but the
amount of detail leaves me totally lost.
Assuming, for the moment, that I might want to try this full
mitigation, is there any way to set this in the absence of newer
microcode ?
Or should I just accept that the best I can get is 'unret', whatever
that means ?
ĸen
--
It is very easy to get ridiculously confused about the tenses of
time travel, but most things can be resolved by a sufficiently
large ego. -- The Last Continent
On Mon, Jul 18, 2022 at 09:19:01AM +0100, Ken Moffat wrote:
> Probably like most people, I find the detail of the available
> retbleed mitigations obscure. In particular, for zen2 the options
> *might* include ibpb or unret.
>
> But I have failed to find what 'unret' actually means. Any
> pointers, please ?
>
> While ibpb might be available (and slow), on my Renoir with
> microcode level (0860106h) there were no newer microcode versions
> available when I last looked (a few weeks ago) but note 7 at the
> bottom of
> https://www.amd.com/system/files/documents/technical-guidance-for-mitigating-branch-type-confusion_v
> 7_20220712.pdf
> implies that the relevant bit is only set on Renoir in 0860109h and
> later.
>
> Some of the text in that pdf implies that at least one of the
> options could be set if not already set from the microcode, but the
> amount of detail leaves me totally lost.
>
> Assuming, for the moment, that I might want to try this full
> mitigation, is there any way to set this in the absence of newer
> microcode ?
>
> Or should I just accept that the best I can get is 'unret', whatever
> that means ?
>
> ĸen
'unret' = AMD JMP2RET i.e. replace all 'ret' instructions with
'jmp __x86_return_thunk', and safe training the thunk code upon
kernel/hypervisor entry. This is a purely software mitigation,
it doesn't require any microcode.
AMD JMP2RET is described in this document:
https://www.amd.com/system/files/documents/technical-guidance-for-mitigating-branch-type-confusion_v7_20220712.pdf
alex.
On Mon, Jul 18, 2022 at 04:58:49PM +0200, Alexandre Chartre wrote:
> On Mon, Jul 18, 2022 at 09:19:01AM +0100, Ken Moffat wrote:
> > Probably like most people, I find the detail of the available
> > retbleed mitigations obscure. In particular, for zen2 the options
> > *might* include ibpb or unret.
> >
> > But I have failed to find what 'unret' actually means. Any
> > pointers, please ?
> >
> > While ibpb might be available (and slow), on my Renoir with
> > microcode level (0860106h) there were no newer microcode versions
> > available when I last looked (a few weeks ago) but note 7 at the
> > bottom of
> > https://www.amd.com/system/files/documents/technical-guidance-for-mitigating-branch-type-confusion_v
> > 7_20220712.pdf
> > implies that the relevant bit is only set on Renoir in 0860109h and
> > later.
> >
> > Some of the text in that pdf implies that at least one of the
> > options could be set if not already set from the microcode, but the
> > amount of detail leaves me totally lost.
> >
> > Assuming, for the moment, that I might want to try this full
> > mitigation, is there any way to set this in the absence of newer
> > microcode ?
> >
> > Or should I just accept that the best I can get is 'unret', whatever
> > that means ?
> >
> > ĸen
>
> 'unret' = AMD JMP2RET i.e. replace all 'ret' instructions with
> 'jmp __x86_return_thunk', and safe training the thunk code upon
> kernel/hypervisor entry. This is a purely software mitigation,
> it doesn't require any microcode.
>
> AMD JMP2RET is described in this document:
> https://www.amd.com/system/files/documents/technical-guidance-for-mitigating-branch-type-confusion_v7_20220712.pdf
>
> alex.
Thanks!
ĸen
--
It is very easy to get ridiculously confused about the tenses of
time travel, but most things can be resolved by a sufficiently
large ego. -- The Last Continent
On Mon, Jul 18, 2022 at 09:19:01AM +0100, Ken Moffat wrote:
Replying to myself to close this speculative misunderstanding.
>
> While ibpb might be available (and slow), on my Renoir with
> microcode level (0860106h) there were no newer microcode versions
> available when I last looked (a few weeks ago) but note 7 at the
> bottom of
> https://www.amd.com/system/files/documents/technical-guidance-for-mitigating-branch-type-confusion_v
> 7_20220712.pdf
> implies that the relevant bit is only set on Renoir in 0860109h and
> later.
>
> Some of the text in that pdf implies that at least one of the
> options could be set if not already set from the microcode, but the
> amount of detail leaves me totally lost.
>
Now that I've tried the options, I can see that ibpb *is* available
on this zen2 desktop machine (and no, I have no desire to use it,
having seen how much things slow down). The default (auto) on this
zen2 is the same as 'unret', i.e.
Mitigation: untrained return thunk; SMT enabled with STIBP protection
ĸen
--
It is very easy to get ridiculously confused about the tenses of
time travel, but most things can be resolved by a sufficiently
large ego. -- The Last Continent
On Mon, Jul 18, 2022 at 09:47:15PM +0000, Andrew Cooper wrote:
> On 18/07/2022 09:19, Ken Moffat wrote:
> > Probably like most people, I find the detail of the available
> > retbleed mitigations obscure. In particular, for zen2 the options
> > *might* include ibpb or unret.
>
> That's because retbleed is two totally different bugs between Intel and
> AMD, and on AMD, it's only a subcase.
>
> In this case for AMD, the root bug is called Branch Type Confusion, with
> Retbleed (and Straight Line Speculation from previous disclosures) being
> two sub-cases of BTC.
>
> > While ibpb might be available (and slow), on my Renoir with
> > microcode level (0860106h) there were no newer microcode versions
> > available when I last looked (a few weeks ago) but note 7 at the
> > bottom of
> > https://www.amd.com/system/files/documents/technical-guidance-for-mitigating-branch-type-confusion_v
> > 7_20220712.pdf
> > implies that the relevant bit is only set on Renoir in 0860109h and
> > later.
> >
> > Some of the text in that pdf implies that at least one of the
> > options could be set if not already set from the microcode, but the
> > amount of detail leaves me totally lost.
> >
> > Assuming, for the moment, that I might want to try this full
> > mitigation, is there any way to set this in the absence of newer
> > microcode ?
>
> The microcode doesn't matter. All it does is automatically activate the
> same bit we set in
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d7caac991feeef1b871ee6988fd2c9725df09039
>
> > Or should I just accept that the best I can get is 'unret', whatever
> > that means ?
>
> "unret" fixes half the problem; the Retbleed subcase specifically. You
> want IBPB if you want the full fix for Branch Type Confusion.
>
> ~Andrew
Thanks. In particular, thanks for the link to the commit which sets
that (I was hoping that had happened, but uncertain), and for
pointing out that the AMD and intel bugs are different (which a lot
of the online comments in various places seem to miss).
At the moment (desktop, single human user) I'm asking myself "Do ya
feel lucky ?" although I have not yet quite got as far as "Well do
ya, punk ?"
ĸen
--
It is very easy to get ridiculously confused about the tenses of
time travel, but most things can be resolved by a sufficiently
large ego. -- The Last Continent