This series update the Xilinx firmware, ZynqMP dt-binding and ZynqMP
pinctrl driver to handle 'output-enable' and 'bias-high-impedance'
configurations. As part of these configurations, ZynqMP pinctrl driver
takes care of pin tri-state setting.
Also fix the kernel doc warning in ZynqMP pinctrl driver.
Note: Resending the series as i see this series didn't went out due
to some issue with my mail client. Please ignore if this series is
already received.
Sai Krishna Potthuri (4):
firmware: xilinx: Add configuration values for tri-state
dt-bindings: pinctrl-zynqmp: Add output-enable configuration
pinctrl: pinctrl-zynqmp: Add support for output-enable and
bias-high-impedance
pinctrl: pinctrl-zynqmp: Fix kernel-doc warning
.../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 4 ++++
drivers/pinctrl/pinctrl-zynqmp.c | 11 +++++++++++
include/linux/firmware/xlnx-zynqmp.h | 5 +++++
3 files changed, 20 insertions(+)
--
2.17.1
Add 'output-enable' configuration parameter to the properties list.
Signed-off-by: Sai Krishna Potthuri <[email protected]>
---
.../devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
index 2722dc7bb03d..1e2b9b627b12 100644
--- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
@@ -274,6 +274,10 @@ patternProperties:
slew-rate:
enum: [0, 1]
+ output-enable:
+ description:
+ This will internally disable the tri-state for MIO pins.
+
drive-strength:
description:
Selects the drive strength for MIO pins, in mA.
--
2.17.1
On Fri, 17 Jun 2022 16:16:57 +0530, Sai Krishna Potthuri wrote:
> Add 'output-enable' configuration parameter to the properties list.
>
> Signed-off-by: Sai Krishna Potthuri <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
On Fri, Jun 17, 2022 at 12:47 PM Sai Krishna Potthuri
<[email protected]> wrote:
> This series update the Xilinx firmware, ZynqMP dt-binding and ZynqMP
> pinctrl driver to handle 'output-enable' and 'bias-high-impedance'
> configurations. As part of these configurations, ZynqMP pinctrl driver
> takes care of pin tri-state setting.
> Also fix the kernel doc warning in ZynqMP pinctrl driver.
>
> Note: Resending the series as i see this series didn't went out due
> to some issue with my mail client. Please ignore if this series is
> already received.
>
> Sai Krishna Potthuri (4):
> firmware: xilinx: Add configuration values for tri-state
> dt-bindings: pinctrl-zynqmp: Add output-enable configuration
> pinctrl: pinctrl-zynqmp: Add support for output-enable and
> bias-high-impedance
> pinctrl: pinctrl-zynqmp: Fix kernel-doc warning
Excellent work, patches applied!
Yours,
Linus Walleij
Hi Sai,
On Fri, Jun 17, 2022 at 04:16:55PM +0530, Sai Krishna Potthuri wrote:
> This series update the Xilinx firmware, ZynqMP dt-binding and ZynqMP
> pinctrl driver to handle 'output-enable' and 'bias-high-impedance'
> configurations. As part of these configurations, ZynqMP pinctrl driver
> takes care of pin tri-state setting.
> Also fix the kernel doc warning in ZynqMP pinctrl driver.
I'm afraid this causes a regression :-( With this series applied, boot
breaks with the following message being printed to the serial console:
Received exception
MSR: 0x200, EAR: 0xFF180198, EDR: 0x0, ESR: 0x64
I've traced that to the probe of the UART, when it calls into the
firmware to set pin MIO18 to high impedance. According to v1.7 of the
ZynqMP registers reference (UG1087), there is no register at address
0xFF180198.
I am using the VCU TRD 2021.1 for testing. Does this series require a
firmware update ? If so backward compatibility needs to be preserved.
It's very late in the v6.0-rc cycle for a fix, a revert may be best at
this point, to give us time to fix the issue properly.
> Note: Resending the series as i see this series didn't went out due
> to some issue with my mail client. Please ignore if this series is
> already received.
>
> Sai Krishna Potthuri (4):
> firmware: xilinx: Add configuration values for tri-state
> dt-bindings: pinctrl-zynqmp: Add output-enable configuration
> pinctrl: pinctrl-zynqmp: Add support for output-enable and
> bias-high-impedance
> pinctrl: pinctrl-zynqmp: Fix kernel-doc warning
>
> .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 4 ++++
> drivers/pinctrl/pinctrl-zynqmp.c | 11 +++++++++++
> include/linux/firmware/xlnx-zynqmp.h | 5 +++++
> 3 files changed, 20 insertions(+)
--
Regards,
Laurent Pinchart
On Wed, Sep 28, 2022 at 06:58:10PM +0300, Laurent Pinchart wrote:
> Hi Sai,
>
> On Fri, Jun 17, 2022 at 04:16:55PM +0530, Sai Krishna Potthuri wrote:
> > This series update the Xilinx firmware, ZynqMP dt-binding and ZynqMP
> > pinctrl driver to handle 'output-enable' and 'bias-high-impedance'
> > configurations. As part of these configurations, ZynqMP pinctrl driver
> > takes care of pin tri-state setting.
> > Also fix the kernel doc warning in ZynqMP pinctrl driver.
>
> I'm afraid this causes a regression :-( With this series applied, boot
> breaks with the following message being printed to the serial console:
>
> Received exception
> MSR: 0x200, EAR: 0xFF180198, EDR: 0x0, ESR: 0x64
>
> I've traced that to the probe of the UART, when it calls into the
> firmware to set pin MIO18 to high impedance. According to v1.7 of the
> ZynqMP registers reference (UG1087), there is no register at address
> 0xFF180198.
>
> I am using the VCU TRD 2021.1 for testing. Does this series require a
> firmware update ? If so backward compatibility needs to be preserved.
> It's very late in the v6.0-rc cycle for a fix, a revert may be best at
> this point, to give us time to fix the issue properly.
I've now tested the VCU TRD 2022.1 (which AFAIK is the latest available
version), and the problem doesn't occue then. It thus seems this depends
on a firmware update, which is impractical at best for all old designs
:-(
> > Note: Resending the series as i see this series didn't went out due
> > to some issue with my mail client. Please ignore if this series is
> > already received.
> >
> > Sai Krishna Potthuri (4):
> > firmware: xilinx: Add configuration values for tri-state
> > dt-bindings: pinctrl-zynqmp: Add output-enable configuration
> > pinctrl: pinctrl-zynqmp: Add support for output-enable and
> > bias-high-impedance
> > pinctrl: pinctrl-zynqmp: Fix kernel-doc warning
> >
> > .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 4 ++++
> > drivers/pinctrl/pinctrl-zynqmp.c | 11 +++++++++++
> > include/linux/firmware/xlnx-zynqmp.h | 5 +++++
> > 3 files changed, 20 insertions(+)
--
Regards,
Laurent Pinchart
Hi Laurent,
On 9/28/22 18:42, Laurent Pinchart wrote:
>
> On Wed, Sep 28, 2022 at 06:58:10PM +0300, Laurent Pinchart wrote:
>> Hi Sai,
>>
>> On Fri, Jun 17, 2022 at 04:16:55PM +0530, Sai Krishna Potthuri wrote:
>>> This series update the Xilinx firmware, ZynqMP dt-binding and ZynqMP
>>> pinctrl driver to handle 'output-enable' and 'bias-high-impedance'
>>> configurations. As part of these configurations, ZynqMP pinctrl driver
>>> takes care of pin tri-state setting.
>>> Also fix the kernel doc warning in ZynqMP pinctrl driver.
>>
>> I'm afraid this causes a regression :-( With this series applied, boot
>> breaks with the following message being printed to the serial console:
>>
>> Received exception
>> MSR: 0x200, EAR: 0xFF180198, EDR: 0x0, ESR: 0x64
>>
>> I've traced that to the probe of the UART, when it calls into the
>> firmware to set pin MIO18 to high impedance. According to v1.7 of the
>> ZynqMP registers reference (UG1087), there is no register at address
>> 0xFF180198.
>>
>> I am using the VCU TRD 2021.1 for testing. Does this series require a
>> firmware update ? If so backward compatibility needs to be preserved.
>> It's very late in the v6.0-rc cycle for a fix, a revert may be best at
>> this point, to give us time to fix the issue properly.
>
> I've now tested the VCU TRD 2022.1 (which AFAIK is the latest available
> version), and the problem doesn't occue then. It thus seems this depends
> on a firmware update, which is impractical at best for all old designs
> :-(
That's correct observation. Supporting these two properties requires newer pmufw
or that message is received.
I will let Arun and Jyotheeswar to comment it. I don't think there is a way to
detect which firmware has implementation for it available.
Thanks,
Michal
Hi Laurent,
We will be adding a way to check features that are available in firmware from kernel drivers in the near-future. Once that ability is available, kernel drivers can query if a feature is supported in the firmware before making use of the feature.
We will revert this patch at this time as existing (& older released) firmwares neither supports this particular pinctrl tristate feature or the ability to check for available features.
Regards,
Arun
> -----Original Message-----
> From: Simek, Michal <[email protected]>
> Sent: Thursday, September 29, 2022 12:08 AM
> To: Laurent Pinchart <[email protected]>; Sai Krishna
> Potthuri <[email protected]>; Kannan, Arun Balaji
> <[email protected]>; Mutthareddyvari, Jyotheeswar Reddy
> <[email protected]>
> Cc: Linus Walleij <[email protected]>; Rob Herring <[email protected]>;
> Michal Simek <[email protected]>; Krzysztof Kozlowski
> <[email protected]>; [email protected];
> [email protected]; [email protected]; linux-
> [email protected]; [email protected]; [email protected]
> Subject: Re: [PATCH 0/4] pinctrl: pinctrl-zynqmp: Add tri-state configuration
> support
>
> Hi Laurent,
>
> On 9/28/22 18:42, Laurent Pinchart wrote:
> >
> > On Wed, Sep 28, 2022 at 06:58:10PM +0300, Laurent Pinchart wrote:
> >> Hi Sai,
> >>
> >> On Fri, Jun 17, 2022 at 04:16:55PM +0530, Sai Krishna Potthuri wrote:
> >>> This series update the Xilinx firmware, ZynqMP dt-binding and ZynqMP
> >>> pinctrl driver to handle 'output-enable' and 'bias-high-impedance'
> >>> configurations. As part of these configurations, ZynqMP pinctrl
> >>> driver takes care of pin tri-state setting.
> >>> Also fix the kernel doc warning in ZynqMP pinctrl driver.
> >>
> >> I'm afraid this causes a regression :-( With this series applied,
> >> boot breaks with the following message being printed to the serial console:
> >>
> >> Received exception
> >> MSR: 0x200, EAR: 0xFF180198, EDR: 0x0, ESR: 0x64
> >>
> >> I've traced that to the probe of the UART, when it calls into the
> >> firmware to set pin MIO18 to high impedance. According to v1.7 of the
> >> ZynqMP registers reference (UG1087), there is no register at address
> >> 0xFF180198.
> >>
> >> I am using the VCU TRD 2021.1 for testing. Does this series require a
> >> firmware update ? If so backward compatibility needs to be preserved.
> >> It's very late in the v6.0-rc cycle for a fix, a revert may be best
> >> at this point, to give us time to fix the issue properly.
> >
> > I've now tested the VCU TRD 2022.1 (which AFAIK is the latest
> > available version), and the problem doesn't occue then. It thus seems
> > this depends on a firmware update, which is impractical at best for
> > all old designs :-(
>
> That's correct observation. Supporting these two properties requires newer
> pmufw or that message is received.
> I will let Arun and Jyotheeswar to comment it. I don't think there is a way to
> detect which firmware has implementation for it available.
>
> Thanks,
> Michal