Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINER's entry
for the PCIe driver for Intel LGM GW SoC.
Signed-off-by: Zhu YiXin <[email protected]>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index c8d274efff10..6091bbb0e1d7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16383,7 +16383,7 @@ F: Documentation/devicetree/bindings/pci/intel,keembay-pcie*
F: drivers/pci/controller/dwc/pcie-keembay.c
PCIE DRIVER FOR INTEL LGM GW SOC
-M: Rahul Tanwar <[email protected]>
+M: Chuanhua Lei <[email protected]>
L: [email protected]
S: Maintained
F: Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
--
2.17.1
[+to Rahul, which I expect to bounce, but to give Rahul a chance to
respond/ack]
On Fri, May 19, 2023 at 12:45:55PM +0800, Zhu YiXin wrote:
> Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINER's entry
> for the PCIe driver for Intel LGM GW SoC.
>
> Signed-off-by: Zhu YiXin <[email protected]>
This should also be acked by Chuanhua Lei, since I don't want to sign
people up for work they don't expect.
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c8d274efff10..6091bbb0e1d7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -16383,7 +16383,7 @@ F: Documentation/devicetree/bindings/pci/intel,keembay-pcie*
> F: drivers/pci/controller/dwc/pcie-keembay.c
>
> PCIE DRIVER FOR INTEL LGM GW SOC
> -M: Rahul Tanwar <[email protected]>
> +M: Chuanhua Lei <[email protected]>
> L: [email protected]
> S: Maintained
> F: Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> --
> 2.17.1
>
On 24/5/2023 3:38 am, Bjorn Helgaas wrote:
> This email was sent from outside of MaxLinear.
>
>
> [+to Rahul, which I expect to bounce, but to give Rahul a chance to
> respond/ack]
>
> On Fri, May 19, 2023 at 12:45:55PM +0800, Zhu YiXin wrote:
>> Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINER's entry
>> for the PCIe driver for Intel LGM GW SoC.
>>
>> Signed-off-by: Zhu YiXin <[email protected]>
> This should also be acked by Chuanhua Lei, since I don't want to sign
> people up for work they don't expect.
Acked-by: Lei Chuanhua <[email protected]>
>> ---
>> MAINTAINERS | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index c8d274efff10..6091bbb0e1d7 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -16383,7 +16383,7 @@ F: Documentation/devicetree/bindings/pci/intel,keembay-pcie*
>> F: drivers/pci/controller/dwc/pcie-keembay.c
>>
>> PCIE DRIVER FOR INTEL LGM GW SOC
>> -M: Rahul Tanwar <[email protected]>
>> +M: Chuanhua Lei <[email protected]>
>> L: [email protected]
>> S: Maintained
>> F: Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
>> --
>> 2.17.1
>>
>
[+cc Rahul]
On Fri, May 19, 2023 at 12:45:55PM +0800, Zhu YiXin wrote:
> Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINER's entry
> for the PCIe driver for Intel LGM GW SoC.
>
> Signed-off-by: Zhu YiXin <[email protected]>
Applied with acks from Rahul Tanwar and Lei Chuanhua to for-linus for
v6.4, thanks!
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c8d274efff10..6091bbb0e1d7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -16383,7 +16383,7 @@ F: Documentation/devicetree/bindings/pci/intel,keembay-pcie*
> F: drivers/pci/controller/dwc/pcie-keembay.c
>
> PCIE DRIVER FOR INTEL LGM GW SOC
> -M: Rahul Tanwar <[email protected]>
> +M: Chuanhua Lei <[email protected]>
> L: [email protected]
> S: Maintained
> F: Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> --
> 2.17.1
>