riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
dma coherent, so set dma-noncoherent to reflect this fact.
Signed-off-by: Jisheng Zhang <[email protected]>
Tested-by: Drew Fustini <[email protected]>
---
Since v1:
- rebase on v6.6-rc1
- collect Tested-by tag
arch/riscv/boot/dts/thead/th1520.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index ce708183b6f6..ff364709a6df 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -139,6 +139,7 @@ soc {
interrupt-parent = <&plic>;
#address-cells = <2>;
#size-cells = <2>;
+ dma-noncoherent;
ranges;
plic: interrupt-controller@ffd8000000 {
--
2.40.1
On Tue, Sep 12, 2023 at 3:34 PM Jisheng Zhang <[email protected]> wrote:
>
> riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> dma coherent, so set dma-noncoherent to reflect this fact.
>
> Signed-off-by: Jisheng Zhang <[email protected]>
> Tested-by: Drew Fustini <[email protected]>
> ---
>
> Since v1:
> - rebase on v6.6-rc1
> - collect Tested-by tag
>
> arch/riscv/boot/dts/thead/th1520.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index ce708183b6f6..ff364709a6df 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -139,6 +139,7 @@ soc {
> interrupt-parent = <&plic>;
> #address-cells = <2>;
> #size-cells = <2>;
> + dma-noncoherent;
Reviewed-by: Guo Ren <[email protected]>
> ranges;
>
> plic: interrupt-controller@ffd8000000 {
> --
> 2.40.1
>
--
Best Regards
Guo Ren
On Tue, Sep 12, 2023 at 03:22:32PM +0800, Jisheng Zhang wrote:
> riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> dma coherent, so set dma-noncoherent to reflect this fact.
>
> Signed-off-by: Jisheng Zhang <[email protected]>
> Tested-by: Drew Fustini <[email protected]>
> ---
>
> Since v1:
> - rebase on v6.6-rc1
> - collect Tested-by tag
Does this mean you're expecting me to take this?
>
> arch/riscv/boot/dts/thead/th1520.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index ce708183b6f6..ff364709a6df 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -139,6 +139,7 @@ soc {
> interrupt-parent = <&plic>;
> #address-cells = <2>;
> #size-cells = <2>;
> + dma-noncoherent;
> ranges;
>
> plic: interrupt-controller@ffd8000000 {
> --
> 2.40.1
>
On Wed, Sep 13, 2023 at 11:15:57PM +0800, Jisheng Zhang wrote:
> On Tue, Sep 12, 2023 at 05:27:31PM +0100, Conor Dooley wrote:
> > On Tue, Sep 12, 2023 at 03:22:32PM +0800, Jisheng Zhang wrote:
> > > riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> > > dma coherent, so set dma-noncoherent to reflect this fact.
> > >
> > > Signed-off-by: Jisheng Zhang <[email protected]>
> > > Tested-by: Drew Fustini <[email protected]>
> > > ---
> > >
> > > Since v1:
> > > - rebase on v6.6-rc1
> > > - collect Tested-by tag
> >
> > Does this mean you're expecting me to take this?
>
> Hi Conor,
>
> I think I will take this and send PR to soc people. The reason
> I send v2 is the rebasing on new rc1 and v1 wasn't in linux-riscv
> mailist due to typo;
Great, thanks. Please ask SFR to add your tree to linux-next.
Cheers,
Conor.
On Tue, Sep 12, 2023 at 05:27:31PM +0100, Conor Dooley wrote:
> On Tue, Sep 12, 2023 at 03:22:32PM +0800, Jisheng Zhang wrote:
> > riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> > dma coherent, so set dma-noncoherent to reflect this fact.
> >
> > Signed-off-by: Jisheng Zhang <[email protected]>
> > Tested-by: Drew Fustini <[email protected]>
> > ---
> >
> > Since v1:
> > - rebase on v6.6-rc1
> > - collect Tested-by tag
>
> Does this mean you're expecting me to take this?
Hi Conor,
I think I will take this and send PR to soc people. The reason
I send v2 is the rebasing on new rc1 and v1 wasn't in linux-riscv
mailist due to typo;
Thank you so much
>
> >
> > arch/riscv/boot/dts/thead/th1520.dtsi | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> > index ce708183b6f6..ff364709a6df 100644
> > --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> > @@ -139,6 +139,7 @@ soc {
> > interrupt-parent = <&plic>;
> > #address-cells = <2>;
> > #size-cells = <2>;
> > + dma-noncoherent;
> > ranges;
> >
> > plic: interrupt-controller@ffd8000000 {
> > --
> > 2.40.1
> >
Hey Jisheng,
On Wed, Sep 13, 2023 at 04:44:18PM +0100, Conor Dooley wrote:
> On Wed, Sep 13, 2023 at 11:15:57PM +0800, Jisheng Zhang wrote:
> > On Tue, Sep 12, 2023 at 05:27:31PM +0100, Conor Dooley wrote:
> > > On Tue, Sep 12, 2023 at 03:22:32PM +0800, Jisheng Zhang wrote:
> > > > riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> > > > dma coherent, so set dma-noncoherent to reflect this fact.
> > > >
> > > > Signed-off-by: Jisheng Zhang <[email protected]>
> > > > Tested-by: Drew Fustini <[email protected]>
> > > > ---
> > > >
> > > > Since v1:
> > > > - rebase on v6.6-rc1
> > > > - collect Tested-by tag
> > >
> > > Does this mean you're expecting me to take this?
> >
> > Hi Conor,
> >
> > I think I will take this and send PR to soc people. The reason
> > I send v2 is the rebasing on new rc1 and v1 wasn't in linux-riscv
> > mailist due to typo;
>
> Great, thanks. Please ask SFR to add your tree to linux-next.
I lost my main x86 box over the weekend (looks like probably a dead
motherboard), so I may have missed a response to this.
Did you see this email? Additionally, can you add that git tree to the
maintainers entry for the thead devicetrees?
Thanks,
Conor.
On Wed, Sep 20, 2023 at 09:36:19AM +0100, Conor Dooley wrote:
> Hey Jisheng,
>
> On Wed, Sep 13, 2023 at 04:44:18PM +0100, Conor Dooley wrote:
> > On Wed, Sep 13, 2023 at 11:15:57PM +0800, Jisheng Zhang wrote:
> > > On Tue, Sep 12, 2023 at 05:27:31PM +0100, Conor Dooley wrote:
> > > > On Tue, Sep 12, 2023 at 03:22:32PM +0800, Jisheng Zhang wrote:
> > > > > riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> > > > > dma coherent, so set dma-noncoherent to reflect this fact.
> > > > >
> > > > > Signed-off-by: Jisheng Zhang <[email protected]>
> > > > > Tested-by: Drew Fustini <[email protected]>
> > > > > ---
> > > > >
> > > > > Since v1:
> > > > > - rebase on v6.6-rc1
> > > > > - collect Tested-by tag
> > > >
> > > > Does this mean you're expecting me to take this?
> > >
> > > Hi Conor,
> > >
> > > I think I will take this and send PR to soc people. The reason
> > > I send v2 is the rebasing on new rc1 and v1 wasn't in linux-riscv
> > > mailist due to typo;
> >
> > Great, thanks. Please ask SFR to add your tree to linux-next.
Hi Conor,
I'm not sure how to do this. When MAINTAINERS patch is merged, send
an email to Stephen Rothwell, are these steps correct?
>
> I lost my main x86 box over the weekend (looks like probably a dead
> motherboard), so I may have missed a response to this.
>
> Did you see this email? Additionally, can you add that git tree to the
> maintainers entry for the thead devicetrees?
I just created a tree in
git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux.git
But it needs time for cgit to take place. I will send a patch
once it appears.
Thanks
On Thu, Sep 21, 2023 at 05:24:57PM +0800, Jisheng Zhang wrote:
> On Wed, Sep 20, 2023 at 09:36:19AM +0100, Conor Dooley wrote:
> > Hey Jisheng,
> >
> > On Wed, Sep 13, 2023 at 04:44:18PM +0100, Conor Dooley wrote:
> > > On Wed, Sep 13, 2023 at 11:15:57PM +0800, Jisheng Zhang wrote:
> > > > On Tue, Sep 12, 2023 at 05:27:31PM +0100, Conor Dooley wrote:
> > > > > On Tue, Sep 12, 2023 at 03:22:32PM +0800, Jisheng Zhang wrote:
> > > > > > riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> > > > > > dma coherent, so set dma-noncoherent to reflect this fact.
> > > > > >
> > > > > > Signed-off-by: Jisheng Zhang <[email protected]>
> > > > > > Tested-by: Drew Fustini <[email protected]>
> > > > > > ---
> > > > > >
> > > > > > Since v1:
> > > > > > - rebase on v6.6-rc1
> > > > > > - collect Tested-by tag
> > > > >
> > > > > Does this mean you're expecting me to take this?
> > > >
> > > > Hi Conor,
> > > >
> > > > I think I will take this and send PR to soc people. The reason
> > > > I send v2 is the rebasing on new rc1 and v1 wasn't in linux-riscv
> > > > mailist due to typo;
> > >
> > > Great, thanks. Please ask SFR to add your tree to linux-next.
>
> Hi Conor,
>
> I'm not sure how to do this. When MAINTAINERS patch is merged, send
> an email to Stephen Rothwell, are these steps correct?
Sorta, yeah. You don't need to have the MAINTAINERS patch merged first
though, just send him a link to your tree and the branch name(s) & he
will include it in linux-next.
> > I lost my main x86 box over the weekend (looks like probably a dead
> > motherboard), so I may have missed a response to this.
> >
> > Did you see this email? Additionally, can you add that git tree to the
> > maintainers entry for the thead devicetrees?
>
> I just created a tree in
> git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux.git
>
> But it needs time for cgit to take place. I will send a patch
> once it appears.
Looks to be there for me now. Thanks for doing this!
On Thu, Sep 21, 2023 at 11:08:28AM +0100, Conor Dooley wrote:
> On Thu, Sep 21, 2023 at 05:24:57PM +0800, Jisheng Zhang wrote:
> > On Wed, Sep 20, 2023 at 09:36:19AM +0100, Conor Dooley wrote:
> > > Hey Jisheng,
> > >
> > > On Wed, Sep 13, 2023 at 04:44:18PM +0100, Conor Dooley wrote:
> > > > On Wed, Sep 13, 2023 at 11:15:57PM +0800, Jisheng Zhang wrote:
> > > > > On Tue, Sep 12, 2023 at 05:27:31PM +0100, Conor Dooley wrote:
> > > > > > On Tue, Sep 12, 2023 at 03:22:32PM +0800, Jisheng Zhang wrote:
> > > > > > > riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
> > > > > > > dma coherent, so set dma-noncoherent to reflect this fact.
> > > > > > >
> > > > > > > Signed-off-by: Jisheng Zhang <[email protected]>
> > > > > > > Tested-by: Drew Fustini <[email protected]>
> > > > > > > ---
> > > > > > >
> > > > > > > Since v1:
> > > > > > > - rebase on v6.6-rc1
> > > > > > > - collect Tested-by tag
> > > > > >
> > > > > > Does this mean you're expecting me to take this?
> > > > >
> > > > > Hi Conor,
> > > > >
> > > > > I think I will take this and send PR to soc people. The reason
> > > > > I send v2 is the rebasing on new rc1 and v1 wasn't in linux-riscv
> > > > > mailist due to typo;
> > > >
> > > > Great, thanks. Please ask SFR to add your tree to linux-next.
> >
> > Hi Conor,
> >
> > I'm not sure how to do this. When MAINTAINERS patch is merged, send
> > an email to Stephen Rothwell, are these steps correct?
>
> Sorta, yeah. You don't need to have the MAINTAINERS patch merged first
> though, just send him a link to your tree and the branch name(s) & he
> will include it in linux-next.
>
> > > I lost my main x86 box over the weekend (looks like probably a dead
> > > motherboard), so I may have missed a response to this.
> > >
> > > Did you see this email? Additionally, can you add that git tree to the
> > > maintainers entry for the thead devicetrees?
> >
> > I just created a tree in
> > git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux.git
> >
> > But it needs time for cgit to take place. I will send a patch
> > once it appears.
>
> Looks to be there for me now. Thanks for doing this!
Hi Jisheng, I'm writing the cover letter for v2 of my th1520 mmc series
and I am wondering if this dma-noncoherent patch is in any tree yet?
Thanks,
Drew
On Tue, Oct 17, 2023, at 18:09, Jisheng Zhang wrote:
> On Mon, Oct 16, 2023 at 10:10:33AM -0700, Drew Fustini wrote:
>> On Thu, Sep 21, 2023 at 11:08:28AM +0100, Conor Dooley wrote:
>>
>> Hi Jisheng, I'm writing the cover letter for v2 of my th1520 mmc series
>> and I am wondering if this dma-noncoherent patch is in any tree yet?
>
> Hi Drew,
>
> I forget this patch. Thanks for reminding.
>
> Hi Arnd
>
> This is the only one dt fix for thead SoC, can you please pick it up
> for the upcoming -rcN? I knew soc people can directly ask for pick
> up for only one fix in the past. Let me know if I need to generate a
> formal PR.
Applied to the fixes branch now, thanks.
There is no need for a pull request if you have just a single patch.
Just a few things to consider:
- For both patches and pull requests, make sure you have [email protected]
as the primary recipient so I know that I'm the one to apply them
and see them in https://patchwork.kernel.org/project/linux-soc/list/
I get Cc'd on a lot of patches and would otherwise not know if you
are looking for them to be applied or reviewed.
- Since there is no tag description, add a comment under the '---'
line asking for the patch to be applied directly, and say if
this is a bugfix for the current release or if it should be
queued for the next release.
Arnd