Summary:
Revise linux device tree entry related to Meta(Facebook) Harma
specific devices connected to BMC(AST2600) SoC.
Base on : https://lore.kernel.org/all/CACPK8XePx+PvDKzPMjPRn_g9z8yrtAmLvP8Qbepm1AVjuCbaKw@mail.gmail.com/
Change log:
v1
- Patch 0001 - Revise SGPIO line name.
- Patch 0002 - Mapping ttyS2 to UART4.
- Patch 0003 - Remove Vuart.
- Patch 0004 - Add cpu power good line name.
- Patch 0005 - Add spi-gpio.
Peter Yin (5):
ARM: dts: aspeed: Harma: Revise SGPIO line name.
ARM: dts: aspeed: Harma: mapping ttyS2 to UART4.
ARM: dts: aspeed: Harma: Remove Vuart
ARM: dts: aspeed: Harma: Add cpu power good line name
ARM: dts: aspeed: Harma: Add spi-gpio
.../dts/aspeed/aspeed-bmc-facebook-harma.dts | 33 ++++++++++++++-----
1 file changed, 25 insertions(+), 8 deletions(-)
--
2.25.1
The same name as reset-control-smb-e1s
change to reset-control-smb-e1s-0 and reset-control-smb-e1s-0.
Signed-off-by: Peter Yin <[email protected]>
---
Revise linux device tree entry related to Meta(Facebook) Harma
specific devices connected to BMC(AST2600) SoC.
Base on : https://lore.kernel.org/all/CACPK8XePx+PvDKzPMjPRn_g9z8yrtAmLvP8Qbepm1AVjuCbaKw@mail.gmail.com/
Change log:
v1
- Patch 0001 - Revise SGPIO line name.
- Patch 0002 - Mapping ttyS2 to UART4.
- Patch 0003 - Remove Vuart.
- Patch 0004 - Add cpu power good line name.
- Patch 0005 - Add spi-gpio.
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
index 7db3f9eb0016..8a173863ef24 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
@@ -505,9 +505,9 @@ &sgpiom0 {
"","reset-control-cpu0-p1-mux",
"","reset-control-e1s-mux",
"power-host-good","reset-control-mb-mux",
- "","reset-control-smb-e1s",
+ "","reset-control-smb-e1s-0",
/*E0-E3 line 64-71*/
- "","reset-control-smb-e1s",
+ "","reset-control-smb-e1s-1",
"host-ready-n","reset-control-srst",
"presence-e1s-0","reset-control-usb-hub",
"","reset-control",
--
2.25.1
Change routing to match SOL(Serial Over LAN) settings.
Signed-off-by: Peter Yin <[email protected]>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
index 8a173863ef24..a0056d633eb1 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
@@ -12,8 +12,8 @@ / {
aliases {
serial0 = &uart1;
- serial1 = &uart6;
- serial2 = &uart2;
+ serial1 = &uart2;
+ serial2 = &uart4;
serial4 = &uart5;
i2c20 = &imux20;
--
2.25.1
Remove vuart to avoid port conflict with uart2
Signed-off-by: Peter Yin <[email protected]>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
index a0056d633eb1..5d692e9f541e 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
@@ -100,10 +100,6 @@ &uart_routing {
status = "okay";
};
-&vuart1 {
- status = "okay";
-};
-
&wdt1 {
status = "okay";
pinctrl-names = "default";
--
2.25.1
Add spi-gpio for tpm device.
Signed-off-by: Peter Yin <[email protected]>
---
.../dts/aspeed/aspeed-bmc-facebook-harma.dts | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
index 36aad01dda20..25ae044cd176 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
@@ -28,6 +28,8 @@ aliases {
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
+
+ spi1 = &spi_gpio;
};
chosen {
@@ -67,6 +69,25 @@ led-2 {
gpios = <&gpio0 124 GPIO_ACTIVE_HIGH>;
};
};
+
+ spi_gpio: spi-gpio {
+ status = "okay";
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
+
+ tpmdev@0 {
+ compatible = "tcg,tpm_tis-spi";
+ spi-max-frequency = <33000000>;
+ reg = <0>;
+ };
+ };
};
// HOST BIOS Debug
--
2.25.1
Add a line name for cpu power good.
Signed-off-by: Peter Yin <[email protected]>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
index 5d692e9f541e..36aad01dda20 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
@@ -501,7 +501,7 @@ &sgpiom0 {
"","reset-control-cpu0-p1-mux",
"","reset-control-e1s-mux",
"power-host-good","reset-control-mb-mux",
- "","reset-control-smb-e1s-0",
+ "power-cpu-good","reset-control-smb-e1s-0",
/*E0-E3 line 64-71*/
"","reset-control-smb-e1s-1",
"host-ready-n","reset-control-srst",
--
2.25.1
On Tue, Jan 02, 2024 at 12:44:09PM +0800, Peter Yin wrote:
> Add spi-gpio for tpm device.
>
> Signed-off-by: Peter Yin <[email protected]>
> ---
> .../dts/aspeed/aspeed-bmc-facebook-harma.dts | 21 +++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
> index 36aad01dda20..25ae044cd176 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts
> @@ -28,6 +28,8 @@ aliases {
> i2c29 = &imux29;
> i2c30 = &imux30;
> i2c31 = &imux31;
> +
> + spi1 = &spi_gpio;
> };
>
> chosen {
> @@ -67,6 +69,25 @@ led-2 {
> gpios = <&gpio0 124 GPIO_ACTIVE_HIGH>;
> };
> };
> +
> + spi_gpio: spi-gpio {
> + status = "okay";
> + compatible = "spi-gpio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
> + gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
> + gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
> + num-chipselects = <1>;
> + cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
> +
> + tpmdev@0 {
> + compatible = "tcg,tpm_tis-spi";
Due to other pending changes, there is a request that all tpm_tis-spi
also contain a compatible with a chip vendor. Please add
"infineon,slb9670".
See https://lore.kernel.org/lkml/[email protected]/
for more context.
> + spi-max-frequency = <33000000>;
> + reg = <0>;
> + };
> + };
> };
>
> // HOST BIOS Debug
> --
> 2.25.1
>
--
Patrick Williams