Hello,
Following the support of the EyeQ5 SoC, this series adds the initial
support for a newer SoC, the EyeQ6H.
The EyeQ6H (or "High") from Mobileye is still based on the MIPS I6500
architecture as the EyeQ5. The 2 clusters of this SoC contain 4 cores
each, which are capable of running 4 threads per core. Besides this,
it features multiple controllers such as the classic UART, high-speed
I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash
interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It
also includes a Hardware Security Module, Functional Safety Hardware,
and video encoders, among other features.
For now, this series just adds initial support with UART and Pinctrl
support. Another current limitation pointed out in patch 3 is that
only one CPU is actually running. This limitation will be solved with
upcoming series.
The main change in this new version is the use of the new way to name
the clock nodes.
Regards,
Gregory
To: Vladimir Kondratiev <[email protected]>
To: Théo Lebrun <[email protected]>
To: Thomas Bogendoerfer <[email protected]>
To: Rob Herring <[email protected]>
To: Krzysztof Kozlowski <[email protected]>
To: Conor Dooley <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
cc: Tawfik Bayouk <[email protected]>
CC: Thomas Petazzoni <[email protected]>
cc: Alexandre Belloni <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
---
Changes in v2:
- Renamed clock node names based on
https://lore.kernel.org/all/[email protected]/>
- Use "eyeq6h" instead of "eyeq6" for the compatible string
- Move compatible string as the first property
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Gregory CLEMENT (3):
dt-bindings: mips: Add bindings for a new Mobileye SoC EyeQ6H
MIPS: mobileye: Add EyeQ6H device tree
MIPS: mobileye: Add EyeQ6H support
.../devicetree/bindings/mips/mobileye.yaml | 5 +
arch/mips/Kbuild.platforms | 2 +-
arch/mips/Kconfig | 7 +-
arch/mips/boot/dts/Makefile | 2 +-
arch/mips/boot/dts/mobileye/Makefile | 1 +
arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts | 22 ++++
.../boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi | 52 ++++++++++
arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi | 88 ++++++++++++++++
arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 98 ++++++++++++++++++
arch/mips/configs/eyeq5_defconfig | 1 +
arch/mips/configs/eyeq6_defconfig | 111 +++++++++++++++++++++
arch/mips/mobileye/Kconfig | 26 +++++
arch/mips/mobileye/Platform | 1 +
13 files changed, 411 insertions(+), 5 deletions(-)
---
base-commit: 07e6a6d7f1d9fa4685003a195032698ba99577bb
change-id: 20240506-eyeq6h-f4c5a95b0909
Best regards,
--
Gregory CLEMENT <[email protected]>
Add the yaml bindings for a new Mobileye SoC: EyeQ6H.
Acked-by: Conor Dooley <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
---
Documentation/devicetree/bindings/mips/mobileye.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/mips/mobileye.yaml b/Documentation/devicetree/bindings/mips/mobileye.yaml
index 831975f6b479..d60744550e46 100644
--- a/Documentation/devicetree/bindings/mips/mobileye.yaml
+++ b/Documentation/devicetree/bindings/mips/mobileye.yaml
@@ -26,6 +26,11 @@ properties:
- enum:
- mobileye,eyeq5-epm5
- const: mobileye,eyeq5
+ - description: Boards with Mobileye EyeQ6H SoC
+ items:
+ - enum:
+ - mobileye,eyeq6h-epm6
+ - const: mobileye,eyeq6h
additionalProperties: true
--
2.43.0
EyeQ6H (or “High”) is an other SoC from Mobileye still based on the
MIPS I6500 architecture as the EyeQ5. The 2 clusters of this SoC
contains 4 cores which are capable of running 4 threads. Besides this,
it features multiple controllers such as the classic UART, high speed
I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash
interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It
also includes a Hardware Security Module, Functional Safety Hardware,
and video encoders and more.
This commit provides the initial device tree files with support for
UART, GPIO and pinctrl, as well as fixed clocked.
Signed-off-by: Gregory CLEMENT <[email protected]>
---
arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts | 22 +++++
.../boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi | 52 ++++++++++++
arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi | 88 +++++++++++++++++++
arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 98 ++++++++++++++++++++++
4 files changed, 260 insertions(+)
diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts b/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts
new file mode 100644
index 000000000000..ebc0d363fbf8
--- /dev/null
+++ b/arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2024 Mobileye Vision Technologies Ltd.
+ */
+
+/dts-v1/;
+
+#include "eyeq6h.dtsi"
+
+/ {
+ compatible = "mobileye,eyeq6-epm6", "mobileye,eyeq6";
+ model = "Mobile EyeQ6H MP6 Evaluation board";
+
+ chosen {
+ stdout-path = "serial0:921600n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x1 0x00000000 0x1 0x00000000>;
+ };
+};
diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi
new file mode 100644
index 000000000000..5fa99e06fde7
--- /dev/null
+++ b/arch/mips/boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2023 Mobileye Vision Technologies Ltd.
+ */
+
+#include <dt-bindings/clock/mobileye,eyeq5-clk.h>
+
+/ {
+ xtal: clock-30000000 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <30000000>;
+ };
+
+ pll_west: clock-2000000000-west {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2000000000>;
+ };
+
+ pll_cpu: clock-2000000000-cpu {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2000000000>;
+ };
+
+ /* pll-cpu derivatives */
+ occ_cpu: clock-2000000000-occ-cpu {
+ compatible = "fixed-factor-clock";
+ clocks = <&pll_cpu>;
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ };
+
+ /* pll-west derivatives */
+ occ_periph_w: clock-200000000 {
+ compatible = "fixed-factor-clock";
+ clocks = <&pll_west>;
+ #clock-cells = <0>;
+ clock-div = <10>;
+ clock-mult = <1>;
+ };
+ uart_clk: clock-200000000-uart {
+ compatible = "fixed-factor-clock";
+ clocks = <&occ_periph_w>;
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <1>;
+ };
+
+};
diff --git a/arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi
new file mode 100644
index 000000000000..a3d1b3684893
--- /dev/null
+++ b/arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Copyright 2024 Mobileye Vision Technologies Ltd.
+ */
+
+/*
+ * MUX register structure
+ * bits | field | comment
+ * [0] | MUX_SEL | 0 - GPIO, 1 - alternative func
+ * [4] | SW_LOOPBACK|
+ * [5] | SW_OUT_HZ |
+ * [7] | DBG_IN |
+ * [11:8] | DS | drive strength
+ * [13:12] | PUD | pull-up/pull-down. 0, 3 - no, 1 - PD, 2 - PU
+ * [14] | OD | Open drain
+ * [15] | ST_CFG | Hysteretic input enable (Schmitt trigger)
+ */
+
+&pinctrl_west {
+ // TODO: use pinctrl-single,bias-pullup
+ // TODO: use pinctrl-single,bias-pulldown
+ // TODO: use pinctrl-single,drive-strength
+ // TODO: use pinctrl-single,input-schmitt
+
+ i2c0_pins: i2c0-pins {
+ pinctrl-single,pins = <
+ 0x000 0x200 // I2C0_SCL pin
+ 0x004 0x200 // I2C0_SDA pin
+ >;
+ };
+ i2c1_pins: i2c1-pins {
+ pinctrl-single,pins = <
+ 0x008 0x200 // I2C1_SCL pin
+ 0x00c 0x200 // I2C1_SDA pin
+ >;
+ };
+ eth0_pins: eth0-pins {
+ pinctrl-single,pins = <
+ 0x080 1 // GPIO_C4__SMA0_MDC pin
+ 0x084 1 // GPIO_C5__SMA0_MDIO pin
+ >;
+ };
+ uart0_pins: uart0-pins {
+ pinctrl-single,pins = <0x0a8 1>; // UART0 pin group
+ };
+ uart1_pins: uart1-pins {
+ pinctrl-single,pins = <0x0a0 1>; // UART1 pin group
+ };
+ spi0_pins: spi0-pins {
+ pinctrl-single,pins = <0x0ac 1>; // SPI0 pin group
+ };
+ spi1_pins: spi1-pins {
+ pinctrl-single,pins = <0x0a4 1>; // SPI1 pin group
+ };
+};
+
+&pinctrl_east {
+ i2c2_pins: i2c2-pins {
+ pinctrl-single,pins = <
+ 0x000 0x200 // i2c2_SCL pin
+ 0x004 0x200 // i2c2_SDA pin
+ >;
+ };
+ i2c3_pins: i2c3-pins {
+ pinctrl-single,pins = <
+ 0x008 0x200 // i2c3_SCL pin
+ 0x00c 0x200 // i2c3_SDA pin
+ >;
+ };
+ eth1_pins: eth1-pins {
+ pinctrl-single,pins = <
+ 0x080 1 // GPIO_D4__SMA1_MDC pin
+ 0x084 1 // GPIO_D5__SMA1_MDIO pin
+ >;
+ };
+ uart2_sel_pins: uart2-pins {
+ pinctrl-single,pins = <0x0a4 1>; // UART2 pin group
+ };
+ uart3_pins: uart3-pins {
+ pinctrl-single,pins = <0x09c 1>; // UART3 pin group
+ };
+ spi2_pins: spi2-pins {
+ pinctrl-single,pins = <0x0a8 1>; // SPI2 pin group
+ };
+ spi3_pins: spi3-pins {
+ pinctrl-single,pins = <0x0a0 1>; // SPI3 pin group
+ };
+};
diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi
new file mode 100644
index 000000000000..1db3c3cda2e3
--- /dev/null
+++ b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+/*
+ * Copyright 2024 Mobileye Vision Technologies Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
+#include "eyeq6h-fixed-clocks.dtsi"
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "img,i6500";
+ reg = <0>;
+ clocks = <&occ_cpu>;
+ };
+ };
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ cpu_intc: interrupt-controller {
+ compatible = "mti,cpu-interrupt-controller";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ };
+
+ soc: soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ uart0: serial@d3331000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0 0xd3331000 0x0 0x1000>;
+ reg-io-width = <4>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&occ_periph_w>, <&occ_periph_w>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
+ pinctrl_west: pinctrl@d3337000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0xd3337000 0x0 0xb0>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xffff>;
+ };
+
+ pinctrl_east: pinctrl@d3357000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0xd3357000 0x0 0xb0>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xffff>;
+ };
+
+ pinctrl_south: pinctrl@d8014000 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0xd8014000 0x0 0xf8>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xffff>;
+ };
+
+ gic: interrupt-controller@f0920000 {
+ compatible = "mti,gic";
+ reg = <0x0 0xf0920000 0x0 0x20000>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+
+ /*
+ * Declare the interrupt-parent even though the mti,gic
+ * binding doesn't require it, such that the kernel can
+ * figure out that cpu_intc is the root interrupt
+ * controller & should be probed first.
+ */
+ interrupt-parent = <&cpu_intc>;
+
+ timer {
+ compatible = "mti,gic-timer";
+ interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
+ clocks = <&occ_cpu>;
+ };
+ };
+ };
+};
+
+#include "eyeq6h-pins.dtsi"
--
2.43.0
Hello Thomas,
> Hello,
>
> Following the support of the EyeQ5 SoC, this series adds the initial
> support for a newer SoC, the EyeQ6H.
>
> The EyeQ6H (or "High") from Mobileye is still based on the MIPS I6500
> architecture as the EyeQ5. The 2 clusters of this SoC contain 4 cores
> each, which are capable of running 4 threads per core. Besides this,
> it features multiple controllers such as the classic UART, high-speed
> I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash
> interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It
> also includes a Hardware Security Module, Functional Safety Hardware,
> and video encoders, among other features.
>
> For now, this series just adds initial support with UART and Pinctrl
> support. Another current limitation pointed out in patch 3 is that
> only one CPU is actually running. This limitation will be solved with
> upcoming series.
>
> The main change in this new version is the use of the new way to name
> the clock nodes.
I sent this second version a month ago and the first version even before
that, and I still haven't received any feedback from your side. Does it
mean that you will merge it?
If you think there are some changes to be made, please let me know now
so I will have time to implement them.
Thanks,
Gregpry
>
> Regards,
>
> Gregory
>
> To: Vladimir Kondratiev <[email protected]>
> To: Théo Lebrun <[email protected]>
> To: Thomas Bogendoerfer <[email protected]>
> To: Rob Herring <[email protected]>
> To: Krzysztof Kozlowski <[email protected]>
> To: Conor Dooley <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> cc: Tawfik Bayouk <[email protected]>
> CC: Thomas Petazzoni <[email protected]>
> cc: Alexandre Belloni <[email protected]>
>
> Signed-off-by: Gregory CLEMENT <[email protected]>
> ---
> Changes in v2:
>
> - Renamed clock node names based on
> https://lore.kernel.org/all/[email protected]/>
> - Use "eyeq6h" instead of "eyeq6" for the compatible string
> - Move compatible string as the first property
> - Link to v1: https://lore.kernel.org/r/[email protected]
>
> ---
> Gregory CLEMENT (3):
> dt-bindings: mips: Add bindings for a new Mobileye SoC EyeQ6H
> MIPS: mobileye: Add EyeQ6H device tree
> MIPS: mobileye: Add EyeQ6H support
>
> .../devicetree/bindings/mips/mobileye.yaml | 5 +
> arch/mips/Kbuild.platforms | 2 +-
> arch/mips/Kconfig | 7 +-
> arch/mips/boot/dts/Makefile | 2 +-
> arch/mips/boot/dts/mobileye/Makefile | 1 +
> arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts | 22 ++++
> .../boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi | 52 ++++++++++
> arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi | 88 ++++++++++++++++
> arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 98 ++++++++++++++++++
> arch/mips/configs/eyeq5_defconfig | 1 +
> arch/mips/configs/eyeq6_defconfig | 111 +++++++++++++++++++++
> arch/mips/mobileye/Kconfig | 26 +++++
> arch/mips/mobileye/Platform | 1 +
> 13 files changed, 411 insertions(+), 5 deletions(-)
> ---
> base-commit: 07e6a6d7f1d9fa4685003a195032698ba99577bb
> change-id: 20240506-eyeq6h-f4c5a95b0909
>
> Best regards,
> --
> Gregory CLEMENT <[email protected]>
On Mon, Jun 10, 2024 at 04:47:47PM +0200, Gregory CLEMENT wrote:
> > Following the support of the EyeQ5 SoC, this series adds the initial
> > support for a newer SoC, the EyeQ6H.
> >
> > The EyeQ6H (or "High") from Mobileye is still based on the MIPS I6500
> > architecture as the EyeQ5. The 2 clusters of this SoC contain 4 cores
> > each, which are capable of running 4 threads per core. Besides this,
> > it features multiple controllers such as the classic UART, high-speed
> > I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash
> > interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It
> > also includes a Hardware Security Module, Functional Safety Hardware,
> > and video encoders, among other features.
> >
> > For now, this series just adds initial support with UART and Pinctrl
> > support. Another current limitation pointed out in patch 3 is that
> > only one CPU is actually running. This limitation will be solved with
> > upcoming series.
> >
> > The main change in this new version is the use of the new way to name
> > the clock nodes.
>
> I sent this second version a month ago and the first version even before
> that, and I still haven't received any feedback from your side. Does it
> mean that you will merge it?
I will this week. The second version came around merge window, so I didn't
want to include it.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
On Mon, May 13, 2024 at 08:34:14PM +0200, Gregory CLEMENT wrote:
> Hello,
>
> Following the support of the EyeQ5 SoC, this series adds the initial
> support for a newer SoC, the EyeQ6H.
>
> The EyeQ6H (or "High") from Mobileye is still based on the MIPS I6500
> architecture as the EyeQ5. The 2 clusters of this SoC contain 4 cores
> each, which are capable of running 4 threads per core. Besides this,
> it features multiple controllers such as the classic UART, high-speed
> I2C, SPI, as well as CAN-FD, PCIe Gen4, Octal/Quad SPI Flash
> interface, Gigabit Ethernet, MIPI CSI-2, MIPI DSI, and eMMC 5.1. It
> also includes a Hardware Security Module, Functional Safety Hardware,
> and video encoders, among other features.
>
> For now, this series just adds initial support with UART and Pinctrl
> support. Another current limitation pointed out in patch 3 is that
> only one CPU is actually running. This limitation will be solved with
> upcoming series.
>
> The main change in this new version is the use of the new way to name
> the clock nodes.
>
> Regards,
>
> Gregory
>
> To: Vladimir Kondratiev <[email protected]>
> To: Th?o Lebrun <[email protected]>
> To: Thomas Bogendoerfer <[email protected]>
> To: Rob Herring <[email protected]>
> To: Krzysztof Kozlowski <[email protected]>
> To: Conor Dooley <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> cc: Tawfik Bayouk <[email protected]>
> CC: Thomas Petazzoni <[email protected]>
> cc: Alexandre Belloni <[email protected]>
>
> Signed-off-by: Gregory CLEMENT <[email protected]>
> ---
> Changes in v2:
>
> - Renamed clock node names based on
> https://lore.kernel.org/all/[email protected]/>
> - Use "eyeq6h" instead of "eyeq6" for the compatible string
> - Move compatible string as the first property
> - Link to v1: https://lore.kernel.org/r/[email protected]
>
> ---
> Gregory CLEMENT (3):
> dt-bindings: mips: Add bindings for a new Mobileye SoC EyeQ6H
> MIPS: mobileye: Add EyeQ6H device tree
> MIPS: mobileye: Add EyeQ6H support
>
> .../devicetree/bindings/mips/mobileye.yaml | 5 +
> arch/mips/Kbuild.platforms | 2 +-
> arch/mips/Kconfig | 7 +-
> arch/mips/boot/dts/Makefile | 2 +-
> arch/mips/boot/dts/mobileye/Makefile | 1 +
> arch/mips/boot/dts/mobileye/eyeq6h-epm6.dts | 22 ++++
> .../boot/dts/mobileye/eyeq6h-fixed-clocks.dtsi | 52 ++++++++++
> arch/mips/boot/dts/mobileye/eyeq6h-pins.dtsi | 88 ++++++++++++++++
> arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 98 ++++++++++++++++++
> arch/mips/configs/eyeq5_defconfig | 1 +
> arch/mips/configs/eyeq6_defconfig | 111 +++++++++++++++++++++
> arch/mips/mobileye/Kconfig | 26 +++++
> arch/mips/mobileye/Platform | 1 +
> 13 files changed, 411 insertions(+), 5 deletions(-)
> ---
> base-commit: 07e6a6d7f1d9fa4685003a195032698ba99577bb
> change-id: 20240506-eyeq6h-f4c5a95b0909
series applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]