From: Matthew Gerlach <[email protected]>
Add a device tree for the n6000 instantiation of Agilex
Hard Processor System (HPS).
Signed-off-by: Matthew Gerlach <[email protected]>
---
v2:
- fix copy engine node name
- fix compatible field for copy engine
- remove redundant status field
- add compatibility field for the board
- fix SPDX
- fix how osc1 clock frequency is set
---
arch/arm64/boot/dts/intel/Makefile | 3 +-
.../boot/dts/intel/socfpga_agilex_n6000.dts | 76 +++++++++++++++++++
2 files changed, 78 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index 0b5477442263..c2a723838344 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
-dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_socdk.dtb \
+dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
+ socfpga_agilex_socdk.dtb \
socfpga_agilex_socdk_nand.dtb \
socfpga_n5x_socdk.dtb
dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
new file mode 100644
index 000000000000..6f8b7bf7a53f
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021-2022, Intel Corporation
+ */
+#include "socfpga_agilex.dtsi"
+
+/ {
+ model = "SoCFPGA Agilex n6000";
+ compatible = "intel,socfpga-agilex-n6000", "intel,socfpga-agilex";
+
+ aliases {
+ serial0 = &uart1;
+ serial1 = &uart0;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ ethernet2 = &gmac2;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0 0 0 0>;
+ };
+
+ soc {
+ agilex_hps_bridges: bus@80000000 {
+ compatible = "simple-bus";
+ reg = <0x80000000 0x60000000>,
+ <0xf9000000 0x00100000>;
+ reg-names = "axi_h2f", "axi_h2f_lw";
+ #address-cells = <0x2>;
+ #size-cells = <0x1>;
+ ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
+
+ hps_cp_eng@0 {
+ compatible = "intel,hps-copy-engine";
+ reg = <0x00000000 0x00000000 0x00001000>;
+ };
+ };
+ };
+};
+
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ spidev: spidev@0 {
+ status = "okay";
+ compatible = "linux,spidev";
+ spi-max-frequency = <25000000>;
+ reg = <0>;
+ };
+};
+
+&watchdog0 {
+ status = "okay";
+};
+
+&fpga_mgr {
+ status = "disabled";
+};
--
2.25.1
On Wed, 4 May 2022, Krzysztof Kozlowski wrote:
> On 03/05/2022 21:45, [email protected] wrote:
>> From: Matthew Gerlach <[email protected]>
>>
>> Add a device tree for the n6000 instantiation of Agilex
>> Hard Processor System (HPS).
>>
>> Signed-off-by: Matthew Gerlach <[email protected]>
>
>> +
>> + soc {
>> + agilex_hps_bridges: bus@80000000 {
>> + compatible = "simple-bus";
>> + reg = <0x80000000 0x60000000>,
>> + <0xf9000000 0x00100000>;
>> + reg-names = "axi_h2f", "axi_h2f_lw";
>> + #address-cells = <0x2>;
>> + #size-cells = <0x1>;
>> + ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
>> +
>> + hps_cp_eng@0 {
>
> No underscores in node names. dtc W=1 should complain about it.
I will remove the underscores in the name. I didn't see a complaint when
I compiled it with "make W=1" in the kernel tree.
> The node name should be generic, matching class of a device. What is
> this exactly?
The component is a specialized IP block instantiated in the FPGA directly
connected to the HPS. In one sense the IP block is a simple DMA
controller, but it also has some registers for hand shaking between the
HPS and a host processor connected to the FPGA via PCIe. Should I call
the node, dma@0?
Thanks for your review,
Matthew
> > Best regards,
> Krzysztof
>
On Wed, 4 May 2022, Krzysztof Kozlowski wrote:
> On 03/05/2022 21:45, [email protected] wrote:
>> From: Matthew Gerlach <[email protected]>
>>
>> Add a device tree for the n6000 instantiation of Agilex
>> Hard Processor System (HPS).
>>
>> Signed-off-by: Matthew Gerlach <[email protected]>
>> +
>> +&spi0 {
>> + status = "okay";
>> +
>> + spidev: spidev@0 {
>> + status = "okay";
>> + compatible = "linux,spidev";
>> + spi-max-frequency = <25000000>;
>> + reg = <0>;
>
> You should see big fat warnings - from checkpatch and when you boot your
> device. This compatible is not accepted.
I must have missed the warning for the compatible string. I see it now,
and I remove the node in the v3 patch set.
Thanks for the feedback.
>
> Please be sure you run checkpatch on your patches. Using reviewers time
> instead of automated tool for the same job is discouraged...
>
>
> Best regards,
> Krzysztof
>
On 03/05/2022 21:45, [email protected] wrote:
> From: Matthew Gerlach <[email protected]>
>
> Add a device tree for the n6000 instantiation of Agilex
> Hard Processor System (HPS).
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> +
> + soc {
> + agilex_hps_bridges: bus@80000000 {
> + compatible = "simple-bus";
> + reg = <0x80000000 0x60000000>,
> + <0xf9000000 0x00100000>;
> + reg-names = "axi_h2f", "axi_h2f_lw";
> + #address-cells = <0x2>;
> + #size-cells = <0x1>;
> + ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
> +
> + hps_cp_eng@0 {
No underscores in node names. dtc W=1 should complain about it.
The node name should be generic, matching class of a device. What is
this exactly?
Best regards,
Krzysztof
On Thu, 5 May 2022, Krzysztof Kozlowski wrote:
> On 04/05/2022 23:22, [email protected] wrote:
>>
>>
>> On Wed, 4 May 2022, Krzysztof Kozlowski wrote:
>>
>>> On 03/05/2022 21:45, [email protected] wrote:
>>>> From: Matthew Gerlach <[email protected]>
>>>>
>>>> Add a device tree for the n6000 instantiation of Agilex
>>>> Hard Processor System (HPS).
>>>>
>>>> Signed-off-by: Matthew Gerlach <[email protected]>
>>>
>>>> +
>>>> + soc {
>>>> + agilex_hps_bridges: bus@80000000 {
>>>> + compatible = "simple-bus";
>>>> + reg = <0x80000000 0x60000000>,
>>>> + <0xf9000000 0x00100000>;
>>>> + reg-names = "axi_h2f", "axi_h2f_lw";
>>>> + #address-cells = <0x2>;
>>>> + #size-cells = <0x1>;
>>>> + ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
>>>> +
>>>> + hps_cp_eng@0 {
>>>
>>> No underscores in node names. dtc W=1 should complain about it.
>>
>> I will remove the underscores in the name. I didn't see a complaint when
>> I compiled it with "make W=1" in the kernel tree.
>>
>>> The node name should be generic, matching class of a device. What is
>>> this exactly?
>>
>> The component is a specialized IP block instantiated in the FPGA directly
>> connected to the HPS. In one sense the IP block is a simple DMA
>> controller, but it also has some registers for hand shaking between the
>> HPS and a host processor connected to the FPGA via PCIe. Should I call
>> the node, dma@0?
>
> Then maybe the closest is dma-controller.
OK, I will call it dma-controller@0.
Thanks,
Matthew
>
>
> Best regards,
> Krzysztof
>
On 04/05/2022 23:22, [email protected] wrote:
>
>
> On Wed, 4 May 2022, Krzysztof Kozlowski wrote:
>
>> On 03/05/2022 21:45, [email protected] wrote:
>>> From: Matthew Gerlach <[email protected]>
>>>
>>> Add a device tree for the n6000 instantiation of Agilex
>>> Hard Processor System (HPS).
>>>
>>> Signed-off-by: Matthew Gerlach <[email protected]>
>>
>>> +
>>> + soc {
>>> + agilex_hps_bridges: bus@80000000 {
>>> + compatible = "simple-bus";
>>> + reg = <0x80000000 0x60000000>,
>>> + <0xf9000000 0x00100000>;
>>> + reg-names = "axi_h2f", "axi_h2f_lw";
>>> + #address-cells = <0x2>;
>>> + #size-cells = <0x1>;
>>> + ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
>>> +
>>> + hps_cp_eng@0 {
>>
>> No underscores in node names. dtc W=1 should complain about it.
>
> I will remove the underscores in the name. I didn't see a complaint when
> I compiled it with "make W=1" in the kernel tree.
>
>> The node name should be generic, matching class of a device. What is
>> this exactly?
>
> The component is a specialized IP block instantiated in the FPGA directly
> connected to the HPS. In one sense the IP block is a simple DMA
> controller, but it also has some registers for hand shaking between the
> HPS and a host processor connected to the FPGA via PCIe. Should I call
> the node, dma@0?
Then maybe the closest is dma-controller.
Best regards,
Krzysztof
On 03/05/2022 21:45, [email protected] wrote:
> From: Matthew Gerlach <[email protected]>
>
> Add a device tree for the n6000 instantiation of Agilex
> Hard Processor System (HPS).
>
> Signed-off-by: Matthew Gerlach <[email protected]>
> +
> +&spi0 {
> + status = "okay";
> +
> + spidev: spidev@0 {
> + status = "okay";
> + compatible = "linux,spidev";
> + spi-max-frequency = <25000000>;
> + reg = <0>;
You should see big fat warnings - from checkpatch and when you boot your
device. This compatible is not accepted.
Please be sure you run checkpatch on your patches. Using reviewers time
instead of automated tool for the same job is discouraged...
Best regards,
Krzysztof