This patch series adds a device driver for Generic Clock Controller
of lan966x SoC.
v7 -> v8:
- Defined new constant DIV_MAX.
- Corrected and updated prescaler divider condition check.
- Added Acked-by.
v6 -> v7:
- Added Kconfig and Makefile entires for lan966x clock driver.
v5 -> v6:
- Added Acked-by to dt-bindings file.
- Removed "_clk" in clock-names.
- Added Reviewed-by to Documentation file.
v4 -> v5:
- In v4 dt-bindings, missed adding "clock-names" in required
properties and example. So, added them.
- Returning proper error - PTR_ERR.
- Removed unused variable "ret" in probe function.
v3 -> v4:
- Updated "clocks" and added "clock-names" in dt-bindings.
- Used clk_parent_data instead of of_clk_get_parent_name().
v2 -> v3:
- Fixed dt_binding_check errors.
v1 -> v2:
- Updated license in dt-bindings.
- Updated example provided for clock controller node.
Kavyasree Kotagiri (3):
dt-bindings: clock: lan966x: Add binding includes for lan966x SoC
clock IDs
dt-bindings: clock: lan966x: Add LAN966X Clock Controller
clk: lan966x: Add lan966x SoC clock driver
.../bindings/clock/microchip,lan966x-gck.yaml | 57 +++++
drivers/clk/Kconfig | 7 +
drivers/clk/Makefile | 1 +
drivers/clk/clk-lan966x.c | 239 ++++++++++++++++++
include/dt-bindings/clock/microchip,lan966x.h | 28 ++
5 files changed, 332 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
create mode 100644 drivers/clk/clk-lan966x.c
create mode 100644 include/dt-bindings/clock/microchip,lan966x.h
--
2.17.1
LAN966X supports 14 clock outputs for its peripherals.
This include file is introduced to use identifiers for clocks.
Signed-off-by: Kavyasree Kotagiri <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
v7 -> v8:
- No changes.
v6 -> v7:
- No changes.
v5 -> v6:
- Added Acked-by.
v4 -> v5:
- No changes.
v3 -> v4:
- No changes.
v2 -> v3:
- No changes.
v1 -> v2:
- Updated license.
include/dt-bindings/clock/microchip,lan966x.h | 28 +++++++++++++++++++
1 file changed, 28 insertions(+)
create mode 100644 include/dt-bindings/clock/microchip,lan966x.h
diff --git a/include/dt-bindings/clock/microchip,lan966x.h b/include/dt-bindings/clock/microchip,lan966x.h
new file mode 100644
index 000000000000..fe36ed6d8b5f
--- /dev/null
+++ b/include/dt-bindings/clock/microchip,lan966x.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2021 Microchip Inc.
+ *
+ * Author: Kavyasree Kotagiri <[email protected]>
+ */
+
+#ifndef _DT_BINDINGS_CLK_LAN966X_H
+#define _DT_BINDINGS_CLK_LAN966X_H
+
+#define GCK_ID_QSPI0 0
+#define GCK_ID_QSPI1 1
+#define GCK_ID_QSPI2 2
+#define GCK_ID_SDMMC0 3
+#define GCK_ID_PI 4
+#define GCK_ID_MCAN0 5
+#define GCK_ID_MCAN1 6
+#define GCK_ID_FLEXCOM0 7
+#define GCK_ID_FLEXCOM1 8
+#define GCK_ID_FLEXCOM2 9
+#define GCK_ID_FLEXCOM3 10
+#define GCK_ID_FLEXCOM4 11
+#define GCK_ID_TIMER 12
+#define GCK_ID_USB_REFCLK 13
+
+#define N_CLOCKS 14
+
+#endif
--
2.17.1
This adds the DT bindings documentation for lan966x SoC
generic clock controller.
Signed-off-by: Kavyasree Kotagiri <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
v7 -> v8:
- No changes.
v6 -> v7:
- No changes.
v5 -> v6:
- Removed "_clk" in clock-names.
- Added Reviewed-by.
v4 -> v5:
- In v4 dt-bindings, missed adding "clock-names" in required
properties and example. So, added them.
v3 -> v4:
- Updated "clocks" description.
- Added "clock-names".
v2 -> v3:
- Fixed dt_binding_check errors.
v1 -> v2:
- Updated example provided for clk controller DT node.
.../bindings/clock/microchip,lan966x-gck.yaml | 57 +++++++++++++++++++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
diff --git a/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
new file mode 100644
index 000000000000..fca83bd68e26
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/microchip,lan966x-gck.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip LAN966X Generic Clock Controller
+
+maintainers:
+ - Kavyasree Kotagiri <[email protected]>
+
+description: |
+ The LAN966X Generic clock controller contains 3 PLLs - cpu_clk,
+ ddr_clk and sys_clk. This clock controller generates and supplies
+ clock to various peripherals within the SoC.
+
+properties:
+ compatible:
+ const: microchip,lan966x-gck
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: CPU clock source
+ - description: DDR clock source
+ - description: System clock source
+
+ clock-names:
+ items:
+ - const: cpu
+ - const: ddr
+ - const: sys
+
+ '#clock-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ clks: clock-controller@e00c00a8 {
+ compatible = "microchip,lan966x-gck";
+ #clock-cells = <1>;
+ clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
+ clock-names = "cpu", "ddr", "sys";
+ reg = <0xe00c00a8 0x38>;
+ };
+...
--
2.17.1
On 08/10/2021 at 10:26, Kavyasree Kotagiri wrote:
> This adds the DT bindings documentation for lan966x SoC
> generic clock controller.
>
> Signed-off-by: Kavyasree Kotagiri <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
If it can speed-up adoption:
Acked-by: Nicolas Ferre <[email protected]>
> ---
> v7 -> v8:
> - No changes.
>
> v6 -> v7:
> - No changes.
>
> v5 -> v6:
> - Removed "_clk" in clock-names.
> - Added Reviewed-by.
>
> v4 -> v5:
> - In v4 dt-bindings, missed adding "clock-names" in required
> properties and example. So, added them.
>
> v3 -> v4:
> - Updated "clocks" description.
> - Added "clock-names".
>
> v2 -> v3:
> - Fixed dt_binding_check errors.
>
> v1 -> v2:
> - Updated example provided for clk controller DT node.
>
> .../bindings/clock/microchip,lan966x-gck.yaml | 57 +++++++++++++++++++
> 1 file changed, 57 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
> new file mode 100644
> index 000000000000..fca83bd68e26
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
> @@ -0,0 +1,57 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/microchip,lan966x-gck.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip LAN966X Generic Clock Controller
> +
> +maintainers:
> + - Kavyasree Kotagiri <[email protected]>
> +
> +description: |
> + The LAN966X Generic clock controller contains 3 PLLs - cpu_clk,
> + ddr_clk and sys_clk. This clock controller generates and supplies
> + clock to various peripherals within the SoC.
> +
> +properties:
> + compatible:
> + const: microchip,lan966x-gck
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: CPU clock source
> + - description: DDR clock source
> + - description: System clock source
> +
> + clock-names:
> + items:
> + - const: cpu
> + - const: ddr
> + - const: sys
> +
> + '#clock-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + clks: clock-controller@e00c00a8 {
> + compatible = "microchip,lan966x-gck";
> + #clock-cells = <1>;
> + clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
> + clock-names = "cpu", "ddr", "sys";
> + reg = <0xe00c00a8 0x38>;
> + };
> +...
>
--
Nicolas Ferre
On 08/10/2021 at 10:26, Kavyasree Kotagiri wrote:
> LAN966X supports 14 clock outputs for its peripherals.
> This include file is introduced to use identifiers for clocks.
>
> Signed-off-by: Kavyasree Kotagiri <[email protected]>
> Acked-by: Rob Herring <[email protected]>
If mine is missing:
Acked-by: Nicolas Ferre <[email protected]>
> ---
> v7 -> v8:
> - No changes.
>
> v6 -> v7:
> - No changes.
>
> v5 -> v6:
> - Added Acked-by.
>
> v4 -> v5:
> - No changes.
>
> v3 -> v4:
> - No changes.
>
> v2 -> v3:
> - No changes.
>
> v1 -> v2:
> - Updated license.
>
> include/dt-bindings/clock/microchip,lan966x.h | 28 +++++++++++++++++++
> 1 file changed, 28 insertions(+)
> create mode 100644 include/dt-bindings/clock/microchip,lan966x.h
>
> diff --git a/include/dt-bindings/clock/microchip,lan966x.h b/include/dt-bindings/clock/microchip,lan966x.h
> new file mode 100644
> index 000000000000..fe36ed6d8b5f
> --- /dev/null
> +++ b/include/dt-bindings/clock/microchip,lan966x.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +/*
> + * Copyright (c) 2021 Microchip Inc.
> + *
> + * Author: Kavyasree Kotagiri <[email protected]>
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_LAN966X_H
> +#define _DT_BINDINGS_CLK_LAN966X_H
> +
> +#define GCK_ID_QSPI0 0
> +#define GCK_ID_QSPI1 1
> +#define GCK_ID_QSPI2 2
> +#define GCK_ID_SDMMC0 3
> +#define GCK_ID_PI 4
> +#define GCK_ID_MCAN0 5
> +#define GCK_ID_MCAN1 6
> +#define GCK_ID_FLEXCOM0 7
> +#define GCK_ID_FLEXCOM1 8
> +#define GCK_ID_FLEXCOM2 9
> +#define GCK_ID_FLEXCOM3 10
> +#define GCK_ID_FLEXCOM4 11
> +#define GCK_ID_TIMER 12
> +#define GCK_ID_USB_REFCLK 13
> +
> +#define N_CLOCKS 14
> +
> +#endif
>
--
Nicolas Ferre