Document device tree optional properties for ASPEED watchdog.
Reference properties in ASPEED watchdog driver and configure accordingly.
Christopher Bostic (2):
drivers/watchdog: Add optional ASPEED device tree properties
drivers/watchdog: ASPEED reference dev tree properties for config
.../devicetree/bindings/watchdog/aspeed-wdt.txt | 24 ++++++++++++++++++++++
drivers/watchdog/aspeed_wdt.c | 20 +++++++++++++-----
2 files changed, 39 insertions(+), 5 deletions(-)
--
1.8.2.2
Reference the system device tree when configuring the watchdog
engines. If optional property 'aspeed,no-sys-reset' is specified
then override the default config and do not set sys reset mode.
If optional property 'aspeed,no-soc-reset' is specified then
override the default and do not set soc reset mode.
Signed-off-by: Christopher Bostic <[email protected]>
---
v3 - Invert the logic for system reset dev tree property to
preserve backwards compatibility. If not specified the
default is to configure for system reset
- Add check for 'aspeed,no-soc-reset' property and only if
not present is SOC reset to be configured. This preserves
backwards compatibility.
v2 - Change of_get_property() to of_property_read_bool()
- Remove redundant check for NULL struct device_node pointer
- Optional property names now start with prefix 'aspeed,'
---
drivers/watchdog/aspeed_wdt.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
index 1c65258..ace74f8 100644
--- a/drivers/watchdog/aspeed_wdt.c
+++ b/drivers/watchdog/aspeed_wdt.c
@@ -140,6 +140,7 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
{
struct aspeed_wdt *wdt;
struct resource *res;
+ struct device_node *np;
int ret;
wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
@@ -166,12 +167,21 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
/*
* Control reset on a per-device basis to ensure the
- * host is not affected by a BMC reboot, so only reset
- * the SOC and not the full chip
+ * host is not affected by a BMC reboot
*/
- wdt->ctrl = WDT_CTRL_RESET_MODE_SOC |
- WDT_CTRL_1MHZ_CLK |
- WDT_CTRL_RESET_SYSTEM;
+ wdt->ctrl = WDT_CTRL_1MHZ_CLK;
+
+ np = pdev->dev.of_node;
+ if (!(of_property_read_bool(np, "aspeed,no-soc-reset")))
+ wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC;
+
+ if (!(of_property_read_bool(np, "aspeed,no-sys-reset")))
+ wdt->ctrl |= WDT_CTRL_RESET_SYSTEM;
+
+ if (of_property_read_bool(np, "aspeed,external-signal"))
+ wdt->ctrl |= WDT_CTRL_WDT_EXT;
+
+ writel(wdt->ctrl, wdt->base + WDT_CTRL);
if (readl(wdt->base + WDT_CTRL) & WDT_CTRL_ENABLE) {
aspeed_wdt_start(&wdt->wdd);
--
1.8.2.2
Describe device tree optional properties:
* aspeed,arm-reet - ARM CPU reset on signal
* aspeed,no-soc-reset - SOC reset on signal
* aspeed,no-sys-reset - System reset on signal
* aspeed,interrupt - Interrupt CPU on signal
* aspeed,external-signal - Generate external signal (WDT1 and WDT2 only)
* aspeed,alt-boot - Boot from alternate block on signal
Signed-off-by: Christopher Bostic <[email protected]>
---
v3 - Invert soc and sys reset to 'no' to preserve backwards
compatibility. SOC and SYS reset will be set by default
without any optional parameters set
v2 - Add 'aspeed,' prefix to all optional properties
- Add arm-reset, soc-reset, interrupt, alt-boot properties
---
.../devicetree/bindings/watchdog/aspeed-wdt.txt | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
index c5e74d7..6f18005 100644
--- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
@@ -8,9 +8,33 @@ Required properties:
- reg: physical base address of the controller and length of memory mapped
region
+Optional properties:
+ Signal behavior - Whenever a timeout occurs the watchdog can be programmed
+ to generate/not generate 6 types of signals:
+
+ - aspeed,arm-reset: If property is present then reset ARM CPU only.
+ If not specified no ARM CPU reset is done.
+
+ - aspeed,no-soc-reset: If property is present then do not reset SOC.
+ If not specified then SOC reset is done.
+
+ - aspeed,no-sys-reset: If property is present then do not reset system.
+ Typcally used in tandem with 'aspeed-external-signal'
+ If not specified then system reset is done.
+
+ - aspeed,interrupt: If property is present then interrupt CPU.
+ If not specified then don't interrupt CPU.
+
+ - aspeed,external-signal: If property is present then signal is sent to
+ external reset counter (only WDT1 and WDT2). If not
+ specified no external signal is sent.
+ - aspeed,alt-boot: If property is present then boot from alternate block.
+
Example:
wdt1: watchdog@1e785000 {
compatible = "aspeed,ast2400-wdt";
reg = <0x1e785000 0x1c>;
+ aspeed,no-sys-reset;
+ aspeed,external-signal;
};
--
1.8.2.2
On 06/28/2017 05:28 PM, Christopher Bostic wrote:
> Describe device tree optional properties:
>
> * aspeed,arm-reet - ARM CPU reset on signal
> * aspeed,no-soc-reset - SOC reset on signal
> * aspeed,no-sys-reset - System reset on signal
> * aspeed,interrupt - Interrupt CPU on signal
> * aspeed,external-signal - Generate external signal (WDT1 and WDT2 only)
> * aspeed,alt-boot - Boot from alternate block on signal
>
> Signed-off-by: Christopher Bostic <[email protected]>
> ---
> v3 - Invert soc and sys reset to 'no' to preserve backwards
> compatibility. SOC and SYS reset will be set by default
> without any optional parameters set
> v2 - Add 'aspeed,' prefix to all optional properties
> - Add arm-reset, soc-reset, interrupt, alt-boot properties
> ---
> .../devicetree/bindings/watchdog/aspeed-wdt.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> index c5e74d7..6f18005 100644
> --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> @@ -8,9 +8,33 @@ Required properties:
> - reg: physical base address of the controller and length of memory mapped
> region
>
> +Optional properties:
> + Signal behavior - Whenever a timeout occurs the watchdog can be programmed
> + to generate/not generate 6 types of signals:
> +
> + - aspeed,arm-reset: If property is present then reset ARM CPU only.
> + If not specified no ARM CPU reset is done.
> +
> + - aspeed,no-soc-reset: If property is present then do not reset SOC.
> + If not specified then SOC reset is done.
> +
> + - aspeed,no-sys-reset: If property is present then do not reset system.
> + Typcally used in tandem with 'aspeed-external-signal'
Is this correct ? As I understand the datasheet, it could also used in tandem with
aspeed,interrupt.
> + If not specified then system reset is done.
> +
I'll leave it up to Rob to decide, but for my part I don't understand no-soc-reset.
I would instead use four properties.
aspeed,arm-reset
aspeed,soc-reset
aspeed,sys-reset (which is the default)
aspeed,no-reset
There should also be a note explaining that the above are mutually exclusive.
> + - aspeed,interrupt: If property is present then interrupt CPU.
> + If not specified then don't interrupt CPU.
> +
> + - aspeed,external-signal: If property is present then signal is sent to
> + external reset counter (only WDT1 and WDT2). If not
> + specified no external signal is sent.
For consistency, either add an empty line here or remove the empty lines above
> + - aspeed,alt-boot: If property is present then boot from alternate block.
> +
> Example:
>
> wdt1: watchdog@1e785000 {
> compatible = "aspeed,ast2400-wdt";
> reg = <0x1e785000 0x1c>;
> + aspeed,no-sys-reset;
> + aspeed,external-signal;
> };
>
On 6/28/17 10:33 PM, Guenter Roeck wrote:
> On 06/28/2017 05:28 PM, Christopher Bostic wrote:
>> Describe device tree optional properties:
>>
>> * aspeed,arm-reet - ARM CPU reset on signal
>> * aspeed,no-soc-reset - SOC reset on signal
>> * aspeed,no-sys-reset - System reset on signal
>> * aspeed,interrupt - Interrupt CPU on signal
>> * aspeed,external-signal - Generate external signal (WDT1 and WDT2
>> only)
>> * aspeed,alt-boot - Boot from alternate block on signal
>>
>> Signed-off-by: Christopher Bostic <[email protected]>
>> ---
>> v3 - Invert soc and sys reset to 'no' to preserve backwards
>> compatibility. SOC and SYS reset will be set by default
>> without any optional parameters set
>> v2 - Add 'aspeed,' prefix to all optional properties
>> - Add arm-reset, soc-reset, interrupt, alt-boot properties
>> ---
>> .../devicetree/bindings/watchdog/aspeed-wdt.txt | 24
>> ++++++++++++++++++++++
>> 1 file changed, 24 insertions(+)
>>
>> diff --git
>> a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> index c5e74d7..6f18005 100644
>> --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>> @@ -8,9 +8,33 @@ Required properties:
>> - reg: physical base address of the controller and length of
>> memory mapped
>> region
>> +Optional properties:
>> + Signal behavior - Whenever a timeout occurs the watchdog can be
>> programmed
>> + to generate/not generate 6 types of signals:
>> +
>> + - aspeed,arm-reset: If property is present then reset ARM CPU only.
>> + If not specified no ARM CPU reset is done.
>> +
>> + - aspeed,no-soc-reset: If property is present then do not reset SOC.
>> + If not specified then SOC reset is done.
>> +
>> + - aspeed,no-sys-reset: If property is present then do not reset
>> system.
>> + Typcally used in tandem with 'aspeed-external-signal'
>
> Is this correct ? As I understand the datasheet, it could also used in
> tandem with
> aspeed,interrupt.
True, that should be documented. Will add that.
>
>> + If not specified then system reset is done.
>> +
>
> I'll leave it up to Rob to decide, but for my part I don't understand
> no-soc-reset.
As the aspeed watchdog driver exists prior to this change an SOC reset
is done by
default. In order to preserve backwards compatibility a missing
optional property
should result in default behavior. I however need to be able to specify
that SOC
reset be disabled in some way. This goes back to our discussion about
why we'd
ever want to disable SYSTEM reset in the first place. Same reasoning
applies for
SOC reset.
> I would instead use four properties.
>
> aspeed,arm-reset
> aspeed,soc-reset
Per my response above I think it should remain as aspeed,no-soc-reset due to
backwards compatibility requirements.
> aspeed,sys-reset (which is the default)
Again as per our discussion yesterday I need some way to specify how system
reset is to be done. For backwards compatibility, a lack of parameter
here would
result in a system reset being configured. Only way to indicate to the
driver
that no system reset is to be done is to indicate 'no' system reset in
the optional
parameter.
> aspeed,no-reset
This parameter seems ambiguous as we could be doing a 'no system reset'
or a 'no SOC reset' in theory.
>
> There should also be a note explaining that the above are mutually
> exclusive.
>
OK, will add that.
>> + - aspeed,interrupt: If property is present then interrupt CPU.
>> + If not specified then don't interrupt CPU.
>> +
>> + - aspeed,external-signal: If property is present then signal is
>> sent to
>> + external reset counter (only WDT1 and WDT2). If not
>> + specified no external signal is sent.
>
> For consistency, either add an empty line here or remove the empty
> lines above
Will fix.
Thanks,
Chris
>
>> + - aspeed,alt-boot: If property is present then boot from
>> alternate block.
>> +
>> Example:
>> wdt1: watchdog@1e785000 {
>> compatible = "aspeed,ast2400-wdt";
>> reg = <0x1e785000 0x1c>;
>> + aspeed,no-sys-reset;
>> + aspeed,external-signal;
>> };
>>
>
On Thu, Jun 29, 2017 at 08:39:59AM -0500, Christopher Bostic wrote:
>
>
> On 6/28/17 10:33 PM, Guenter Roeck wrote:
> >On 06/28/2017 05:28 PM, Christopher Bostic wrote:
> >>Describe device tree optional properties:
> >>
> >> * aspeed,arm-reet - ARM CPU reset on signal
> >> * aspeed,no-soc-reset - SOC reset on signal
> >> * aspeed,no-sys-reset - System reset on signal
> >> * aspeed,interrupt - Interrupt CPU on signal
> >> * aspeed,external-signal - Generate external signal (WDT1 and WDT2
> >>only)
> >> * aspeed,alt-boot - Boot from alternate block on signal
> >>
> >>Signed-off-by: Christopher Bostic <[email protected]>
> >>---
> >>v3 - Invert soc and sys reset to 'no' to preserve backwards
> >> compatibility. SOC and SYS reset will be set by default
> >> without any optional parameters set
> >>v2 - Add 'aspeed,' prefix to all optional properties
> >> - Add arm-reset, soc-reset, interrupt, alt-boot properties
> >>---
> >> .../devicetree/bindings/watchdog/aspeed-wdt.txt | 24
> >>++++++++++++++++++++++
> >> 1 file changed, 24 insertions(+)
> >>
> >>diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>index c5e74d7..6f18005 100644
> >>--- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>+++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>@@ -8,9 +8,33 @@ Required properties:
> >> - reg: physical base address of the controller and length of memory
> >>mapped
> >> region
> >> +Optional properties:
> >>+ Signal behavior - Whenever a timeout occurs the watchdog can be
> >>programmed
> >>+ to generate/not generate 6 types of signals:
> >>+
> >>+ - aspeed,arm-reset: If property is present then reset ARM CPU only.
> >>+ If not specified no ARM CPU reset is done.
> >>+
> >>+ - aspeed,no-soc-reset: If property is present then do not reset SOC.
> >>+ If not specified then SOC reset is done.
> >>+
> >>+ - aspeed,no-sys-reset: If property is present then do not reset
> >>system.
> >>+ Typcally used in tandem with 'aspeed-external-signal'
> >
> >Is this correct ? As I understand the datasheet, it could also used in
> >tandem with
> >aspeed,interrupt.
> True, that should be documented. Will add that.
> >
> >>+ If not specified then system reset is done.
> >>+
> >
> >I'll leave it up to Rob to decide, but for my part I don't understand
> >no-soc-reset.
> As the aspeed watchdog driver exists prior to this change an SOC reset is
> done by
> default. In order to preserve backwards compatibility a missing optional
> property
> should result in default behavior. I however need to be able to specify
> that SOC
> reset be disabled in some way. This goes back to our discussion about why
> we'd
> ever want to disable SYSTEM reset in the first place. Same reasoning
> applies for
> SOC reset.
>
> >I would instead use four properties.
> >
> > aspeed,arm-reset
> > aspeed,soc-reset
> Per my response above I think it should remain as aspeed,no-soc-reset due to
> backwards compatibility requirements.
The same can be accomplished with "aspeed,no-reset", which would avoid the, in
my opinion, awkward "no-{sys,soc}-reset" poperties.
> > aspeed,sys-reset (which is the default)
> Again as per our discussion yesterday I need some way to specify how system
> reset is to be done. For backwards compatibility, a lack of parameter here
> would
> result in a system reset being configured. Only way to indicate to the
> driver
> that no system reset is to be done is to indicate 'no' system reset in the
> optional
> parameter.
Or "aspeed,no-reset".
> > aspeed,no-reset
> This parameter seems ambiguous as we could be doing a 'no system reset'
> or a 'no SOC reset' in theory.
{arm,soc,sys}-reset are mutually exclusive per datasheet, and there is a
separate configuration bit which enables the reset in the first place.
I don't see how that is ambiguous.
Anyway, I don't think we are making any progress here. Let's wait for
guidance from Rob.
Guenter
> >
> >There should also be a note explaining that the above are mutually
> >exclusive.
> >
> OK, will add that.
>
> >>+ - aspeed,interrupt: If property is present then interrupt CPU.
> >>+ If not specified then don't interrupt CPU.
> >>+
> >>+ - aspeed,external-signal: If property is present then signal is sent
> >>to
> >>+ external reset counter (only WDT1 and WDT2). If not
> >>+ specified no external signal is sent.
> >
> >For consistency, either add an empty line here or remove the empty lines
> >above
>
> Will fix.
>
> Thanks,
> Chris
> >
> >>+ - aspeed,alt-boot: If property is present then boot from alternate
> >>block.
> >>+
> >> Example:
> >> wdt1: watchdog@1e785000 {
> >> compatible = "aspeed,ast2400-wdt";
> >> reg = <0x1e785000 0x1c>;
> >>+ aspeed,no-sys-reset;
> >>+ aspeed,external-signal;
> >> };
> >>
> >
>
On Thu, Jun 29, 2017 at 08:04:17AM -0700, Guenter Roeck wrote:
> On Thu, Jun 29, 2017 at 08:39:59AM -0500, Christopher Bostic wrote:
> >
> >
> > On 6/28/17 10:33 PM, Guenter Roeck wrote:
> > >On 06/28/2017 05:28 PM, Christopher Bostic wrote:
> > >>Describe device tree optional properties:
> > >>
> > >> * aspeed,arm-reet - ARM CPU reset on signal
> > >> * aspeed,no-soc-reset - SOC reset on signal
> > >> * aspeed,no-sys-reset - System reset on signal
> > >> * aspeed,interrupt - Interrupt CPU on signal
> > >> * aspeed,external-signal - Generate external signal (WDT1 and WDT2
> > >>only)
> > >> * aspeed,alt-boot - Boot from alternate block on signal
> > >>
> > >>Signed-off-by: Christopher Bostic <[email protected]>
> > >>---
> > >>v3 - Invert soc and sys reset to 'no' to preserve backwards
> > >> compatibility. SOC and SYS reset will be set by default
> > >> without any optional parameters set
> > >>v2 - Add 'aspeed,' prefix to all optional properties
> > >> - Add arm-reset, soc-reset, interrupt, alt-boot properties
> > >>---
> > >> .../devicetree/bindings/watchdog/aspeed-wdt.txt | 24
> > >>++++++++++++++++++++++
> > >> 1 file changed, 24 insertions(+)
> > >>
> > >>diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> > >>b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> > >>index c5e74d7..6f18005 100644
> > >>--- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> > >>+++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> > >>@@ -8,9 +8,33 @@ Required properties:
> > >> - reg: physical base address of the controller and length of memory
> > >>mapped
> > >> region
> > >> +Optional properties:
> > >>+ Signal behavior - Whenever a timeout occurs the watchdog can be
> > >>programmed
> > >>+ to generate/not generate 6 types of signals:
> > >>+
> > >>+ - aspeed,arm-reset: If property is present then reset ARM CPU only.
> > >>+ If not specified no ARM CPU reset is done.
> > >>+
> > >>+ - aspeed,no-soc-reset: If property is present then do not reset SOC.
> > >>+ If not specified then SOC reset is done.
> > >>+
> > >>+ - aspeed,no-sys-reset: If property is present then do not reset
> > >>system.
> > >>+ Typcally used in tandem with 'aspeed-external-signal'
> > >
> > >Is this correct ? As I understand the datasheet, it could also used in
> > >tandem with
> > >aspeed,interrupt.
> > True, that should be documented. Will add that.
> > >
> > >>+ If not specified then system reset is done.
> > >>+
> > >
> > >I'll leave it up to Rob to decide, but for my part I don't understand
> > >no-soc-reset.
> > As the aspeed watchdog driver exists prior to this change an SOC reset is
> > done by
> > default. In order to preserve backwards compatibility a missing optional
> > property
> > should result in default behavior. I however need to be able to specify
> > that SOC
> > reset be disabled in some way. This goes back to our discussion about why
> > we'd
> > ever want to disable SYSTEM reset in the first place. Same reasoning
> > applies for
> > SOC reset.
> >
> > >I would instead use four properties.
> > >
> > > aspeed,arm-reset
> > > aspeed,soc-reset
> > Per my response above I think it should remain as aspeed,no-soc-reset due to
> > backwards compatibility requirements.
>
> The same can be accomplished with "aspeed,no-reset", which would avoid the, in
> my opinion, awkward "no-{sys,soc}-reset" poperties.
>
> > > aspeed,sys-reset (which is the default)
> > Again as per our discussion yesterday I need some way to specify how system
> > reset is to be done. For backwards compatibility, a lack of parameter here
> > would
> > result in a system reset being configured. Only way to indicate to the
> > driver
> > that no system reset is to be done is to indicate 'no' system reset in the
> > optional
> > parameter.
>
> Or "aspeed,no-reset".
>
> > > aspeed,no-reset
> > This parameter seems ambiguous as we could be doing a 'no system reset'
> > or a 'no SOC reset' in theory.
>
> {arm,soc,sys}-reset are mutually exclusive per datasheet, and there is a
> separate configuration bit which enables the reset in the first place.
> I don't see how that is ambiguous.
>
> Anyway, I don't think we are making any progress here. Let's wait for
> guidance from Rob.
I tend to agree with Guenter.
Maybe using the form 'aspeed,reset-type = "cpu|soc|system"' would be
more aligned to the type of reset being mutually exclusive.
Rob
On 7/6/17 9:35 AM, Rob Herring wrote:
> On Thu, Jun 29, 2017 at 08:04:17AM -0700, Guenter Roeck wrote:
>> On Thu, Jun 29, 2017 at 08:39:59AM -0500, Christopher Bostic wrote:
>>>
>>> On 6/28/17 10:33 PM, Guenter Roeck wrote:
>>>> On 06/28/2017 05:28 PM, Christopher Bostic wrote:
>>>>> Describe device tree optional properties:
>>>>>
>>>>> * aspeed,arm-reet - ARM CPU reset on signal
>>>>> * aspeed,no-soc-reset - SOC reset on signal
>>>>> * aspeed,no-sys-reset - System reset on signal
>>>>> * aspeed,interrupt - Interrupt CPU on signal
>>>>> * aspeed,external-signal - Generate external signal (WDT1 and WDT2
>>>>> only)
>>>>> * aspeed,alt-boot - Boot from alternate block on signal
>>>>>
>>>>> Signed-off-by: Christopher Bostic <[email protected]>
>>>>> ---
>>>>> v3 - Invert soc and sys reset to 'no' to preserve backwards
>>>>> compatibility. SOC and SYS reset will be set by default
>>>>> without any optional parameters set
>>>>> v2 - Add 'aspeed,' prefix to all optional properties
>>>>> - Add arm-reset, soc-reset, interrupt, alt-boot properties
>>>>> ---
>>>>> .../devicetree/bindings/watchdog/aspeed-wdt.txt | 24
>>>>> ++++++++++++++++++++++
>>>>> 1 file changed, 24 insertions(+)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>> b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>> index c5e74d7..6f18005 100644
>>>>> --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>> +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>> @@ -8,9 +8,33 @@ Required properties:
>>>>> - reg: physical base address of the controller and length of memory
>>>>> mapped
>>>>> region
>>>>> +Optional properties:
>>>>> + Signal behavior - Whenever a timeout occurs the watchdog can be
>>>>> programmed
>>>>> + to generate/not generate 6 types of signals:
>>>>> +
>>>>> + - aspeed,arm-reset: If property is present then reset ARM CPU only.
>>>>> + If not specified no ARM CPU reset is done.
>>>>> +
>>>>> + - aspeed,no-soc-reset: If property is present then do not reset SOC.
>>>>> + If not specified then SOC reset is done.
>>>>> +
>>>>> + - aspeed,no-sys-reset: If property is present then do not reset
>>>>> system.
>>>>> + Typcally used in tandem with 'aspeed-external-signal'
>>>> Is this correct ? As I understand the datasheet, it could also used in
>>>> tandem with
>>>> aspeed,interrupt.
>>> True, that should be documented. Will add that.
>>>>> + If not specified then system reset is done.
>>>>> +
>>>> I'll leave it up to Rob to decide, but for my part I don't understand
>>>> no-soc-reset.
>>> As the aspeed watchdog driver exists prior to this change an SOC reset is
>>> done by
>>> default. In order to preserve backwards compatibility a missing optional
>>> property
>>> should result in default behavior. I however need to be able to specify
>>> that SOC
>>> reset be disabled in some way. This goes back to our discussion about why
>>> we'd
>>> ever want to disable SYSTEM reset in the first place. Same reasoning
>>> applies for
>>> SOC reset.
>>>
>>>> I would instead use four properties.
>>>>
>>>> aspeed,arm-reset
>>>> aspeed,soc-reset
>>> Per my response above I think it should remain as aspeed,no-soc-reset due to
>>> backwards compatibility requirements.
>> The same can be accomplished with "aspeed,no-reset", which would avoid the, in
>> my opinion, awkward "no-{sys,soc}-reset" poperties.
>>
>>>> aspeed,sys-reset (which is the default)
>>> Again as per our discussion yesterday I need some way to specify how system
>>> reset is to be done. For backwards compatibility, a lack of parameter here
>>> would
>>> result in a system reset being configured. Only way to indicate to the
>>> driver
>>> that no system reset is to be done is to indicate 'no' system reset in the
>>> optional
>>> parameter.
>> Or "aspeed,no-reset".
>>
>>>> aspeed,no-reset
>>> This parameter seems ambiguous as we could be doing a 'no system reset'
>>> or a 'no SOC reset' in theory.
>> {arm,soc,sys}-reset are mutually exclusive per datasheet, and there is a
>> separate configuration bit which enables the reset in the first place.
>> I don't see how that is ambiguous.
>>
>> Anyway, I don't think we are making any progress here. Let's wait for
>> guidance from Rob.
> I tend to agree with Guenter.
>
> Maybe using the form 'aspeed,reset-type = "cpu|soc|system"' would be
> more aligned to the type of reset being mutually exclusive.
OK I'll update to this method.
Thanks
-Chris
>
> Rob
>
On Thu, Jul 06, 2017 at 02:27:18PM -0500, Christopher Bostic wrote:
>
>
> On 7/6/17 9:35 AM, Rob Herring wrote:
> >On Thu, Jun 29, 2017 at 08:04:17AM -0700, Guenter Roeck wrote:
> >>On Thu, Jun 29, 2017 at 08:39:59AM -0500, Christopher Bostic wrote:
> >>>
> >>>On 6/28/17 10:33 PM, Guenter Roeck wrote:
> >>>>On 06/28/2017 05:28 PM, Christopher Bostic wrote:
> >>>>>Describe device tree optional properties:
> >>>>>
> >>>>> * aspeed,arm-reet - ARM CPU reset on signal
> >>>>> * aspeed,no-soc-reset - SOC reset on signal
> >>>>> * aspeed,no-sys-reset - System reset on signal
> >>>>> * aspeed,interrupt - Interrupt CPU on signal
> >>>>> * aspeed,external-signal - Generate external signal (WDT1 and WDT2
> >>>>>only)
> >>>>> * aspeed,alt-boot - Boot from alternate block on signal
> >>>>>
> >>>>>Signed-off-by: Christopher Bostic <[email protected]>
> >>>>>---
> >>>>>v3 - Invert soc and sys reset to 'no' to preserve backwards
> >>>>> compatibility. SOC and SYS reset will be set by default
> >>>>> without any optional parameters set
> >>>>>v2 - Add 'aspeed,' prefix to all optional properties
> >>>>> - Add arm-reset, soc-reset, interrupt, alt-boot properties
> >>>>>---
> >>>>> .../devicetree/bindings/watchdog/aspeed-wdt.txt | 24
> >>>>>++++++++++++++++++++++
> >>>>> 1 file changed, 24 insertions(+)
> >>>>>
> >>>>>diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>>>>b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>>>>index c5e74d7..6f18005 100644
> >>>>>--- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>>>>+++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
> >>>>>@@ -8,9 +8,33 @@ Required properties:
> >>>>> - reg: physical base address of the controller and length of memory
> >>>>>mapped
> >>>>> region
> >>>>> +Optional properties:
> >>>>>+ Signal behavior - Whenever a timeout occurs the watchdog can be
> >>>>>programmed
> >>>>>+ to generate/not generate 6 types of signals:
> >>>>>+
> >>>>>+ - aspeed,arm-reset: If property is present then reset ARM CPU only.
> >>>>>+ If not specified no ARM CPU reset is done.
> >>>>>+
> >>>>>+ - aspeed,no-soc-reset: If property is present then do not reset SOC.
> >>>>>+ If not specified then SOC reset is done.
> >>>>>+
> >>>>>+ - aspeed,no-sys-reset: If property is present then do not reset
> >>>>>system.
> >>>>>+ Typcally used in tandem with 'aspeed-external-signal'
> >>>>Is this correct ? As I understand the datasheet, it could also used in
> >>>>tandem with
> >>>>aspeed,interrupt.
> >>>True, that should be documented. Will add that.
> >>>>>+ If not specified then system reset is done.
> >>>>>+
> >>>>I'll leave it up to Rob to decide, but for my part I don't understand
> >>>>no-soc-reset.
> >>>As the aspeed watchdog driver exists prior to this change an SOC reset is
> >>>done by
> >>>default. In order to preserve backwards compatibility a missing optional
> >>>property
> >>>should result in default behavior. I however need to be able to specify
> >>>that SOC
> >>>reset be disabled in some way. This goes back to our discussion about why
> >>>we'd
> >>>ever want to disable SYSTEM reset in the first place. Same reasoning
> >>>applies for
> >>>SOC reset.
> >>>
> >>>>I would instead use four properties.
> >>>>
> >>>> aspeed,arm-reset
> >>>> aspeed,soc-reset
> >>>Per my response above I think it should remain as aspeed,no-soc-reset due to
> >>>backwards compatibility requirements.
> >>The same can be accomplished with "aspeed,no-reset", which would avoid the, in
> >>my opinion, awkward "no-{sys,soc}-reset" poperties.
> >>
> >>>> aspeed,sys-reset (which is the default)
> >>>Again as per our discussion yesterday I need some way to specify how system
> >>>reset is to be done. For backwards compatibility, a lack of parameter here
> >>>would
> >>>result in a system reset being configured. Only way to indicate to the
> >>>driver
> >>>that no system reset is to be done is to indicate 'no' system reset in the
> >>>optional
> >>>parameter.
> >>Or "aspeed,no-reset".
> >>
> >>>> aspeed,no-reset
> >>>This parameter seems ambiguous as we could be doing a 'no system reset'
> >>>or a 'no SOC reset' in theory.
> >>{arm,soc,sys}-reset are mutually exclusive per datasheet, and there is a
> >>separate configuration bit which enables the reset in the first place.
> >>I don't see how that is ambiguous.
> >>
> >>Anyway, I don't think we are making any progress here. Let's wait for
> >>guidance from Rob.
> >I tend to agree with Guenter.
> >
> >Maybe using the form 'aspeed,reset-type = "cpu|soc|system"' would be
> >more aligned to the type of reset being mutually exclusive.
>
> OK I'll update to this method.
>
Maybe add 'aspeed,reset-type = "none"' ? The default (no property) would
then be "system".
Thanks,
Guenter
On 7/6/17 3:48 PM, Guenter Roeck wrote:
> On Thu, Jul 06, 2017 at 02:27:18PM -0500, Christopher Bostic wrote:
>>
>> On 7/6/17 9:35 AM, Rob Herring wrote:
>>> On Thu, Jun 29, 2017 at 08:04:17AM -0700, Guenter Roeck wrote:
>>>> On Thu, Jun 29, 2017 at 08:39:59AM -0500, Christopher Bostic wrote:
>>>>> On 6/28/17 10:33 PM, Guenter Roeck wrote:
>>>>>> On 06/28/2017 05:28 PM, Christopher Bostic wrote:
>>>>>>> Describe device tree optional properties:
>>>>>>>
>>>>>>> * aspeed,arm-reet - ARM CPU reset on signal
>>>>>>> * aspeed,no-soc-reset - SOC reset on signal
>>>>>>> * aspeed,no-sys-reset - System reset on signal
>>>>>>> * aspeed,interrupt - Interrupt CPU on signal
>>>>>>> * aspeed,external-signal - Generate external signal (WDT1 and WDT2
>>>>>>> only)
>>>>>>> * aspeed,alt-boot - Boot from alternate block on signal
>>>>>>>
>>>>>>> Signed-off-by: Christopher Bostic <[email protected]>
>>>>>>> ---
>>>>>>> v3 - Invert soc and sys reset to 'no' to preserve backwards
>>>>>>> compatibility. SOC and SYS reset will be set by default
>>>>>>> without any optional parameters set
>>>>>>> v2 - Add 'aspeed,' prefix to all optional properties
>>>>>>> - Add arm-reset, soc-reset, interrupt, alt-boot properties
>>>>>>> ---
>>>>>>> .../devicetree/bindings/watchdog/aspeed-wdt.txt | 24
>>>>>>> ++++++++++++++++++++++
>>>>>>> 1 file changed, 24 insertions(+)
>>>>>>>
>>>>>>> diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>>>> b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>>>> index c5e74d7..6f18005 100644
>>>>>>> --- a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>>>> +++ b/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
>>>>>>> @@ -8,9 +8,33 @@ Required properties:
>>>>>>> - reg: physical base address of the controller and length of memory
>>>>>>> mapped
>>>>>>> region
>>>>>>> +Optional properties:
>>>>>>> + Signal behavior - Whenever a timeout occurs the watchdog can be
>>>>>>> programmed
>>>>>>> + to generate/not generate 6 types of signals:
>>>>>>> +
>>>>>>> + - aspeed,arm-reset: If property is present then reset ARM CPU only.
>>>>>>> + If not specified no ARM CPU reset is done.
>>>>>>> +
>>>>>>> + - aspeed,no-soc-reset: If property is present then do not reset SOC.
>>>>>>> + If not specified then SOC reset is done.
>>>>>>> +
>>>>>>> + - aspeed,no-sys-reset: If property is present then do not reset
>>>>>>> system.
>>>>>>> + Typcally used in tandem with 'aspeed-external-signal'
>>>>>> Is this correct ? As I understand the datasheet, it could also used in
>>>>>> tandem with
>>>>>> aspeed,interrupt.
>>>>> True, that should be documented. Will add that.
>>>>>>> + If not specified then system reset is done.
>>>>>>> +
>>>>>> I'll leave it up to Rob to decide, but for my part I don't understand
>>>>>> no-soc-reset.
>>>>> As the aspeed watchdog driver exists prior to this change an SOC reset is
>>>>> done by
>>>>> default. In order to preserve backwards compatibility a missing optional
>>>>> property
>>>>> should result in default behavior. I however need to be able to specify
>>>>> that SOC
>>>>> reset be disabled in some way. This goes back to our discussion about why
>>>>> we'd
>>>>> ever want to disable SYSTEM reset in the first place. Same reasoning
>>>>> applies for
>>>>> SOC reset.
>>>>>
>>>>>> I would instead use four properties.
>>>>>>
>>>>>> aspeed,arm-reset
>>>>>> aspeed,soc-reset
>>>>> Per my response above I think it should remain as aspeed,no-soc-reset due to
>>>>> backwards compatibility requirements.
>>>> The same can be accomplished with "aspeed,no-reset", which would avoid the, in
>>>> my opinion, awkward "no-{sys,soc}-reset" poperties.
>>>>
>>>>>> aspeed,sys-reset (which is the default)
>>>>> Again as per our discussion yesterday I need some way to specify how system
>>>>> reset is to be done. For backwards compatibility, a lack of parameter here
>>>>> would
>>>>> result in a system reset being configured. Only way to indicate to the
>>>>> driver
>>>>> that no system reset is to be done is to indicate 'no' system reset in the
>>>>> optional
>>>>> parameter.
>>>> Or "aspeed,no-reset".
>>>>
>>>>>> aspeed,no-reset
>>>>> This parameter seems ambiguous as we could be doing a 'no system reset'
>>>>> or a 'no SOC reset' in theory.
>>>> {arm,soc,sys}-reset are mutually exclusive per datasheet, and there is a
>>>> separate configuration bit which enables the reset in the first place.
>>>> I don't see how that is ambiguous.
>>>>
>>>> Anyway, I don't think we are making any progress here. Let's wait for
>>>> guidance from Rob.
>>> I tend to agree with Guenter.
>>>
>>> Maybe using the form 'aspeed,reset-type = "cpu|soc|system"' would be
>>> more aligned to the type of reset being mutually exclusive.
>> OK I'll update to this method.
>>
> Maybe add 'aspeed,reset-type = "none"' ? The default (no property) would
> then be "system".
That's what I was thinking -will do that.
Thanks,
Chris
>
> Thanks,
> Guenter
>