2024-01-26 09:17:32

by Qiang Yu

[permalink] [raw]
Subject: [PATCH] arm64: dts: qcom: aim300: Enable PCIe0 for WLAN

WLAN is connected to PCIe0 on aim300 board. Hence, enable PCIe0 to let
WLAN work.

Signed-off-by: Qiang Yu <[email protected]>
---
This change is tested and rebased on https://lore.kernel.org/linux-arm-msm/[email protected]/

arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
index 20a3c97..d42cfac 100644
--- a/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
@@ -251,7 +251,7 @@

&gcc {
clocks = <&bi_tcxo_div2>, <&sleep_clk>,
- <0>,
+ <&pcie0_phy>,
<&pcie1_phy>,
<0>,
<&ufs_mem_phy 0>,
@@ -349,6 +349,23 @@
status = "okay";
};

+&pcie0 {
+ wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+ perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie0_default_state>;
+
+ status = "okay";
+};
+
+&pcie0_phy {
+ vdda-phy-supply = <&vreg_l1e_0p88>;
+ vdda-pll-supply = <&vreg_l3e_1p2>;
+
+ status = "okay";
+};
+
&pm8550_flash {
status = "okay";

--
2.7.4



2024-02-09 21:44:54

by Konrad Dybcio

[permalink] [raw]
Subject: Re: [PATCH] arm64: dts: qcom: aim300: Enable PCIe0 for WLAN

On 26.01.2024 09:22, Qiang Yu wrote:
> WLAN is connected to PCIe0 on aim300 board. Hence, enable PCIe0 to let
> WLAN work.
>
> Signed-off-by: Qiang Yu <[email protected]>
> ---
> This change is tested and rebased on https://lore.kernel.org/linux-arm-msm/[email protected]/
>
> arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts | 19 ++++++++++++++++++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
> index 20a3c97..d42cfac 100644
> --- a/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs8550-aim300-aiot.dts
> @@ -251,7 +251,7 @@
>
> &gcc {
> clocks = <&bi_tcxo_div2>, <&sleep_clk>,
> - <0>,
> + <&pcie0_phy>,
> <&pcie1_phy>,
> <0>,
> <&ufs_mem_phy 0>,
> @@ -349,6 +349,23 @@
> status = "okay";
> };
>
> +&pcie0 {
> + wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
> + perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie0_default_state>;

property-n
property-names

Acked-by: Konrad Dybcio <[email protected]>

Konrad