Hi,
In recent kernels, my X display (running with a KMS-enabled X server)
has been very jittery and with lots of glitching and tearing --- sorry
if this isn't the correct technical term, not sure what it is --- on my
T400 Lenovo laptop. It seems related to what is on the desktop, and
moving the mouse does seem to affect the rate and percentage of the
screen which jitters --- which is enough to be very distracting,
although I can still read the contents of the windows where the screen
is tearing/glitching/flashing.
I bisected it down to this commit:
74dff282237ea8c0a5df1afd8526eac4b6cee063 is the first bad commit
commit 74dff282237ea8c0a5df1afd8526eac4b6cee063
Author: Jesse Barnes <[email protected]>
Date: Mon Sep 14 15:39:40 2009 -0700
drm/i915: framebuffer compression for GM45+
Add support for framebuffer compression on GM45 and above. Removes
some unnecessary I915_HAS_FBC checks as well (this is now part of the
FBC display function).
Signed-off-by: Jesse Barnes <[email protected]>
Signed-off-by: Eric Anholt <[email protected]>
... and taking the latest git mainline, and I confirmed that the problem
was still present, and then after reverting this commit, the problem
went away.
I've included my Xorg.0.log file in case that's helpful. Please let me
know if there's anything else you need.
Thanks, regards,
- Ted
X.Org X Server 1.6.3
Release Date: 2009-7-31
X Protocol Version 11, Revision 0
Build Operating System: Linux 2.6.24-24-server i686 Ubuntu
Current Operating System: Linux closure 2.6.32-rc2-00197-g7ef68a2 #24 SMP Fri Oct 2 18:11:14 EDT 2009 i686
Kernel command line: root=/dev/mapper/ssd-root rootfstype=ext4 ro
Build Date: 05 August 2009 11:48:50AM
xorg-server 2:1.6.3-1ubuntu1 ([email protected])
Before reporting problems, check http://wiki.x.org
to make sure that you have the latest version.
Markers: (--) probed, (**) from config file, (==) default setting,
(++) from command line, (!!) notice, (II) informational,
(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
(==) Log file: "/var/log/Xorg.0.log", Time: Fri Oct 2 18:14:38 2009
(==) Using config file: "/etc/X11/xorg.conf"
(==) No Layout section. Using the first Screen section.
(==) No screen section available. Using defaults.
(**) |-->Screen "Default Screen Section" (0)
(**) | |-->Monitor "<default monitor>"
(==) No device specified for screen "Default Screen Section".
Using the first device section listed.
(**) | |-->Device "Configured Video Device"
(==) No monitor specified for screen "Default Screen Section".
Using a default monitor configuration.
(==) Automatically adding devices
(==) Automatically enabling devices
(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
Entry deleted from font path.
(==) FontPath set to:
/usr/share/fonts/X11/misc,
/usr/share/fonts/X11/100dpi/:unscaled,
/usr/share/fonts/X11/75dpi/:unscaled,
/usr/share/fonts/X11/Type1,
/usr/share/fonts/X11/100dpi,
/usr/share/fonts/X11/75dpi,
/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType,
built-ins
(==) ModulePath set to "/usr/lib/xorg/modules"
(II) Cannot locate a core pointer device.
(II) Cannot locate a core keyboard device.
(II) The server relies on HAL to provide the list of input devices.
If no devices become available, reconfigure HAL or disable AllowEmptyInput.
(II) Loader magic: 0x1fbc0
(II) Module ABI versions:
X.Org ANSI C Emulation: 0.4
X.Org Video Driver: 5.0
X.Org XInput driver : 4.0
X.Org Server Extension : 2.0
(II) Loader running on linux
(++) using VT number 7
(--) PCI:*(0:0:2:0) 8086:2a42:17aa:20e4 Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller rev 7, Mem @ 0xf4400000/4194304, 0xd0000000/268435456, I/O @ 0x00001800/8
(II) Open ACPI successful (/var/run/acpid.socket)
(II) System resource ranges:
[0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B]
[1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B]
[2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B]
[3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B]
[4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B]
[5] -1 0 0x00000000 - 0x00000000 (0x1) IX[B]
(II) LoadModule: "extmod"
(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
(II) Module extmod: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 1.0.0
Module class: X.Org Server Extension
ABI class: X.Org Server Extension, version 2.0
(II) Loading extension MIT-SCREEN-SAVER
(II) Loading extension XFree86-VidModeExtension
(II) Loading extension XFree86-DGA
(II) Loading extension DPMS
(II) Loading extension XVideo
(II) Loading extension XVideo-MotionCompensation
(II) Loading extension X-Resource
(II) LoadModule: "dbe"
(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
(II) Module dbe: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 1.0.0
Module class: X.Org Server Extension
ABI class: X.Org Server Extension, version 2.0
(II) Loading extension DOUBLE-BUFFER
(II) LoadModule: "glx"
(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
(II) Module glx: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 1.0.0
ABI class: X.Org Server Extension, version 2.0
(==) AIGLX enabled
(II) Loading extension GLX
(II) LoadModule: "record"
(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
(II) Module record: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 1.13.0
Module class: X.Org Server Extension
ABI class: X.Org Server Extension, version 2.0
(II) Loading extension RECORD
(II) LoadModule: "dri"
(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
(II) Module dri: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 1.0.0
ABI class: X.Org Server Extension, version 2.0
(II) Loading extension XFree86-DRI
(II) LoadModule: "dri2"
(II) Loading /usr/lib/xorg/modules/extensions//libdri2.so
(II) Module dri2: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 1.1.0
ABI class: X.Org Server Extension, version 2.0
(II) Loading extension DRI2
(II) LoadModule: "intel"
(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
(II) Module intel: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 2.8.0
Module class: X.Org Video Driver
ABI class: X.Org Video Driver, version 5.0
(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
E7221 (i915), 915GM, 945G, 945GM, 945GME, IGD_GM, IGD_G, 965G, G35,
965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33,
Mobile Intel® GM45 Express Chipset,
Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41, IGDNG_D,
IGDNG_M
(II) Primary Device is: PCI 00@00:02:0
(II) resource ranges after xf86ClaimFixedResources() call:
[0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B]
[1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B]
[2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B]
[3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B]
[4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B]
[5] -1 0 0x00000000 - 0x00000000 (0x1) IX[B]
(II) resource ranges after probing:
[0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B]
[1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B]
[2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B]
[3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B]
[4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B]
[5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B]
[6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B]
[7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B]
[8] -1 0 0x00000000 - 0x00000000 (0x1) IX[B]
[9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B]
[10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B]
drmOpenDevice: node name is /dev/dri/card0
drmOpenDevice: open result is 8, (OK)
drmOpenByBusid: Searching for BusID pci:0000:00:02.0
drmOpenDevice: node name is /dev/dri/card0
drmOpenDevice: open result is 8, (OK)
drmOpenByBusid: drmOpenMinor returns 8
drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
(II) intel(0): Creating default Display subsection in Screen section
"Default Screen Section" for depth/fbbpp 24/32
(==) intel(0): Depth 24, (--) framebuffer bpp 32
(==) intel(0): RGB weight 888
(==) intel(0): Default visual is TrueColor
(II) intel(0): Integrated Graphics Chipset: Intel(R) Mobile Intel® GM45 Express Chipset
(--) intel(0): Chipset: "Mobile Intel® GM45 Express Chipset"
(II) intel(0): Output VGA1 has no monitor section
(II) intel(0): Output LVDS1 has no monitor section
(II) intel(0): Output DVI1 has no monitor section
(II) intel(0): Output DP1 has no monitor section
(II) intel(0): Output DVI2 has no monitor section
(II) intel(0): Output DP2 has no monitor section
(II) intel(0): Output DP3 has no monitor section
(II) intel(0): EDID for output VGA1
(II) intel(0): EDID for output LVDS1
(II) intel(0): Manufacturer: LEN Model: 4037 Serial#: 0
(II) intel(0): Year: 2008 Week: 0
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): Max Image Size [cm]: horiz.: 30 vert.: 19
(II) intel(0): Gamma: 2.20
(II) intel(0): DPMS capabilities: StandBy Suspend Off
(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4
(II) intel(0): First detailed timing is preferred mode
(II) intel(0): redX: 0.610 redY: 0.340 greenX: 0.345 greenY: 0.590
(II) intel(0): blueX: 0.155 blueY: 0.070 whiteX: 0.313 whiteY: 0.329
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 69.5 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1416 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 818 v_border: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 57.7 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1384 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 834 v_border: 0
(WW) intel(0): Unknown vendor-specific block f
(II) intel(0): LTN141AT09201
(II) intel(0): EDID (in hex):
(II) intel(0): 00ffffffffffff0030ae374000000000
(II) intel(0): 00120103801e1378ea44c59c57589727
(II) intel(0): 12505400000001010101010101010101
(II) intel(0): 010101010101261b0088502012303440
(II) intel(0): 33002fbe100000198b16006850202230
(II) intel(0): 344033002fbe100000190000000f0081
(II) intel(0): 0a32810a284409004ca34154000000fe
(II) intel(0): 004c544e31343141543039323031008d
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Printing probed modes for output LVDS1
(II) intel(0): Modeline "1280x800"x60.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Modeline "1280x800"x50.0 57.71 1280 1332 1396 1384 800 803 806 834 -hsync -vsync (41.7 kHz)
(II) intel(0): Modeline "1024x768"x85.0 94.50 1024 1072 1168 1376 768 769 772 808 +hsync +vsync (68.7 kHz)
(II) intel(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz)
(II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz)
(II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz)
(II) intel(0): Modeline "800x600"x85.1 56.30 800 832 896 1048 600 601 604 631 +hsync +vsync (53.7 kHz)
(II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz)
(II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz)
(II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz)
(II) intel(0): Modeline "640x480"x85.0 36.00 640 696 752 832 480 481 484 509 -hsync -vsync (43.3 kHz)
(II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz)
(II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz)
(II) intel(0): Modeline "720x400"x85.0 35.50 720 756 828 936 400 401 404 446 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x400"x85.1 31.50 640 672 736 832 400 401 404 445 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x350"x85.1 31.50 640 672 736 832 350 382 385 445 +hsync -vsync (37.9 kHz)
(II) intel(0): EDID for output DVI1
(II) intel(0): EDID for output DP1
(II) intel(0): EDID for output DVI2
(II) intel(0): EDID for output DP2
(II) intel(0): EDID for output DP3
(II) intel(0): Output VGA1 disconnected
(II) intel(0): Output LVDS1 connected
(II) intel(0): Output DVI1 disconnected
(II) intel(0): Output DP1 disconnected
(II) intel(0): Output DVI2 disconnected
(II) intel(0): Output DP2 disconnected
(II) intel(0): Output DP3 disconnected
(II) intel(0): Using exact sizes for initial modes
(II) intel(0): Output LVDS1 using initial mode 1280x800
(==) intel(0): video overlay key set to 0x101fe
(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
(==) intel(0): DPI set to (96, 96)
(II) Loading sub module "fb"
(II) LoadModule: "fb"
(II) Loading /usr/lib/xorg/modules//libfb.so
(II) Module fb: vendor="X.Org Foundation"
compiled for 1.6.3, module version = 1.0.0
ABI class: X.Org ANSI C Emulation, version 0.4
(==) Depth 24 pixmap format is 32 bpp
(II) do I need RAC? No, I don't.
(II) resource ranges after preInit:
[0] -1 0 0xffffffff - 0xffffffff (0x1) MX[B]
[1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B]
[2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B]
[3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B]
[4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B]
[5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B]
[6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B]
[7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B]
[8] -1 0 0x00000000 - 0x00000000 (0x1) IX[B]
[9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B]
[10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B]
(II) intel(0): [DRI2] Setup complete
(**) intel(0): Kernel mode setting active, disabling FBC.
(**) intel(0): Framebuffer compression disabled
(**) intel(0): Tiling enabled
(**) intel(0): SwapBuffers wait enabled
(==) intel(0): VideoRam: 262144 KB
(II) intel(0): Attempting memory allocation with tiled buffers.
(II) intel(0): Tiled allocation successful.
(II) UXA(0): Driver registered support for the following operations:
(II) solid
(II) copy
(II) composite (RENDER acceleration)
(==) intel(0): Backing store disabled
(==) intel(0): Silken mouse enabled
(II) intel(0): Initializing HW Cursor
(II) intel(0): No memory allocations
(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
(II) intel(0): DPMS enabled
(==) intel(0): Intel XvMC decoder disabled
(II) intel(0): Set up textured video
(II) intel(0): direct rendering: DRI2 Enabled
(--) RandR disabled
(II) Initializing built-in extension Generic Event Extension
(II) Initializing built-in extension SHAPE
(II) Initializing built-in extension MIT-SHM
(II) Initializing built-in extension XInputExtension
(II) Initializing built-in extension XTEST
(II) Initializing built-in extension BIG-REQUESTS
(II) Initializing built-in extension SYNC
(II) Initializing built-in extension XKEYBOARD
(II) Initializing built-in extension XC-MISC
(II) Initializing built-in extension SECURITY
(II) Initializing built-in extension XINERAMA
(II) Initializing built-in extension XFIXES
(II) Initializing built-in extension RENDER
(II) Initializing built-in extension RANDR
(II) Initializing built-in extension COMPOSITE
(II) Initializing built-in extension DAMAGE
(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
(II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
(II) AIGLX: Loaded and initialized /usr/lib/dri/i965_dri.so
(II) GLX: Initialized DRI2 GL provider for screen 0
(II) intel(0): Setting screen physical size to 303 x 190
(II) config/hal: Adding input device ThinkPad Extra Buttons
(II) LoadModule: "evdev"
(II) Loading /usr/lib/xorg/modules/input//evdev_drv.so
(II) Module evdev: vendor="X.Org Foundation"
compiled for 1.6.1.901, module version = 2.2.2
Module class: X.Org XInput Driver
ABI class: X.Org XInput driver, version 4.0
(**) ThinkPad Extra Buttons: always reports core events
(**) ThinkPad Extra Buttons: Device: "/dev/input/event6"
(II) ThinkPad Extra Buttons: Found keys
(II) ThinkPad Extra Buttons: Configuring as keyboard
(II) XINPUT: Adding extended input device "ThinkPad Extra Buttons" (type: KEYBOARD)
(**) Option "xkb_rules" "evdev"
(**) Option "xkb_model" "pc105"
(**) Option "xkb_layout" "us"
(II) config/hal: Adding input device TPPS/2 IBM TrackPoint
(**) TPPS/2 IBM TrackPoint: always reports core events
(**) TPPS/2 IBM TrackPoint: Device: "/dev/input/event8"
(II) TPPS/2 IBM TrackPoint: Found 3 mouse buttons
(II) TPPS/2 IBM TrackPoint: Found x and y relative axes
(II) TPPS/2 IBM TrackPoint: Configuring as mouse
(**) TPPS/2 IBM TrackPoint: YAxisMapping: buttons 4 and 5
(**) TPPS/2 IBM TrackPoint: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
(II) XINPUT: Adding extended input device "TPPS/2 IBM TrackPoint" (type: MOUSE)
(**) TPPS/2 IBM TrackPoint: (accel) keeping acceleration scheme 1
(**) TPPS/2 IBM TrackPoint: (accel) filter chain progression: 2.00
(**) TPPS/2 IBM TrackPoint: (accel) filter stage 0: 20.00 ms
(**) TPPS/2 IBM TrackPoint: (accel) set acceleration profile 0
(II) config/hal: Adding input device AT Translated Set 2 keyboard
(**) AT Translated Set 2 keyboard: always reports core events
(**) AT Translated Set 2 keyboard: Device: "/dev/input/event5"
(II) AT Translated Set 2 keyboard: Found keys
(II) AT Translated Set 2 keyboard: Configuring as keyboard
(II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD)
(**) Option "xkb_rules" "evdev"
(**) Option "xkb_model" "pc105"
(**) Option "xkb_layout" "us"
(II) config/hal: Adding input device Video Bus
(**) Video Bus: always reports core events
(**) Video Bus: Device: "/dev/input/event3"
(II) Video Bus: Found keys
(II) Video Bus: Configuring as keyboard
(II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD)
(**) Option "xkb_rules" "evdev"
(**) Option "xkb_model" "pc105"
(**) Option "xkb_layout" "us"
(II) config/hal: Adding input device Macintosh mouse button emulation
(**) Macintosh mouse button emulation: always reports core events
(**) Macintosh mouse button emulation: Device: "/dev/input/event4"
(II) Macintosh mouse button emulation: Found 3 mouse buttons
(II) Macintosh mouse button emulation: Found x and y relative axes
(II) Macintosh mouse button emulation: Configuring as mouse
(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
(II) XINPUT: Adding extended input device "Macintosh mouse button emulation" (type: MOUSE)
(**) Macintosh mouse button emulation: (accel) keeping acceleration scheme 1
(**) Macintosh mouse button emulation: (accel) filter chain progression: 2.00
(**) Macintosh mouse button emulation: (accel) filter stage 0: 20.00 ms
(**) Macintosh mouse button emulation: (accel) set acceleration profile 0
(II) config/hal: Adding input device SynPS/2 Synaptics TouchPad
(II) LoadModule: "synaptics"
(II) Loading /usr/lib/xorg/modules/input//synaptics_drv.so
(II) Module synaptics: vendor="X.Org Foundation"
compiled for 1.6.1.901, module version = 1.1.2
Module class: X.Org XInput Driver
ABI class: X.Org XInput driver, version 4.0
(II) Synaptics touchpad driver version 1.1.2
(**) Option "Device" "/dev/input/event7"
(II) SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5472
(II) SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4448
(II) SynPS/2 Synaptics TouchPad: pressure range 0 - 255
(II) SynPS/2 Synaptics TouchPad: finger width range 0 - 0
(II) SynPS/2 Synaptics TouchPad: buttons: left right middle
(--) SynPS/2 Synaptics TouchPad: touchpad found
(**) SynPS/2 Synaptics TouchPad: always reports core events
(II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD)
(**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
(**) SynPS/2 Synaptics TouchPad: (accel) filter chain progression: 2.00
(**) SynPS/2 Synaptics TouchPad: (accel) filter stage 0: 20.00 ms
(**) SynPS/2 Synaptics TouchPad: (accel) set acceleration profile 0
(--) SynPS/2 Synaptics TouchPad: touchpad found
(II) intel(0): EDID for output VGA1
(II) intel(0): EDID for output LVDS1
(II) intel(0): Manufacturer: LEN Model: 4037 Serial#: 0
(II) intel(0): Year: 2008 Week: 0
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): Max Image Size [cm]: horiz.: 30 vert.: 19
(II) intel(0): Gamma: 2.20
(II) intel(0): DPMS capabilities: StandBy Suspend Off
(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4
(II) intel(0): First detailed timing is preferred mode
(II) intel(0): redX: 0.610 redY: 0.340 greenX: 0.345 greenY: 0.590
(II) intel(0): blueX: 0.155 blueY: 0.070 whiteX: 0.313 whiteY: 0.329
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 69.5 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1416 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 818 v_border: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 57.7 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1384 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 834 v_border: 0
(WW) intel(0): Unknown vendor-specific block f
(II) intel(0): LTN141AT09201
(II) intel(0): EDID (in hex):
(II) intel(0): 00ffffffffffff0030ae374000000000
(II) intel(0): 00120103801e1378ea44c59c57589727
(II) intel(0): 12505400000001010101010101010101
(II) intel(0): 010101010101261b0088502012303440
(II) intel(0): 33002fbe100000198b16006850202230
(II) intel(0): 344033002fbe100000190000000f0081
(II) intel(0): 0a32810a284409004ca34154000000fe
(II) intel(0): 004c544e31343141543039323031008d
(II) intel(0): EDID vendor "LEN", prod id 16439
(II) intel(0): Printing DDC gathered Modelines:
(II) intel(0): Modeline "1280x800"x0.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Printing probed modes for output LVDS1
(II) intel(0): Modeline "1280x800"x60.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Modeline "1280x800"x50.0 57.71 1280 1332 1396 1384 800 803 806 834 -hsync -vsync (41.7 kHz)
(II) intel(0): Modeline "1024x768"x85.0 94.50 1024 1072 1168 1376 768 769 772 808 +hsync +vsync (68.7 kHz)
(II) intel(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz)
(II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz)
(II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz)
(II) intel(0): Modeline "800x600"x85.1 56.30 800 832 896 1048 600 601 604 631 +hsync +vsync (53.7 kHz)
(II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz)
(II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz)
(II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz)
(II) intel(0): Modeline "640x480"x85.0 36.00 640 696 752 832 480 481 484 509 -hsync -vsync (43.3 kHz)
(II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz)
(II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz)
(II) intel(0): Modeline "720x400"x85.0 35.50 720 756 828 936 400 401 404 446 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x400"x85.1 31.50 640 672 736 832 400 401 404 445 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x350"x85.1 31.50 640 672 736 832 350 382 385 445 +hsync -vsync (37.9 kHz)
(II) intel(0): EDID for output DVI1
(II) intel(0): EDID for output DP1
(II) intel(0): EDID for output DVI2
(II) intel(0): EDID for output DP2
(II) intel(0): EDID for output DP3
(II) intel(0): EDID for output VGA1
(II) intel(0): EDID for output LVDS1
(II) intel(0): Manufacturer: LEN Model: 4037 Serial#: 0
(II) intel(0): Year: 2008 Week: 0
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): Max Image Size [cm]: horiz.: 30 vert.: 19
(II) intel(0): Gamma: 2.20
(II) intel(0): DPMS capabilities: StandBy Suspend Off
(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4
(II) intel(0): First detailed timing is preferred mode
(II) intel(0): redX: 0.610 redY: 0.340 greenX: 0.345 greenY: 0.590
(II) intel(0): blueX: 0.155 blueY: 0.070 whiteX: 0.313 whiteY: 0.329
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 69.5 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1416 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 818 v_border: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 57.7 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1384 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 834 v_border: 0
(WW) intel(0): Unknown vendor-specific block f
(II) intel(0): LTN141AT09201
(II) intel(0): EDID (in hex):
(II) intel(0): 00ffffffffffff0030ae374000000000
(II) intel(0): 00120103801e1378ea44c59c57589727
(II) intel(0): 12505400000001010101010101010101
(II) intel(0): 010101010101261b0088502012303440
(II) intel(0): 33002fbe100000198b16006850202230
(II) intel(0): 344033002fbe100000190000000f0081
(II) intel(0): 0a32810a284409004ca34154000000fe
(II) intel(0): 004c544e31343141543039323031008d
(II) intel(0): EDID vendor "LEN", prod id 16439
(II) intel(0): Printing DDC gathered Modelines:
(II) intel(0): Modeline "1280x800"x0.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Printing probed modes for output LVDS1
(II) intel(0): Modeline "1280x800"x60.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Modeline "1280x800"x50.0 57.71 1280 1332 1396 1384 800 803 806 834 -hsync -vsync (41.7 kHz)
(II) intel(0): Modeline "1024x768"x85.0 94.50 1024 1072 1168 1376 768 769 772 808 +hsync +vsync (68.7 kHz)
(II) intel(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz)
(II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz)
(II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz)
(II) intel(0): Modeline "800x600"x85.1 56.30 800 832 896 1048 600 601 604 631 +hsync +vsync (53.7 kHz)
(II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz)
(II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz)
(II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz)
(II) intel(0): Modeline "640x480"x85.0 36.00 640 696 752 832 480 481 484 509 -hsync -vsync (43.3 kHz)
(II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz)
(II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz)
(II) intel(0): Modeline "720x400"x85.0 35.50 720 756 828 936 400 401 404 446 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x400"x85.1 31.50 640 672 736 832 400 401 404 445 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x350"x85.1 31.50 640 672 736 832 350 382 385 445 +hsync -vsync (37.9 kHz)
(II) intel(0): EDID for output DVI1
(II) intel(0): EDID for output DP1
(II) intel(0): EDID for output DVI2
(II) intel(0): EDID for output DP2
(II) intel(0): EDID for output DP3
(II) intel(0): EDID for output VGA1
(II) intel(0): EDID for output LVDS1
(II) intel(0): Manufacturer: LEN Model: 4037 Serial#: 0
(II) intel(0): Year: 2008 Week: 0
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): Max Image Size [cm]: horiz.: 30 vert.: 19
(II) intel(0): Gamma: 2.20
(II) intel(0): DPMS capabilities: StandBy Suspend Off
(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4
(II) intel(0): First detailed timing is preferred mode
(II) intel(0): redX: 0.610 redY: 0.340 greenX: 0.345 greenY: 0.590
(II) intel(0): blueX: 0.155 blueY: 0.070 whiteX: 0.313 whiteY: 0.329
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 69.5 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1416 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 818 v_border: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 57.7 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1384 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 834 v_border: 0
(WW) intel(0): Unknown vendor-specific block f
(II) intel(0): LTN141AT09201
(II) intel(0): EDID (in hex):
(II) intel(0): 00ffffffffffff0030ae374000000000
(II) intel(0): 00120103801e1378ea44c59c57589727
(II) intel(0): 12505400000001010101010101010101
(II) intel(0): 010101010101261b0088502012303440
(II) intel(0): 33002fbe100000198b16006850202230
(II) intel(0): 344033002fbe100000190000000f0081
(II) intel(0): 0a32810a284409004ca34154000000fe
(II) intel(0): 004c544e31343141543039323031008d
(II) intel(0): EDID vendor "LEN", prod id 16439
(II) intel(0): Printing DDC gathered Modelines:
(II) intel(0): Modeline "1280x800"x0.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Printing probed modes for output LVDS1
(II) intel(0): Modeline "1280x800"x60.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Modeline "1280x800"x50.0 57.71 1280 1332 1396 1384 800 803 806 834 -hsync -vsync (41.7 kHz)
(II) intel(0): Modeline "1024x768"x85.0 94.50 1024 1072 1168 1376 768 769 772 808 +hsync +vsync (68.7 kHz)
(II) intel(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz)
(II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz)
(II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz)
(II) intel(0): Modeline "800x600"x85.1 56.30 800 832 896 1048 600 601 604 631 +hsync +vsync (53.7 kHz)
(II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz)
(II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz)
(II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz)
(II) intel(0): Modeline "640x480"x85.0 36.00 640 696 752 832 480 481 484 509 -hsync -vsync (43.3 kHz)
(II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz)
(II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz)
(II) intel(0): Modeline "720x400"x85.0 35.50 720 756 828 936 400 401 404 446 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x400"x85.1 31.50 640 672 736 832 400 401 404 445 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x350"x85.1 31.50 640 672 736 832 350 382 385 445 +hsync -vsync (37.9 kHz)
(II) intel(0): EDID for output DVI1
(II) intel(0): EDID for output DP1
(II) intel(0): EDID for output DVI2
(II) intel(0): EDID for output DP2
(II) intel(0): EDID for output DP3
(II) intel(0): EDID for output VGA1
(II) intel(0): EDID for output LVDS1
(II) intel(0): Manufacturer: LEN Model: 4037 Serial#: 0
(II) intel(0): Year: 2008 Week: 0
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): Max Image Size [cm]: horiz.: 30 vert.: 19
(II) intel(0): Gamma: 2.20
(II) intel(0): DPMS capabilities: StandBy Suspend Off
(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4
(II) intel(0): First detailed timing is preferred mode
(II) intel(0): redX: 0.610 redY: 0.340 greenX: 0.345 greenY: 0.590
(II) intel(0): blueX: 0.155 blueY: 0.070 whiteX: 0.313 whiteY: 0.329
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 69.5 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1416 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 818 v_border: 0
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 57.7 MHz Image Size: 303 x 190 mm
(II) intel(0): h_active: 1280 h_sync: 1332 h_sync_end 1396 h_blank_end 1384 h_border: 0
(II) intel(0): v_active: 800 v_sync: 803 v_sync_end 806 v_blanking: 834 v_border: 0
(WW) intel(0): Unknown vendor-specific block f
(II) intel(0): LTN141AT09201
(II) intel(0): EDID (in hex):
(II) intel(0): 00ffffffffffff0030ae374000000000
(II) intel(0): 00120103801e1378ea44c59c57589727
(II) intel(0): 12505400000001010101010101010101
(II) intel(0): 010101010101261b0088502012303440
(II) intel(0): 33002fbe100000198b16006850202230
(II) intel(0): 344033002fbe100000190000000f0081
(II) intel(0): 0a32810a284409004ca34154000000fe
(II) intel(0): 004c544e31343141543039323031008d
(II) intel(0): EDID vendor "LEN", prod id 16439
(II) intel(0): Printing DDC gathered Modelines:
(II) intel(0): Modeline "1280x800"x0.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
(II) intel(0): Printing probed modes for output LVDS1
(II) intel(0): Modeline "1280x800"x60.0 69.50 1280 1332 1396 1416 800 803 806 818 -hsync -vsync (49.1 kHz)
(II) intel(0): Modeline "1280x800"x50.0 57.71 1280 1332 1396 1384 800 803 806 834 -hsync -vsync (41.7 kHz)
(II) intel(0): Modeline "1024x768"x85.0 94.50 1024 1072 1168 1376 768 769 772 808 +hsync +vsync (68.7 kHz)
(II) intel(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz)
(II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz)
(II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz)
(II) intel(0): Modeline "800x600"x85.1 56.30 800 832 896 1048 600 601 604 631 +hsync +vsync (53.7 kHz)
(II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz)
(II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz)
(II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz)
(II) intel(0): Modeline "640x480"x85.0 36.00 640 696 752 832 480 481 484 509 -hsync -vsync (43.3 kHz)
(II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz)
(II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz)
(II) intel(0): Modeline "720x400"x85.0 35.50 720 756 828 936 400 401 404 446 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x400"x85.1 31.50 640 672 736 832 400 401 404 445 -hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x350"x85.1 31.50 640 672 736 832 350 382 385 445 +hsync -vsync (37.9 kHz)
(II) intel(0): EDID for output DVI1
(II) intel(0): EDID for output DP1
(II) intel(0): EDID for output DVI2
(II) intel(0): EDID for output DP2
(II) intel(0): EDID for output DP3
On Fri, 02 Oct 2009 18:40:27 -0400
"Theodore Ts'o" <[email protected]> wrote:
> Hi,
>
> In recent kernels, my X display (running with a KMS-enabled X server)
> has been very jittery and with lots of glitching and tearing --- sorry
> if this isn't the correct technical term, not sure what it is --- on
> my T400 Lenovo laptop. It seems related to what is on the desktop,
> and moving the mouse does seem to affect the rate and percentage of
> the screen which jitters --- which is enough to be very distracting,
> although I can still read the contents of the windows where the screen
> is tearing/glitching/flashing.
>
> I bisected it down to this commit:
>
> 74dff282237ea8c0a5df1afd8526eac4b6cee063 is the first bad commit
> commit 74dff282237ea8c0a5df1afd8526eac4b6cee063
> Author: Jesse Barnes <[email protected]>
> Date: Mon Sep 14 15:39:40 2009 -0700
>
> drm/i915: framebuffer compression for GM45+
>
> Add support for framebuffer compression on GM45 and above.
> Removes some unnecessary I915_HAS_FBC checks as well (this is now
> part of the FBC display function).
>
> Signed-off-by: Jesse Barnes <[email protected]>
> Signed-off-by: Eric Anholt <[email protected]>
>
> ... and taking the latest git mainline, and I confirmed that the
> problem was still present, and then after reverting this commit, the
> problem went away.
>
> I've included my Xorg.0.log file in case that's helpful. Please let
> me know if there's anything else you need.
Yeah I've had a couple of other reports of flicker pointing to this
commit... I'll be able to look into it next week.
--
Jesse Barnes, Intel Open Source Technology Center
On Saturday 03 of October 2009, Theodore Ts'o wrote:
> Hi,
>
> In recent kernels, my X display (running with a KMS-enabled X server)
> has been very jittery and with lots of glitching and tearing --- sorry
> if this isn't the correct technical term, not sure what it is --- on my
> T400 Lenovo laptop. It seems related to what is on the desktop, and
> moving the mouse does seem to affect the rate and percentage of the
> screen which jitters --- which is enough to be very distracting,
> although I can still read the contents of the windows where the screen
> is tearing/glitching/flashing.
>
> I bisected it down to this commit:
>
> 74dff282237ea8c0a5df1afd8526eac4b6cee063 is the first bad commit
> commit 74dff282237ea8c0a5df1afd8526eac4b6cee063
> Author: Jesse Barnes <[email protected]>
> Date: Mon Sep 14 15:39:40 2009 -0700
>
> drm/i915: framebuffer compression for GM45+
Disabling compression works fine (as temporary workaround until the issue is
solved).
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 7a5fb79..075092b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4165,7 +4165,7 @@ static void intel_init_display(struct drm_device *dev)
/* Only mobile has FBC, leave pointers NULL for other chips */
if (IS_MOBILE(dev)) {
- if (IS_GM45(dev)) {
+ if (0 && IS_GM45(dev)) {
dev_priv->display.fbc_enabled = g4x_fbc_enabled;
dev_priv->display.enable_fbc = g4x_enable_fbc;
dev_priv->display.disable_fbc = g4x_disable_fbc;
--
Arkadiusz Miśkiewicz PLD/Linux Team
arekm / maven.pl http://ftp.pld-linux.org/
On Fri, 02 Oct 2009 18:40:27 -0400
"Theodore Ts'o" <[email protected]> wrote:
> Hi,
>
> In recent kernels, my X display (running with a KMS-enabled X server)
> has been very jittery and with lots of glitching and tearing --- sorry
> if this isn't the correct technical term, not sure what it is --- on
> my T400 Lenovo laptop. It seems related to what is on the desktop,
> and moving the mouse does seem to affect the rate and percentage of
> the screen which jitters --- which is enough to be very distracting,
> although I can still read the contents of the windows where the screen
> is tearing/glitching/flashing.
>
> I bisected it down to this commit:
>
> 74dff282237ea8c0a5df1afd8526eac4b6cee063 is the first bad commit
> commit 74dff282237ea8c0a5df1afd8526eac4b6cee063
> Author: Jesse Barnes <[email protected]>
> Date: Mon Sep 14 15:39:40 2009 -0700
>
> drm/i915: framebuffer compression for GM45+
>
> Add support for framebuffer compression on GM45 and above.
> Removes some unnecessary I915_HAS_FBC checks as well (this is now
> part of the FBC display function).
>
> Signed-off-by: Jesse Barnes <[email protected]>
> Signed-off-by: Eric Anholt <[email protected]>
>
> ... and taking the latest git mainline, and I confirmed that the
> problem was still present, and then after reverting this commit, the
> problem went away.
>
> I've included my Xorg.0.log file in case that's helpful. Please let
> me know if there's anything else you need.
I still haven't seen this issue myself, so I'm not sure if this patch
will help. I think it's a necessary one nonetheless though.
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6035d3d..5dd5354 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -342,6 +342,7 @@ typedef struct drm_i915_private {
u32 savePFIT_CONTROL;
u32 save_palette_a[256];
u32 save_palette_b[256];
+ u32 saveDPFC_CB_BASE;
u32 saveFBC_CFB_BASE;
u32 saveFBC_LL_BASE;
u32 saveFBC_CONTROL;
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bd6d8d9..660c5f3 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -437,10 +437,14 @@ void i915_save_display(struct drm_device *dev)
/* FIXME: save TV & SDVO state */
/* FBC state */
- dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
- dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
- dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
- dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+ if (IS_GM45(dev)) {
+ dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
+ } else {
+ dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
+ dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
+ dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
+ dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+ }
/* VGA state */
dev_priv->saveVGA0 = I915_READ(VGA0);
@@ -511,10 +515,16 @@ void i915_restore_display(struct drm_device *dev)
/* FIXME: restore TV & SDVO state */
/* FBC info */
- I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
- I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
- I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
- I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
+ if (IS_GM45(dev)) {
+ g4x_disable_fbc(dev);
+ I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
+ } else {
+ i8xx_disable_fbc(dev);
+ I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
+ I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
+ I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
+ I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
+ }
/* VGA state */
I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
On Fri, 02 Oct 2009 18:40:27 -0400
"Theodore Ts'o" <[email protected]> wrote:
> Hi,
>
> In recent kernels, my X display (running with a KMS-enabled X server)
> has been very jittery and with lots of glitching and tearing --- sorry
> if this isn't the correct technical term, not sure what it is --- on
> my T400 Lenovo laptop. It seems related to what is on the desktop,
> and moving the mouse does seem to affect the rate and percentage of
> the screen which jitters --- which is enough to be very distracting,
> although I can still read the contents of the windows where the screen
> is tearing/glitching/flashing.
>
> I bisected it down to this commit:
Can you give this patch a try? It seems to work for Keith at least,
and it sounds like he was seeing the same problem.
--
Jesse Barnes, Intel Open Source Technology Center
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddb..3bef091 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1791,6 +1791,7 @@
#define DSPFW1 0x70034
#define DSPFW2 0x70038
+#define G4X_FBC_WM_EN (1<<31) /* GM45+ only */
#define DSPFW3 0x7003c
#define IGD_SELF_REFRESH_EN (1<<30)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7a5fb79..be1fb2b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1061,6 +1061,9 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
(interval << DPFC_RECOMP_TIMER_COUNT_SHIFT));
I915_WRITE(DPFC_FENCE_YOFF, crtc->y);
+ /* Use FBC watermark calculations */
+ I915_WRITE(DSPFW2, I915_READ(DSPFW2) | G4X_FBC_WM_EN);
+
/* enable it... */
I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);
@@ -1078,6 +1081,8 @@ void g4x_disable_fbc(struct drm_device *dev)
I915_WRITE(DPFC_CONTROL, dpfc_ctl);
intel_wait_for_vblank(dev);
+ I915_WRITE(DSPFW2, I915_READ(DSPFW2) & ~G4X_FBC_WM_EN);
+
DRM_DEBUG("disabled FBC\n");
}
On Thu, Oct 08, 2009 at 10:36:20AM -0700, Jesse Barnes wrote:
> On Fri, 02 Oct 2009 18:40:27 -0400
> "Theodore Ts'o" <[email protected]> wrote:
>
> > Hi,
> >
> > In recent kernels, my X display (running with a KMS-enabled X server)
> > has been very jittery and with lots of glitching and tearing --- sorry
> > if this isn't the correct technical term, not sure what it is --- on
> > my T400 Lenovo laptop. It seems related to what is on the desktop,
> > and moving the mouse does seem to affect the rate and percentage of
> > the screen which jitters --- which is enough to be very distracting,
> > although I can still read the contents of the windows where the screen
> > is tearing/glitching/flashing.
> >
> > I bisected it down to this commit:
>
> Can you give this patch a try? It seems to work for Keith at least,
> and it sounds like he was seeing the same problem.
Nope, unfortunately, it's not helping on my T400 laptop. I'm still
getting huge amounts of glitching and tearing with this patch applied
against -rc3.
What I'm using for now to fix up my system is this patch.
- Ted
commit 4e3166295914308c5a5910a93dec5596c94c5128
Author: Theodore Ts'o <[email protected]>
Date: Fri Oct 2 21:35:06 2009 -0400
Revert "drm/i915: framebuffer compression for GM45+"
This reverts commit 74dff282237ea8c0a5df1afd8526eac4b6cee063.
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 45d507e..560ddea 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1126,47 +1126,34 @@ static void i915_setup_compression(struct drm_device *dev, int size)
return;
}
- cfb_base = i915_gtt_to_phys(dev, compressed_fb->start);
- if (!cfb_base) {
- DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
- drm_mm_put_block(compressed_fb);
+ compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096, 4096, 0);
+ if (!compressed_llb) {
+ i915_warn_stolen(dev);
+ return;
}
- if (!IS_GM45(dev)) {
- compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096,
- 4096, 0);
- if (!compressed_llb) {
- i915_warn_stolen(dev);
- return;
- }
-
- compressed_llb = drm_mm_get_block(compressed_llb, 4096, 4096);
- if (!compressed_llb) {
- i915_warn_stolen(dev);
- return;
- }
-
- ll_base = i915_gtt_to_phys(dev, compressed_llb->start);
- if (!ll_base) {
- DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
- drm_mm_put_block(compressed_fb);
- drm_mm_put_block(compressed_llb);
- }
+ compressed_llb = drm_mm_get_block(compressed_llb, 4096, 4096);
+ if (!compressed_llb) {
+ i915_warn_stolen(dev);
+ return;
}
dev_priv->cfb_size = size;
- if (IS_GM45(dev)) {
- g4x_disable_fbc(dev);
- I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
- } else {
- i8xx_disable_fbc(dev);
- I915_WRITE(FBC_CFB_BASE, cfb_base);
- I915_WRITE(FBC_LL_BASE, ll_base);
+ cfb_base = i915_gtt_to_phys(dev, compressed_fb->start);
+ ll_base = i915_gtt_to_phys(dev, compressed_llb->start);
+ if (!cfb_base || !ll_base) {
+ DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
+ drm_mm_put_block(compressed_fb);
+ drm_mm_put_block(compressed_llb);
}
+ i8xx_disable_fbc(dev);
+
DRM_DEBUG("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base,
ll_base, size >> 20);
+ I915_WRITE(FBC_CFB_BASE, cfb_base);
+ I915_WRITE(FBC_LL_BASE, ll_base);
}
/* true = enable decode, false = disable decoder */
@@ -1227,7 +1214,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
goto out;
/* Try to set up FBC with a reasonable compressed buffer size */
- if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) &&
+ if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev)) &&
i915_powersave) {
int cfb_size;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b24b2d1..56208ea 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -828,7 +828,6 @@ extern void intel_modeset_init(struct drm_device *dev);
extern void intel_modeset_cleanup(struct drm_device *dev);
extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
extern void i8xx_disable_fbc(struct drm_device *dev);
-extern void g4x_disable_fbc(struct drm_device *dev);
/**
* Lock test for when it's just for synchronization of ring access.
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddb..b762706 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -352,33 +352,6 @@
#define FBC_LL_SIZE (1536)
-/* Framebuffer compression for GM45+ */
-#define DPFC_CB_BASE 0x3200
-#define DPFC_CONTROL 0x3208
-#define DPFC_CTL_EN (1<<31)
-#define DPFC_CTL_PLANEA (0<<30)
-#define DPFC_CTL_PLANEB (1<<30)
-#define DPFC_CTL_FENCE_EN (1<<29)
-#define DPFC_SR_EN (1<<10)
-#define DPFC_CTL_LIMIT_1X (0<<6)
-#define DPFC_CTL_LIMIT_2X (1<<6)
-#define DPFC_CTL_LIMIT_4X (2<<6)
-#define DPFC_RECOMP_CTL 0x320c
-#define DPFC_RECOMP_STALL_EN (1<<27)
-#define DPFC_RECOMP_STALL_WM_SHIFT (16)
-#define DPFC_RECOMP_STALL_WM_MASK (0x07ff0000)
-#define DPFC_RECOMP_TIMER_COUNT_SHIFT (0)
-#define DPFC_RECOMP_TIMER_COUNT_MASK (0x0000003f)
-#define DPFC_STATUS 0x3210
-#define DPFC_INVAL_SEG_SHIFT (16)
-#define DPFC_INVAL_SEG_MASK (0x07ff0000)
-#define DPFC_COMP_SEG_SHIFT (0)
-#define DPFC_COMP_SEG_MASK (0x000003ff)
-#define DPFC_STATUS2 0x3214
-#define DPFC_FENCE_YOFF 0x3218
-#define DPFC_CHICKEN 0x3224
-#define DPFC_HT_MODIFY (1<<31)
-
/*
* GPIO regs
*/
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 93ff6c0..b9633da 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1030,65 +1030,6 @@ static bool i8xx_fbc_enabled(struct drm_crtc *crtc)
return I915_READ(FBC_CONTROL) & FBC_CTL_EN;
}
-static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
-{
- struct drm_device *dev = crtc->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
- struct drm_framebuffer *fb = crtc->fb;
- struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- struct drm_i915_gem_object *obj_priv = intel_fb->obj->driver_private;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA :
- DPFC_CTL_PLANEB);
- unsigned long stall_watermark = 200;
- u32 dpfc_ctl;
-
- dev_priv->cfb_pitch = (dev_priv->cfb_pitch / 64) - 1;
- dev_priv->cfb_fence = obj_priv->fence_reg;
- dev_priv->cfb_plane = intel_crtc->plane;
-
- dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
- if (obj_priv->tiling_mode != I915_TILING_NONE) {
- dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
- I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
- } else {
- I915_WRITE(DPFC_CHICKEN, ~DPFC_HT_MODIFY);
- }
-
- I915_WRITE(DPFC_CONTROL, dpfc_ctl);
- I915_WRITE(DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |
- (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) |
- (interval << DPFC_RECOMP_TIMER_COUNT_SHIFT));
- I915_WRITE(DPFC_FENCE_YOFF, crtc->y);
-
- /* enable it... */
- I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);
-
- DRM_DEBUG("enabled fbc on plane %d\n", intel_crtc->plane);
-}
-
-void g4x_disable_fbc(struct drm_device *dev)
-{
- struct drm_i915_private *dev_priv = dev->dev_private;
- u32 dpfc_ctl;
-
- /* Disable compression */
- dpfc_ctl = I915_READ(DPFC_CONTROL);
- dpfc_ctl &= ~DPFC_CTL_EN;
- I915_WRITE(DPFC_CONTROL, dpfc_ctl);
- intel_wait_for_vblank(dev);
-
- DRM_DEBUG("disabled FBC\n");
-}
-
-static bool g4x_fbc_enabled(struct drm_crtc *crtc)
-{
- struct drm_device *dev = crtc->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
-
- return I915_READ(DPFC_CONTROL) & DPFC_CTL_EN;
-}
-
/**
* intel_update_fbc - enable/disable FBC as needed
* @crtc: CRTC to point the compressor at
@@ -1156,7 +1097,7 @@ static void intel_update_fbc(struct drm_crtc *crtc,
DRM_DEBUG("mode too large for compression, disabling\n");
goto out_disable;
}
- if ((IS_I915GM(dev) || IS_I945GM(dev)) && plane != 0) {
+ if (IS_I9XX(dev) && plane != 0) {
DRM_DEBUG("plane not 0, disabling compression\n");
goto out_disable;
}
@@ -1324,7 +1265,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
I915_READ(dspbase);
}
- if ((IS_I965G(dev) || plane == 0))
+ if (I915_HAS_FBC(dev) && (IS_I965G(dev) || plane == 0))
intel_update_fbc(crtc, &crtc->mode);
intel_wait_for_vblank(dev);
@@ -1833,8 +1774,7 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
intel_crtc_load_lut(crtc);
- if ((IS_I965G(dev) || plane == 0))
- intel_update_fbc(crtc, &crtc->mode);
+ intel_update_fbc(crtc, &crtc->mode);
/* Give the overlay scaler a chance to enable if it's on this pipe */
//intel_crtc_dpms_video(crtc, true); TODO
@@ -3048,8 +2988,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
/* Flush the plane changes */
ret = intel_pipe_set_base(crtc, x, y, old_fb);
- if ((IS_I965G(dev) || plane == 0))
- intel_update_fbc(crtc, &crtc->mode);
+ intel_update_fbc(crtc, &crtc->mode);
intel_update_watermarks(dev);
@@ -3182,7 +3121,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
drm_gem_object_unreference(intel_crtc->cursor_bo);
}
- if ((IS_I965G(dev) || plane == 0))
+ if (I915_HAS_FBC(dev) && (IS_I965G(dev) || plane == 0))
intel_update_fbc(crtc, &crtc->mode);
mutex_unlock(&dev->struct_mutex);
@@ -4169,16 +4108,12 @@ static void intel_init_display(struct drm_device *dev)
/* Only mobile has FBC, leave pointers NULL for other chips */
if (IS_MOBILE(dev)) {
- if (IS_GM45(dev)) {
- dev_priv->display.fbc_enabled = g4x_fbc_enabled;
- dev_priv->display.enable_fbc = g4x_enable_fbc;
- dev_priv->display.disable_fbc = g4x_disable_fbc;
- } else if (IS_I965GM(dev) || IS_I945GM(dev) || IS_I915GM(dev)) {
+ /* 855GM needs testing */
+ if (IS_I965GM(dev) || IS_I945GM(dev) || IS_I915GM(dev)) {
dev_priv->display.fbc_enabled = i8xx_fbc_enabled;
dev_priv->display.enable_fbc = i8xx_enable_fbc;
dev_priv->display.disable_fbc = i8xx_disable_fbc;
}
- /* 855GM needs testing */
}
/* Returns the core display clock speed */
On Sat, 10 Oct 2009 16:41:06 -0400
Theodore Tso <[email protected]> wrote:
> On Thu, Oct 08, 2009 at 10:36:20AM -0700, Jesse Barnes wrote:
> > On Fri, 02 Oct 2009 18:40:27 -0400
> > "Theodore Ts'o" <[email protected]> wrote:
> >
> > > Hi,
> > >
> > > In recent kernels, my X display (running with a KMS-enabled X
> > > server) has been very jittery and with lots of glitching and
> > > tearing --- sorry if this isn't the correct technical term, not
> > > sure what it is --- on my T400 Lenovo laptop. It seems related
> > > to what is on the desktop, and moving the mouse does seem to
> > > affect the rate and percentage of the screen which jitters ---
> > > which is enough to be very distracting, although I can still read
> > > the contents of the windows where the screen is
> > > tearing/glitching/flashing.
> > >
> > > I bisected it down to this commit:
> >
> > Can you give this patch a try? It seems to work for Keith at least,
> > and it sounds like he was seeing the same problem.
>
> Nope, unfortunately, it's not helping on my T400 laptop. I'm still
> getting huge amounts of glitching and tearing with this patch applied
> against -rc3.
>
> What I'm using for now to fix up my system is this patch.
>
How about this one? I have one more idea to try out if this doesn't
work (hacking on it now).
Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7a5fb79..1451945 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
dev_priv->cfb_fence = obj_priv->fence_reg;
dev_priv->cfb_plane = intel_crtc->plane;
- dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
+ dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
if (obj_priv->tiling_mode != I915_TILING_NONE) {
dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
> >
> > Nope, unfortunately, it's not helping on my T400 laptop. I'm still
> > getting huge amounts of glitching and tearing with this patch applied
> > against -rc3.
> >
> > What I'm using for now to fix up my system is this patch.
> >
>
> How about this one? I have one more idea to try out if this doesn't
> work (hacking on it now).
I was also experiencing something very similar to Theodore's bug
report and, at least for me, the patch below fixed the issue (the
previous one also had no effect).
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7a5fb79..1451945 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
> dev_priv->cfb_fence = obj_priv->fence_reg;
> dev_priv->cfb_plane = intel_crtc->plane;
>
> - dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
> + dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
> if (obj_priv->tiling_mode != I915_TILING_NONE) {
> dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
> I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
> --
On Mon, 12 Oct 2009 20:46:51 +0200
"Carlos R. Mafra" <[email protected]> wrote:
> On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
> > >
> > > Nope, unfortunately, it's not helping on my T400 laptop. I'm
> > > still getting huge amounts of glitching and tearing with this
> > > patch applied against -rc3.
> > >
> > > What I'm using for now to fix up my system is this patch.
> > >
> >
> > How about this one? I have one more idea to try out if this doesn't
> > work (hacking on it now).
>
> I was also experiencing something very similar to Theodore's bug
> report and, at least for me, the patch below fixed the issue (the
> previous one also had no effect).
Cool, good to hear. Hopefully Ted and Keith will confirm too.
--
Jesse Barnes, Intel Open Source Technology Center
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7a5fb79..1451945 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
dev_priv->cfb_fence = obj_priv->fence_reg;
dev_priv->cfb_plane = intel_crtc->plane;
- dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
+ dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
if (obj_priv->tiling_mode != I915_TILING_NONE) {
dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
On Mon, Oct 12, 2009 at 12:05:10PM -0700, Jesse Barnes wrote:
> On Mon, 12 Oct 2009 20:46:51 +0200
> "Carlos R. Mafra" <[email protected]> wrote:
>
> > On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
> > > >
> > > > Nope, unfortunately, it's not helping on my T400 laptop. I'm
> > > > still getting huge amounts of glitching and tearing with this
> > > > patch applied against -rc3.
> > > >
> > > > What I'm using for now to fix up my system is this patch.
> > > >
> > >
> > > How about this one? I have one more idea to try out if this doesn't
> > > work (hacking on it now).
> >
> > I was also experiencing something very similar to Theodore's bug
> > report and, at least for me, the patch below fixed the issue (the
> > previous one also had no effect).
>
> Cool, good to hear. Hopefully Ted and Keith will confirm too.
Hmm, the amount of tearing seems to be a bit less frequent, but it's
definitely still happening with this patch applied. Sorry....
- Ted
> --
> Jesse Barnes, Intel Open Source Technology Center
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7a5fb79..1451945 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
> dev_priv->cfb_fence = obj_priv->fence_reg;
> dev_priv->cfb_plane = intel_crtc->plane;
>
> - dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
> + dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
> if (obj_priv->tiling_mode != I915_TILING_NONE) {
> dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
> I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
On Mon, 12 Oct 2009 22:31:46 -0400
Theodore Tso <[email protected]> wrote:
> On Mon, Oct 12, 2009 at 12:05:10PM -0700, Jesse Barnes wrote:
> > On Mon, 12 Oct 2009 20:46:51 +0200
> > "Carlos R. Mafra" <[email protected]> wrote:
> >
> > > On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
> > > > >
> > > > > Nope, unfortunately, it's not helping on my T400 laptop. I'm
> > > > > still getting huge amounts of glitching and tearing with this
> > > > > patch applied against -rc3.
> > > > >
> > > > > What I'm using for now to fix up my system is this patch.
> > > > >
> > > >
> > > > How about this one? I have one more idea to try out if this
> > > > doesn't work (hacking on it now).
> > >
> > > I was also experiencing something very similar to Theodore's bug
> > > report and, at least for me, the patch below fixed the issue (the
> > > previous one also had no effect).
> >
> > Cool, good to hear. Hopefully Ted and Keith will confirm too.
>
> Hmm, the amount of tearing seems to be a bit less frequent, but it's
> definitely still happening with this patch applied. Sorry....
Arg, I'm running out of ideas... How about this hack? I'll chat with
the chipset guys to see if we can figure out what's going on here...
--
Jesse Barnes, Intel Open Source Technology Center
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddb..d5ec112 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -352,13 +352,24 @@
#define FBC_LL_SIZE (1536)
-/* Framebuffer compression for GM45+ */
+/*
+ * Framebuffer compression for GM45+
+ *
+ * GM45+ support tracking of a back buffer for use with page flipping.
+ * In this case, the "persistent" bit should be set and both nuke disable
+ * bits should be set as well. The back buffer is tracked by setting the
+ * HT fence bit in the chicken bit reg and pointing the CPU fence at the
+ * back buffer for tracking.
+ */
#define DPFC_CB_BASE 0x3200
#define DPFC_CONTROL 0x3208
#define DPFC_CTL_EN (1<<31)
#define DPFC_CTL_PLANEA (0<<30)
#define DPFC_CTL_PLANEB (1<<30)
#define DPFC_CTL_FENCE_EN (1<<29)
+#define DPFC_CTL_CSNUKE_DIS (1<<27)
+#define DPFC_CTL_MMIONUKE_DIS (1<<26)
+#define DPFC_CTL_PERSISTENT (1<<25)
#define DPFC_SR_EN (1<<10)
#define DPFC_CTL_LIMIT_1X (0<<6)
#define DPFC_CTL_LIMIT_2X (1<<6)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7a5fb79..ea808a9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2441,6 +2441,8 @@ static void g4x_update_wm(struct drm_device *dev, int unused, int unused2,
else
fw_blc_self &= ~FW_BLC_SELF_EN;
I915_WRITE(FW_BLC_SELF, fw_blc_self);
+ I915_WRITE(DSPFW1, (8 << 23) | (8 << 16) | (8 << 8) | (8 << 0));
+ I915_WRITE(DSPFW2, (1 << 31) | (8 << 28) | (8 << 8) | (8 << 0));
}
static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
Thanks, should I apply this on top of your previous patch, or on a
completely virgin 2.6.32-rc3 tree?
I don't know if this helps, but the amount of tearing seems to be
roughly proportional to how many "white" pixels are on the screen.
There isn't much tearing if I just have my (brown) Ubuntu 9.04 default
background image. There is a bit more tearing on the virtual desktop
once I open an 80x52 black-on-white gnome-terminal window, so that 45%
of my widescreen has white pixels due to the backgrouin of the
gnome-terminal.
On the virtual desktop where my firefox browser is opened, the
tearing/glitching is much more frequent. And where the
tearing/glitching is seems to be be roughly related to where the mouse
cursor happens to be. (Usually starting at the horizontol row of
pixels where the mouse is going down towards the bottom of the screen;
although sometimes if the mouse is very close to the bottom of the
screen, there is some tearing at the top of the screen as well.)
Does this description help at all? Would a video clip of the
tearing/glitching be useful?
- Ted
On Tue, 13 Oct 2009 15:00:55 -0400
Theodore Tso <[email protected]> wrote:
> Thanks, should I apply this on top of your previous patch, or on a
> completely virgin 2.6.32-rc3 tree?
Either way should be fine, since the previous patches don't appear to
be helping (they shouldn't hurt either).
> I don't know if this helps, but the amount of tearing seems to be
> roughly proportional to how many "white" pixels are on the screen.
> There isn't much tearing if I just have my (brown) Ubuntu 9.04 default
> background image. There is a bit more tearing on the virtual desktop
> once I open an 80x52 black-on-white gnome-terminal window, so that 45%
> of my widescreen has white pixels due to the backgrouin of the
> gnome-terminal.
>
> On the virtual desktop where my firefox browser is opened, the
> tearing/glitching is much more frequent. And where the
> tearing/glitching is seems to be be roughly related to where the mouse
> cursor happens to be. (Usually starting at the horizontol row of
> pixels where the mouse is going down towards the bottom of the screen;
> although sometimes if the mouse is very close to the bottom of the
> screen, there is some tearing at the top of the screen as well.)
>
> Does this description help at all? Would a video clip of the
> tearing/glitching be useful?
Thanks for the description, it matches what I've seen on Eric and Ian's
machines, though I can't reproduce it myself.
According to the chipset team that form of display corruption is likely
related to RAM self-refresh... Sounds like the display plane isn't
getting its memory requests serviced fast enough when in self-refresh
mode, which might mean we have to program the self-refresh watermarks
more aggressively on GM45.
--
Jesse Barnes, Intel Open Source Technology Center
Hi Jesse.
Sorry to jump in but I also had issues with -32rc (i915 chip) and this
patch seems to have resolved all problems.
I don't know how to describe in english what happened to my desktop
but probably "glitches" and "tearings" could be the correct words.
Also sometimes the screen went blank and needed to switch to terminal
console and back to return to the normal X screen.
Nothing in the logs, neither messages nor Xorg.0.log.
Regards,
Fabio
On Mon, Oct 12, 2009 at 9:05 PM, Jesse Barnes <[email protected]> wrote:
> On Mon, 12 Oct 2009 20:46:51 +0200
> "Carlos R. Mafra" <[email protected]> wrote:
>
>> On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
>> > >
>> > > Nope, unfortunately, it's not helping on my T400 laptop. I'm
>> > > still getting huge amounts of glitching and tearing with this
>> > > patch applied against -rc3.
>> > >
>> > > What I'm using for now to fix up my system is this patch.
>> > >
>> >
>> > How about this one? I have one more idea to try out if this doesn't
>> > work (hacking on it now).
>>
>> I was also experiencing something very similar to Theodore's bug
>> report and, at least for me, the patch below fixed the issue (the
>> previous one also had no effect).
>
> Cool, good to hear. Hopefully Ted and Keith will confirm too.
>
> --
> Jesse Barnes, Intel Open Source Technology Center
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 7a5fb79..1451945 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
> dev_priv->cfb_fence = obj_priv->fence_reg;
> dev_priv->cfb_plane = intel_crtc->plane;
>
> - dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
> + dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
> if (obj_priv->tiling_mode != I915_TILING_NONE) {
> dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
> I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
>
The patch below should have only affected GM45 chipsets, what chipset
do you have (lspci -vvv -s 02.0 should tell you).
Sounds like this patch was good enough for both you and Carlos, but not
sufficient for Ted or Keith. What resolution are you running?
Jesse
On Tue, 13 Oct 2009 21:19:32 +0200
Fabio Comolli <[email protected]> wrote:
> Hi Jesse.
> Sorry to jump in but I also had issues with -32rc (i915 chip) and this
> patch seems to have resolved all problems.
>
> I don't know how to describe in english what happened to my desktop
> but probably "glitches" and "tearings" could be the correct words.
> Also sometimes the screen went blank and needed to switch to terminal
> console and back to return to the normal X screen.
>
> Nothing in the logs, neither messages nor Xorg.0.log.
>
> Regards,
> Fabio
>
>
>
> On Mon, Oct 12, 2009 at 9:05 PM, Jesse Barnes
> <[email protected]> wrote:
> > On Mon, 12 Oct 2009 20:46:51 +0200
> > "Carlos R. Mafra" <[email protected]> wrote:
> >
> >> On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
> >> > >
> >> > > Nope, unfortunately, it's not helping on my T400 laptop. I'm
> >> > > still getting huge amounts of glitching and tearing with this
> >> > > patch applied against -rc3.
> >> > >
> >> > > What I'm using for now to fix up my system is this patch.
> >> > >
> >> >
> >> > How about this one? I have one more idea to try out if this
> >> > doesn't work (hacking on it now).
> >>
> >> I was also experiencing something very similar to Theodore's bug
> >> report and, at least for me, the patch below fixed the issue (the
> >> previous one also had no effect).
> >
> > Cool, good to hear. Hopefully Ted and Keith will confirm too.
> >
> > --
> > Jesse Barnes, Intel Open Source Technology Center
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c index 7a5fb79..1451945 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc
> > *crtc, unsigned long interval) dev_priv->cfb_fence =
> > obj_priv->fence_reg; dev_priv->cfb_plane = intel_crtc->plane;
> >
> > - dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
> > + dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
> > if (obj_priv->tiling_mode != I915_TILING_NONE) {
> > dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
> > I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
> > --
> > To unsubscribe from this list: send the line "unsubscribe
> > linux-kernel" in the body of a message to [email protected]
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> > Please read the FAQ at http://www.tux.org/lkml/
> >
>
--
Jesse Barnes, Intel Open Source Technology Center
Hi.
On Tue, Oct 13, 2009 at 9:25 PM, Jesse Barnes <[email protected]> wrote:
> The patch below should have only affected GM45 chipsets, what chipset
> do you have (lspci -vvv -s 02.0 should tell you).
>
Very strange because it's a 915:
00:02.0 VGA compatible controller: Intel Corporation Mobile
915GM/GMS/910GML Express Graphics Controller (rev 04) (prog-if 00 [VGA
controller])
Subsystem: ASUSTeK Computer Inc. Device 82d9
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 16
Region 0: Memory at f7f00000 (32-bit, non-prefetchable) [size=512K]
Region 1: I/O ports at ec00 [size=8]
Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M]
Region 3: Memory at f7ec0000 (32-bit, non-prefetchable) [size=256K]
Expansion ROM at <unassigned> [disabled]
Capabilities: [d0] Power Management version 2
Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Kernel driver in use: i915
> Sounds like this patch was good enough for both you and Carlos, but not
> sufficient for Ted or Keith. What resolution are you running?
It's an Asus eeePC 900 @ 1024x600
BTW, the patch really helps, usually I experienced problems after 3/4
minutes of work and sometimes I couldn't recover form the blank
screen. Now it's more than 1h 30' I'm at the laptop and everything is
perfect.
>
> Jesse
>
Regards,
Fabio
> On Tue, 13 Oct 2009 21:19:32 +0200
> Fabio Comolli <[email protected]> wrote:
>
>> Hi Jesse.
>> Sorry to jump in but I also had issues with -32rc (i915 chip) and this
>> patch seems to have resolved all problems.
>>
>> I don't know how to describe in english what happened to my desktop
>> but probably "glitches" and "tearings" could be the correct words.
>> Also sometimes the screen went blank and needed to switch to terminal
>> console and back to return to the normal X screen.
>>
>> Nothing in the logs, neither messages nor Xorg.0.log.
>>
>> Regards,
>> Fabio
>>
>>
>>
>> On Mon, Oct 12, 2009 at 9:05 PM, Jesse Barnes
>> <[email protected]> wrote:
>> > On Mon, 12 Oct 2009 20:46:51 +0200
>> > "Carlos R. Mafra" <[email protected]> wrote:
>> >
>> >> On Mon 12.Oct'09 at 9:54:38 -0700, Jesse Barnes wrote:
>> >> > >
>> >> > > Nope, unfortunately, it's not helping on my T400 laptop. I'm
>> >> > > still getting huge amounts of glitching and tearing with this
>> >> > > patch applied against -rc3.
>> >> > >
>> >> > > What I'm using for now to fix up my system is this patch.
>> >> > >
>> >> >
>> >> > How about this one? I have one more idea to try out if this
>> >> > doesn't work (hacking on it now).
>> >>
>> >> I was also experiencing something very similar to Theodore's bug
>> >> report and, at least for me, the patch below fixed the issue (the
>> >> previous one also had no effect).
>> >
>> > Cool, good to hear. Hopefully Ted and Keith will confirm too.
>> >
>> > --
>> > Jesse Barnes, Intel Open Source Technology Center
>> >
>> > diff --git a/drivers/gpu/drm/i915/intel_display.c
>> > b/drivers/gpu/drm/i915/intel_display.c index 7a5fb79..1451945 100644
>> > --- a/drivers/gpu/drm/i915/intel_display.c
>> > +++ b/drivers/gpu/drm/i915/intel_display.c
>> > @@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc
>> > *crtc, unsigned long interval) dev_priv->cfb_fence =
>> > obj_priv->fence_reg; dev_priv->cfb_plane = intel_crtc->plane;
>> >
>> > - dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
>> > + dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
>> > if (obj_priv->tiling_mode != I915_TILING_NONE) {
>> > dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
>> > I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
>> > --
>> > To unsubscribe from this list: send the line "unsubscribe
>> > linux-kernel" in the body of a message to [email protected]
>> > More majordomo info at http://vger.kernel.org/majordomo-info.html
>> > Please read the FAQ at http://www.tux.org/lkml/
>> >
>>
>
>
> --
> Jesse Barnes, Intel Open Source Technology Center
>
On Tue, 13 Oct 2009 12:14:26 -0700
Jesse Barnes <[email protected]> wrote:
> According to the chipset team that form of display corruption is
> likely related to RAM self-refresh... Sounds like the display plane
> isn't getting its memory requests serviced fast enough when in
> self-refresh mode, which might mean we have to program the
> self-refresh watermarks more aggressively on GM45.
Ok, like any good bug there was more than one thing wrong:
- we weren't setting up a fence for the object before enabling FBC.
Chris caught this and posted a patch to
[email protected] titled "drm/i915: Install a fence
register for fbc on g4x" (attached for convenience)
- turns out we *do* need to set watermarks on G4x, despite some hw
documentation indicating otherwise, patch for that attached
Hopefully with these two you'll have a solid display and some power
saving!
--
Jesse Barnes, Intel Open Source Technology Center
On Tue, Oct 13, 2009 at 10:01:35AM -0700, Jesse Barnes wrote:
>
> Arg, I'm running out of ideas... How about this hack? I'll chat with
> the chipset guys to see if we can figure out what's going on here...
>
So the first patch plus this second patch actually made things *worse*
on the T400. I'll try adding the 3rd patch now.
- Ted
On Wed, Oct 14, 2009 at 02:22:52PM -0700, Jesse Barnes wrote:
> On Tue, 13 Oct 2009 12:14:26 -0700
> Jesse Barnes <[email protected]> wrote:
> > According to the chipset team that form of display corruption is
> > likely related to RAM self-refresh... Sounds like the display plane
> > isn't getting its memory requests serviced fast enough when in
> > self-refresh mode, which might mean we have to program the
> > self-refresh watermarks more aggressively on GM45.
>
> Ok, like any good bug there was more than one thing wrong:
> - we weren't setting up a fence for the object before enabling FBC.
> Chris caught this and posted a patch to
> [email protected] titled "drm/i915: Install a fence
> register for fbc on g4x" (attached for convenience)
> - turns out we *do* need to set watermarks on G4x, despite some hw
> documentation indicating otherwise, patch for that attached
>
> Hopefully with these two you'll have a solid display and some power
> saving!
With these two patches (and none of your prior ones) applied to
2.6.32-rc3, things are definitely better. I'm still seeing a few
glitches (one as mutt was loading my Maildir inbox) and one as I was
typing this message in emacs, but it's at best one minor every 5-10
minutes. It's rare enough to be at most a wee bit distracting (*lots*
better than before), and I can see the power savings.
If I need to live with a display glitch every 5-10 minutes or so to
get better power savings, I'll take it....
- Ted
On Wed, Oct 14, 2009 at 10:26:45PM -0400, Theodore Tso wrote:
>
> If I need to live with a display glitch every 5-10 minutes or so to
> get better power savings, I'll take it....
>
While mail reading and composing responses in a tty based mail reader
(mutt/emacs -nw), I'm seeing display glitches every 3-5 minutes. Each
time it's quite minor so it's the sort of thing which is definitely
"blink at the wrong time and you'll miss it".
Being a battery lifetime freak, I'll definitely take the tradeoff, but
given that it occurs even when I'm plugged into AC mains, I could see
some users being annoyed by it, and I could see them wanting to be
able to switch off the feature when they are on AC, if we find a
complete fix.
- Ted
On Wed, 14 Oct 2009 22:26:45 -0400
Theodore Tso <[email protected]> wrote:
> On Wed, Oct 14, 2009 at 02:22:52PM -0700, Jesse Barnes wrote:
> > On Tue, 13 Oct 2009 12:14:26 -0700
> > Jesse Barnes <[email protected]> wrote:
> > > According to the chipset team that form of display corruption is
> > > likely related to RAM self-refresh... Sounds like the display
> > > plane isn't getting its memory requests serviced fast enough when
> > > in self-refresh mode, which might mean we have to program the
> > > self-refresh watermarks more aggressively on GM45.
> >
> > Ok, like any good bug there was more than one thing wrong:
> > - we weren't setting up a fence for the object before enabling
> > FBC. Chris caught this and posted a patch to
> > [email protected] titled "drm/i915: Install a
> > fence register for fbc on g4x" (attached for convenience)
> > - turns out we *do* need to set watermarks on G4x, despite some hw
> > documentation indicating otherwise, patch for that attached
> >
> > Hopefully with these two you'll have a solid display and some power
> > saving!
>
> With these two patches (and none of your prior ones) applied to
> 2.6.32-rc3, things are definitely better. I'm still seeing a few
> glitches (one as mutt was loading my Maildir inbox) and one as I was
> typing this message in emacs, but it's at best one minor every 5-10
> minutes. It's rare enough to be at most a wee bit distracting (*lots*
> better than before), and I can see the power savings.
>
> If I need to live with a display glitch every 5-10 minutes or so to
> get better power savings, I'll take it....
Oh I think we can do better than that. The hardcoded values I put in
for the watermarks are almost certainly wrong. I should be able to
reproduce what you're seeing (anything that takes a lot of memory
bandwidth will probably cause flicker) and adjust the watermarks to the
correct values to avoid that. I'll try to find time in Japan to do
that...
--
Jesse Barnes, Intel Open Source Technology Center
On Thu, 15 Oct 2009 00:02:04 -0400
Theodore Tso <[email protected]> wrote:
> On Wed, Oct 14, 2009 at 10:26:45PM -0400, Theodore Tso wrote:
> >
> > If I need to live with a display glitch every 5-10 minutes or so to
> > get better power savings, I'll take it....
> >
>
> While mail reading and composing responses in a tty based mail reader
> (mutt/emacs -nw), I'm seeing display glitches every 3-5 minutes. Each
> time it's quite minor so it's the sort of thing which is definitely
> "blink at the wrong time and you'll miss it".
>
> Being a battery lifetime freak, I'll definitely take the tradeoff, but
> given that it occurs even when I'm plugged into AC mains, I could see
> some users being annoyed by it, and I could see them wanting to be
> able to switch off the feature when they are on AC, if we find a
> complete fix.
Ok, hopefully this is the "correct" patch. It works for me, can you
give it a try?
Thanks,
Jesse
>From d645f010b1089b324c7bbf70b424334365867c56 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <[email protected]>
Date: Mon, 19 Oct 2009 09:52:15 +0900
Subject: [PATCH] drm/i915: add FIFO watermark support for G4x
Turns out G4x needs to have sensible watermarks set, especially for
self-refresh enabled modes. Add support for it.
Signed-off-by: Jesse Barnes <[email protected]>
---
drivers/gpu/drm/i915/i915_reg.h | 25 ++++++++++-
drivers/gpu/drm/i915/intel_display.c | 85 +++++++++++++++++++++++++++++----
2 files changed, 98 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddb..b0c4996 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -352,13 +352,24 @@
#define FBC_LL_SIZE (1536)
-/* Framebuffer compression for GM45+ */
+/*
+ * Framebuffer compression for GM45+
+ *
+ * GM45+ support tracking of a back buffer for use with page flipping.
+ * In this case, the "persistent" bit should be set and both nuke disable
+ * bits should be set as well. The back buffer is tracked by setting the
+ * HT fence bit in the chicken bit reg and pointing the CPU fence at the
+ * back buffer for tracking.
+ */
#define DPFC_CB_BASE 0x3200
#define DPFC_CONTROL 0x3208
#define DPFC_CTL_EN (1<<31)
#define DPFC_CTL_PLANEA (0<<30)
#define DPFC_CTL_PLANEB (1<<30)
#define DPFC_CTL_FENCE_EN (1<<29)
+#define DPFC_CTL_CSNUKE_DIS (1<<27)
+#define DPFC_CTL_MMIONUKE_DIS (1<<26)
+#define DPFC_CTL_PERSISTENT (1<<25)
#define DPFC_SR_EN (1<<10)
#define DPFC_CTL_LIMIT_1X (0<<6)
#define DPFC_CTL_LIMIT_2X (1<<6)
@@ -1790,17 +1801,29 @@
#define DSPARB_AEND_SHIFT 0
#define DSPFW1 0x70034
+#define DSPFW_SR_SHIFT 23
+#define DSPFW_CURSORB_SHIFT 16
+#define DSPFW_PLANEB_SHIFT 8
#define DSPFW2 0x70038
+#define DSPFW_CURSORA_MASK 0x00003f00
+#define DSPFW_CURSORA_SHIFT 16
#define DSPFW3 0x7003c
+#define DSPFW_HPLL_SR_EN (1<<31)
+#define DSPFW_CURSOR_SR_SHIFT 24
#define IGD_SELF_REFRESH_EN (1<<30)
/* FIFO watermark sizes etc */
+#define G4X_FIFO_LINE_SIZE 64
#define I915_FIFO_LINE_SIZE 64
#define I830_FIFO_LINE_SIZE 32
+
+#define G4X_FIFO_SIZE 127
#define I945_FIFO_SIZE 127 /* 945 & 965 */
#define I915_FIFO_SIZE 95
#define I855GM_FIFO_SIZE 127 /* In cachelines */
#define I830_FIFO_SIZE 95
+
+#define G4X_MAX_WM 0x3f
#define I915_MAX_WM 0x3f
#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a0f6bbe..b1e7eb5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1047,7 +1047,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
dev_priv->cfb_fence = obj_priv->fence_reg;
dev_priv->cfb_plane = intel_crtc->plane;
- dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
+ dpfc_ctl = plane | DPFC_CTL_LIMIT_1X;
if (obj_priv->tiling_mode != I915_TILING_NONE) {
dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
@@ -1055,14 +1055,13 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
I915_WRITE(DPFC_CHICKEN, ~DPFC_HT_MODIFY);
}
- I915_WRITE(DPFC_CONTROL, dpfc_ctl);
I915_WRITE(DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |
(stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) |
(interval << DPFC_RECOMP_TIMER_COUNT_SHIFT));
I915_WRITE(DPFC_FENCE_YOFF, crtc->y);
/* enable it... */
- I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);
+ I915_WRITE(DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
DRM_DEBUG("enabled fbc on plane %d\n", intel_crtc->plane);
}
@@ -2142,6 +2141,13 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = {
IGD_CURSOR_GUARD_WM,
IGD_FIFO_LINE_SIZE
};
+static struct intel_watermark_params g4x_wm_info = {
+ G4X_FIFO_SIZE,
+ G4X_MAX_WM,
+ G4X_MAX_WM,
+ 2,
+ G4X_FIFO_LINE_SIZE,
+};
static struct intel_watermark_params i945_wm_info = {
I945_FIFO_SIZE,
I915_MAX_WM,
@@ -2432,17 +2438,74 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
return size;
}
-static void g4x_update_wm(struct drm_device *dev, int unused, int unused2,
- int unused3, int unused4)
+static void g4x_update_wm(struct drm_device *dev, int planea_clock,
+ int planeb_clock, int sr_hdisplay, int pixel_size)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- u32 fw_blc_self = I915_READ(FW_BLC_SELF);
+ int total_size, cacheline_size;
+ int planea_wm, planeb_wm, cursora_wm, cursorb_wm, cursor_sr;
+ struct intel_watermark_params planea_params, planeb_params;
+ unsigned long line_time_us;
+ int sr_clock, sr_entries = 0, entries_required;
- if (i915_powersave)
- fw_blc_self |= FW_BLC_SELF_EN;
- else
- fw_blc_self &= ~FW_BLC_SELF_EN;
- I915_WRITE(FW_BLC_SELF, fw_blc_self);
+ /* Create copies of the base settings for each pipe */
+ planea_params = planeb_params = g4x_wm_info;
+
+ /* Grab a couple of global values before we overwrite them */
+ total_size = planea_params.fifo_size;
+ cacheline_size = planea_params.cacheline_size;
+
+ /*
+ * Note: we need to make sure we don't overflow for various clock &
+ * latency values.
+ * clocks go from a few thousand to several hundred thousand.
+ * latency is usually a few thousand
+ */
+ entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) /
+ 1000;
+ entries_required /= G4X_FIFO_LINE_SIZE;
+ planea_wm = entries_required + planea_params.guard_size;
+
+ entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) /
+ 1000;
+ entries_required /= G4X_FIFO_LINE_SIZE;
+ planeb_wm = entries_required + planeb_params.guard_size;
+
+ cursora_wm = cursorb_wm = 16;
+ cursor_sr = 32;
+
+ DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
+
+ /* Calc sr entries for one plane configs */
+ if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
+ /* self-refresh has much higher latency */
+ const static int sr_latency_ns = 12000;
+
+ sr_clock = planea_clock ? planea_clock : planeb_clock;
+ line_time_us = ((sr_hdisplay * 1000) / sr_clock);
+
+ /* Use ns/us then divide to preserve precision */
+ sr_entries = (((sr_latency_ns / line_time_us) + 1) *
+ pixel_size * sr_hdisplay) / 1000;
+ sr_entries = roundup(sr_entries / cacheline_size, 1);
+ DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
+ I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
+ }
+
+ DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
+ planea_wm, planeb_wm, sr_entries);
+
+ planea_wm &= 0x3f;
+ planeb_wm &= 0x3f;
+
+ I915_WRITE(DSPFW1, (sr_entries << DSPFW_SR_SHIFT) |
+ (cursorb_wm << DSPFW_CURSORB_SHIFT) |
+ (planeb_wm << DSPFW_PLANEB_SHIFT) | planea_wm);
+ I915_WRITE(DSPFW2, (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) |
+ (cursora_wm << DSPFW_CURSORA_SHIFT));
+ /* HPLL off in SR has some issues on G4x... disable it */
+ I915_WRITE(DSPFW3, (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) |
+ (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
}
static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
--
1.6.3.3
On Mon, 19 Oct 2009 10:04:37 +0900
Jesse Barnes <[email protected]> wrote:
> On Thu, 15 Oct 2009 00:02:04 -0400
> Theodore Tso <[email protected]> wrote:
>
> > On Wed, Oct 14, 2009 at 10:26:45PM -0400, Theodore Tso wrote:
> > >
> > > If I need to live with a display glitch every 5-10 minutes or so
> > > to get better power savings, I'll take it....
> > >
> >
> > While mail reading and composing responses in a tty based mail
> > reader (mutt/emacs -nw), I'm seeing display glitches every 3-5
> > minutes. Each time it's quite minor so it's the sort of thing
> > which is definitely "blink at the wrong time and you'll miss it".
> >
> > Being a battery lifetime freak, I'll definitely take the tradeoff,
> > but given that it occurs even when I'm plugged into AC mains, I
> > could see some users being annoyed by it, and I could see them
> > wanting to be able to switch off the feature when they are on AC,
> > if we find a complete fix.
>
> Ok, hopefully this is the "correct" patch. It works for me, can you
> give it a try?
Here's an even more "final" patchset with some spurious hunks removed.
Thanks,
Jesse
On Mon, Oct 19, 2009 at 10:15:26AM +0900, Jesse Barnes wrote:
> >
> > Ok, hopefully this is the "correct" patch. It works for me, can you
> > give it a try?
>
> Here's an even more "final" patchset with some spurious hunks removed.
This seems to work for me, thanks!!!
- Ted
Hello,
On Mon, 19 Oct 2009 10:15:26 +0900
Jesse Barnes <[email protected]> wrote:
> On Mon, 19 Oct 2009 10:04:37 +0900
> Jesse Barnes <[email protected]> wrote:
>
> > On Thu, 15 Oct 2009 00:02:04 -0400
> > Theodore Tso <[email protected]> wrote:
> >
> > > On Wed, Oct 14, 2009 at 10:26:45PM -0400, Theodore Tso wrote:
> > > >
> > > > If I need to live with a display glitch every 5-10 minutes or so
> > > > to get better power savings, I'll take it....
> > > >
> > >
> > > While mail reading and composing responses in a tty based mail
> > > reader (mutt/emacs -nw), I'm seeing display glitches every 3-5
> > > minutes. Each time it's quite minor so it's the sort of thing
> > > which is definitely "blink at the wrong time and you'll miss it".
> > >
> > > Being a battery lifetime freak, I'll definitely take the tradeoff,
> > > but given that it occurs even when I'm plugged into AC mains, I
> > > could see some users being annoyed by it, and I could see them
> > > wanting to be able to switch off the feature when they are on AC,
> > > if we find a complete fix.
> >
> > Ok, hopefully this is the "correct" patch. It works for me, can you
> > give it a try?
>
> Here's an even more "final" patchset with some spurious hunks removed.
>
This is also fixing the problem I had with my Vostro !:)
Thanks Frans for pointing my to this patches.
Tested-By: Paul Rolland <[email protected]>
Regards,
Paul
On Mon, Oct 19, 2009 at 10:15:26AM +0900, Jesse Barnes wrote:
> Here's an even more "final" patchset with some spurious hunks removed.
These patches solve the problems with severe screen flickering I
experienced on a "Mobile 4 Series Chipset" (rev07) and bisected down
to the "drm/i915: framebuffer compression for GM45+" commit
(74dff282237).
The flickering was most easily triggered by closing and opening the lid,
and was reduced or temporarily stopped by moving the mouse or pressing a
key.
Tested-by: Johan Hovold <[email protected]>
Thanks,
Johan