The serie contains 2 updates within clkgen-fsyn and clkgen-mux
in order to allow those drivers to pick up the reg property
within their parent node instead of their own node. Such
behavior is already in place for the other st clk drivers and
to allow to not have several time the same reg value within
the device tree.
Those changes are also done in order to avoid DT warning seen
when compiling with W=1 and indicating unique-unit-address issues.
v2: update clkgen-fsyn patch to add a pr_err
Alain Volmat (2):
clk: st: clkgen-fsyn: search reg within node or parent
clk: st: clkgen-mux: search reg within node or parent
drivers/clk/st/clkgen-fsyn.c | 13 +++++++++++--
drivers/clk/st/clkgen-mux.c | 11 +++++++++--
2 files changed, 20 insertions(+), 4 deletions(-)
--
2.25.1
In order to avoid having duplicated addresses within the DT,
only have one unit-address per clockgen and each driver within
the clockgen should look at the parent node (overall clockgen)
to figure out the reg property. Such behavior is already in
place in other STi platform clock drivers such as clk-flexgen
and clkgen-pll. Keep backward compatibility by first looking
at reg within the node before looking into the parent node.
Signed-off-by: Alain Volmat <[email protected]>
---
v2: add pr_err message when failing to get reg information
drivers/clk/st/clkgen-fsyn.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index 164285d6be97..582a22c04919 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -988,9 +988,18 @@ static void __init st_of_quadfs_setup(struct device_node *np,
void __iomem *reg;
spinlock_t *lock;
+ /*
+ * First check for reg property within the node to keep backward
+ * compatibility, then if reg doesn't exist look at the parent node
+ */
reg = of_iomap(np, 0);
- if (!reg)
- return;
+ if (!reg) {
+ reg = of_iomap(of_get_parent(np), 0);
+ if (!reg) {
+ pr_err("%s: Failed to get base address\n", __func__);
+ return;
+ }
+ }
clk_parent_name = of_clk_get_parent_name(np, 0);
if (!clk_parent_name)
--
2.25.1
In order to avoid having duplicated addresses within the DT,
only have one unit-address per clockgen and each driver within
the clockgen should look at the parent node (overall clockgen)
to figure out the reg property. Such behavior is already in
place in other STi platform clock drivers such as clk-flexgen
and clkgen-pll. Keep backward compatibility by first looking
at reg within the node before looking into the parent node.
Signed-off-by: Alain Volmat <[email protected]>
---
v2: identical to v1
drivers/clk/st/clkgen-mux.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c
index ce583ded968a..ee39af7a0b72 100644
--- a/drivers/clk/st/clkgen-mux.c
+++ b/drivers/clk/st/clkgen-mux.c
@@ -57,10 +57,17 @@ static void __init st_of_clkgen_mux_setup(struct device_node *np,
const char **parents;
int num_parents = 0;
+ /*
+ * First check for reg property within the node to keep backward
+ * compatibility, then if reg doesn't exist look at the parent node
+ */
reg = of_iomap(np, 0);
if (!reg) {
- pr_err("%s: Failed to get base address\n", __func__);
- return;
+ reg = of_iomap(of_get_parent(np), 0);
+ if (!reg) {
+ pr_err("%s: Failed to get base address\n", __func__);
+ return;
+ }
}
parents = clkgen_mux_get_parents(np, &num_parents);
--
2.25.1
Hi Alain
On 12/18/21 10:11 PM, Alain Volmat wrote:
> In order to avoid having duplicated addresses within the DT,
> only have one unit-address per clockgen and each driver within
> the clockgen should look at the parent node (overall clockgen)
> to figure out the reg property. Such behavior is already in
> place in other STi platform clock drivers such as clk-flexgen
> and clkgen-pll. Keep backward compatibility by first looking
> at reg within the node before looking into the parent node.
>
> Signed-off-by: Alain Volmat <[email protected]>
> ---
> v2: add pr_err message when failing to get reg information
>
> drivers/clk/st/clkgen-fsyn.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
> index 164285d6be97..582a22c04919 100644
> --- a/drivers/clk/st/clkgen-fsyn.c
> +++ b/drivers/clk/st/clkgen-fsyn.c
> @@ -988,9 +988,18 @@ static void __init st_of_quadfs_setup(struct device_node *np,
> void __iomem *reg;
> spinlock_t *lock;
>
> + /*
> + * First check for reg property within the node to keep backward
> + * compatibility, then if reg doesn't exist look at the parent node
> + */
> reg = of_iomap(np, 0);
> - if (!reg)
> - return;
> + if (!reg) {
> + reg = of_iomap(of_get_parent(np), 0);
> + if (!reg) {
> + pr_err("%s: Failed to get base address\n", __func__);
> + return;
> + }
> + }
>
> clk_parent_name = of_clk_get_parent_name(np, 0);
> if (!clk_parent_name)
>
Reviewed-by: Patrice Chotard <[email protected]>
THanks
Patrice
Hi Alain
On 12/18/21 10:11 PM, Alain Volmat wrote:
> In order to avoid having duplicated addresses within the DT,
> only have one unit-address per clockgen and each driver within
> the clockgen should look at the parent node (overall clockgen)
> to figure out the reg property. Such behavior is already in
> place in other STi platform clock drivers such as clk-flexgen
> and clkgen-pll. Keep backward compatibility by first looking
> at reg within the node before looking into the parent node.
>
> Signed-off-by: Alain Volmat <[email protected]>
> ---
> v2: identical to v1
>
> drivers/clk/st/clkgen-mux.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c
> index ce583ded968a..ee39af7a0b72 100644
> --- a/drivers/clk/st/clkgen-mux.c
> +++ b/drivers/clk/st/clkgen-mux.c
> @@ -57,10 +57,17 @@ static void __init st_of_clkgen_mux_setup(struct device_node *np,
> const char **parents;
> int num_parents = 0;
>
> + /*
> + * First check for reg property within the node to keep backward
> + * compatibility, then if reg doesn't exist look at the parent node
> + */
> reg = of_iomap(np, 0);
> if (!reg) {
> - pr_err("%s: Failed to get base address\n", __func__);
> - return;
> + reg = of_iomap(of_get_parent(np), 0);
> + if (!reg) {
> + pr_err("%s: Failed to get base address\n", __func__);
> + return;
> + }
> }
>
> parents = clkgen_mux_get_parents(np, &num_parents);
>
Reviewed-by: Patrice Chotard <[email protected]>
Thanks
Patrice
Quoting Alain Volmat (2021-12-18 13:11:56)
> In order to avoid having duplicated addresses within the DT,
> only have one unit-address per clockgen and each driver within
> the clockgen should look at the parent node (overall clockgen)
> to figure out the reg property. Such behavior is already in
> place in other STi platform clock drivers such as clk-flexgen
> and clkgen-pll. Keep backward compatibility by first looking
> at reg within the node before looking into the parent node.
>
> Signed-off-by: Alain Volmat <[email protected]>
> ---
Applied to clk-next
Quoting Alain Volmat (2021-12-18 13:11:57)
> In order to avoid having duplicated addresses within the DT,
> only have one unit-address per clockgen and each driver within
> the clockgen should look at the parent node (overall clockgen)
> to figure out the reg property. Such behavior is already in
> place in other STi platform clock drivers such as clk-flexgen
> and clkgen-pll. Keep backward compatibility by first looking
> at reg within the node before looking into the parent node.
>
> Signed-off-by: Alain Volmat <[email protected]>
> ---
Applied to clk-next