2020-12-24 11:46:13

by Kishon Vijay Abraham I

Subject: [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC

AM64 has a single lane SERDES which can be configured to be used
with either PCIe or USB. Define the possilbe values for the SERDES
function in AM64 SoC here.

Signed-off-by: Kishon Vijay Abraham I <[email protected]>
---
include/dt-bindings/mux/ti-serdes.h | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index 9047ec6bd3cf..68e0f76deed1 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -90,4 +90,8 @@
#define J7200_SERDES0_LANE3_USB 0x2
#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3

+/* AM64 */
+#define AM64_SERDES0_LANE0_PCIE0 0x0
+#define AM64_SERDES0_LANE0_USB 0x1
+
#endif /* _DT_BINDINGS_MUX_TI_SERDES */
--
2.17.1

2021-01-08 03:05:55

by Rob Herring (Arm)

Subject: Re: [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC

On Thu, Dec 24, 2020 at 05:12:47PM +0530, Kishon Vijay Abraham I wrote:
> AM64 has a single lane SERDES which can be configured to be used
> with either PCIe or USB. Define the possilbe values for the SERDES
> function in AM64 SoC here.

Doesn't look like this is used? Would the common phy modes work?
>
> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
> ---
> include/dt-bindings/mux/ti-serdes.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
> index 9047ec6bd3cf..68e0f76deed1 100644
> --- a/include/dt-bindings/mux/ti-serdes.h
> +++ b/include/dt-bindings/mux/ti-serdes.h
> @@ -90,4 +90,8 @@
> #define J7200_SERDES0_LANE3_USB 0x2
> #define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
>
> +/* AM64 */
> +#define AM64_SERDES0_LANE0_PCIE0 0x0
> +#define AM64_SERDES0_LANE0_USB 0x1
> +
> #endif /* _DT_BINDINGS_MUX_TI_SERDES */
> --
> 2.17.1
>

2021-01-08 10:49:55

by Peter Rosin

Subject: Re: [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC

Hi!

On 2020-12-24 12:42, Kishon Vijay Abraham I wrote:
> AM64 has a single lane SERDES which can be configured to be used
> with either PCIe or USB. Define the possilbe values for the SERDES
> function in AM64 SoC here.
>
> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
> ---
> include/dt-bindings/mux/ti-serdes.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
> index 9047ec6bd3cf..68e0f76deed1 100644
> --- a/include/dt-bindings/mux/ti-serdes.h
> +++ b/include/dt-bindings/mux/ti-serdes.h
> @@ -90,4 +90,8 @@
> #define J7200_SERDES0_LANE3_USB 0x2
> #define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
>
> +/* AM64 */

In case you end up keeping these defines, despite the comment by Rob...

Nitpick, the J721E and J7200 sections have a blank line here, between the
header comment and the actual defines. But mehh...

Acked-by: Peter Rosin <[email protected]>

Cheers,
Peter

> +#define AM64_SERDES0_LANE0_PCIE0 0x0
> +#define AM64_SERDES0_LANE0_USB 0x1
> +
> #endif /* _DT_BINDINGS_MUX_TI_SERDES */
>

2021-01-08 11:03:41

by Kishon Vijay Abraham I

Subject: Re: [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC

Hi Rob,

On 08/01/21 8:33 am, Rob Herring wrote:
> On Thu, Dec 24, 2020 at 05:12:47PM +0530, Kishon Vijay Abraham I wrote:
>> AM64 has a single lane SERDES which can be configured to be used
>> with either PCIe or USB. Define the possilbe values for the SERDES
>> function in AM64 SoC here.
>
> Doesn't look like this is used? Would the common phy modes work?

This will be used when the dts files are added.

Thanks
Kishon
>>
>> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
>> ---
>> include/dt-bindings/mux/ti-serdes.h | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
>> index 9047ec6bd3cf..68e0f76deed1 100644
>> --- a/include/dt-bindings/mux/ti-serdes.h
>> +++ b/include/dt-bindings/mux/ti-serdes.h
>> @@ -90,4 +90,8 @@
>> #define J7200_SERDES0_LANE3_USB 0x2
>> #define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
>>
>> +/* AM64 */
>> +#define AM64_SERDES0_LANE0_PCIE0 0x0
>> +#define AM64_SERDES0_LANE0_USB 0x1
>> +
>> #endif /* _DT_BINDINGS_MUX_TI_SERDES */
>> --
>> 2.17.1
>>

2021-01-08 11:07:25

by Kishon Vijay Abraham I

Subject: Re: [PATCH 4/7] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC

Hi Peter,

On 08/01/21 4:16 pm, Peter Rosin wrote:
> Hi!
>
> On 2020-12-24 12:42, Kishon Vijay Abraham I wrote:
>> AM64 has a single lane SERDES which can be configured to be used
>> with either PCIe or USB. Define the possilbe values for the SERDES
>> function in AM64 SoC here.
>>
>> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
>> ---
>> include/dt-bindings/mux/ti-serdes.h | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
>> index 9047ec6bd3cf..68e0f76deed1 100644
>> --- a/include/dt-bindings/mux/ti-serdes.h
>> +++ b/include/dt-bindings/mux/ti-serdes.h
>> @@ -90,4 +90,8 @@
>> #define J7200_SERDES0_LANE3_USB 0x2
>> #define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
>>
>> +/* AM64 */
>
> In case you end up keeping these defines, despite the comment by Rob...
>
> Nitpick, the J721E and J7200 sections have a blank line here, between the
> header comment and the actual defines. But mehh...
>
> Acked-by: Peter Rosin <[email protected]>
Sure, will fix it in the next revision.

Thanks
Kishon

>
> Cheers,
> Peter
>
>> +#define AM64_SERDES0_LANE0_PCIE0 0x0
>> +#define AM64_SERDES0_LANE0_USB 0x1
>> +
>> #endif /* _DT_BINDINGS_MUX_TI_SERDES */
>>