2020-07-02 17:26:32

by Adrian Pop

Subject: [PATCH v2 1/2] ARM: dt-bindings: stm32: Add missing DSI clock.

Signed-off-by: Adrian Pop <[email protected]>
---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 +
1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h
index a90f3613c584..ba5cb7456ee4 100644
--- a/include/dt-bindings/mfd/stm32f7-rcc.h
+++ b/include/dt-bindings/mfd/stm32f7-rcc.h
@@ -107,6 +107,7 @@
#define STM32F7_RCC_APB2_SAI1 22
#define STM32F7_RCC_APB2_SAI2 23
#define STM32F7_RCC_APB2_LTDC 26
+#define STM32F7_RCC_APB2_DSI 27

#define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8))
#define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0)
--
2.27.0

2020-07-02 17:27:24

by Adrian Pop

Subject: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.

STM32f769-disco features a 4" MIPI DSI display: add support for it.
On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
memory pool for DMA with no-cache attribute which is located at the end of
RAM.

Signed-off-by: Adrian Pop <[email protected]>
---
arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++
arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
2 files changed, 83 insertions(+)

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 93c063796780..577a812ca01c 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -48,6 +48,19 @@ / {
#address-cells = <1>;
#size-cells = <1>;

+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ linux,dma {
+ compatible = "shared-dma-pool";
+ linux,dma-default;
+ no-map;
+ reg = <0xc0f00000 0x100000>;
+ };
+ };
+
clocks {
clk_hse: clk-hse {
#clock-cells = <0>;
@@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
};

soc {
+ ltdc: display-controller@40016800 {
+ compatible = "st,stm32-ltdc";
+ reg = <0x40016800 0x200>;
+ interrupts = <88>, <89>;
+ resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
+ clocks = <&rcc 1 CLK_LCD>;
+ clock-names = "lcd";
+ status = "disabled";
+ };
+
+ dsi: dsi@40016c00 {
+ compatible = "st,stm32-dsi";
+ reg = <0x40016c00 0x800>;
+ interrupts = <98>;
+ clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
+ clock-names = "pclk", "ref";
+ resets = <&rcc STM32F7_APB2_RESET(DSI)>;
+ reset-names = "apb";
+ status = "disabled";
+ };
+
timer2: timer@40000000 {
compatible = "st,stm32-timer";
reg = <0x40000000 0x400>;
diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
index 1626e00bb2cb..a9e81b49809c 100644
--- a/arch/arm/boot/dts/stm32f769-disco.dts
+++ b/arch/arm/boot/dts/stm32f769-disco.dts
@@ -153,3 +153,52 @@ &usbotg_hs {
pinctrl-names = "default";
status = "okay";
};
+
+&dsi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dsi_in: endpoint {
+ remote-endpoint = <&ltdc_out_dsi>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dsi_out: endpoint {
+ remote-endpoint = <&dsi_in_panel>;
+ };
+ };
+
+ };
+
+ panel: panel {
+ compatible = "orisetech,otm8009a";
+ reg = <0>;
+ reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ port {
+ dsi_in_panel: endpoint {
+ remote-endpoint = <&dsi_out>;
+ };
+ };
+ };
+};
+
+&ltdc {
+ status = "okay";
+
+ port {
+ ltdc_out_dsi: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+};
--
2.27.0

2020-07-14 02:52:09

by Rob Herring (Arm)

Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.

On Thu, Jul 02, 2020 at 08:27:14PM +0300, Adrian Pop wrote:
> STM32f769-disco features a 4" MIPI DSI display: add support for it.
> On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
> memory pool for DMA with no-cache attribute which is located at the end of
> RAM.
>
> Signed-off-by: Adrian Pop <[email protected]>
> ---
> arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++
> arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
> 2 files changed, 83 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> index 93c063796780..577a812ca01c 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -48,6 +48,19 @@ / {
> #address-cells = <1>;
> #size-cells = <1>;
>
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + linux,dma {

Build your DT with W=1. This will have a warning.

> + compatible = "shared-dma-pool";
> + linux,dma-default;
> + no-map;
> + reg = <0xc0f00000 0x100000>;
> + };
> + };
> +
> clocks {
> clk_hse: clk-hse {
> #clock-cells = <0>;
> @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> };
>
> soc {
> + ltdc: display-controller@40016800 {
> + compatible = "st,stm32-ltdc";
> + reg = <0x40016800 0x200>;
> + interrupts = <88>, <89>;
> + resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> + clocks = <&rcc 1 CLK_LCD>;
> + clock-names = "lcd";
> + status = "disabled";
> + };
> +
> + dsi: dsi@40016c00 {
> + compatible = "st,stm32-dsi";
> + reg = <0x40016c00 0x800>;
> + interrupts = <98>;
> + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> + clock-names = "pclk", "ref";
> + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> + reset-names = "apb";
> + status = "disabled";
> + };
> +
> timer2: timer@40000000 {
> compatible = "st,stm32-timer";
> reg = <0x40000000 0x400>;
> diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
> index 1626e00bb2cb..a9e81b49809c 100644
> --- a/arch/arm/boot/dts/stm32f769-disco.dts
> +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> @@ -153,3 +153,52 @@ &usbotg_hs {
> pinctrl-names = "default";
> status = "okay";
> };
> +
> +&dsi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi_in: endpoint {
> + remote-endpoint = <&ltdc_out_dsi>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi_out: endpoint {
> + remote-endpoint = <&dsi_in_panel>;
> + };
> + };
> +
> + };
> +
> + panel: panel {
> + compatible = "orisetech,otm8009a";
> + reg = <0>;
> + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> + status = "okay";

Don't need status. Enabled is the default.

> +
> + port {
> + dsi_in_panel: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> + };
> +};
> +
> +&ltdc {
> + status = "okay";
> +
> + port {
> + ltdc_out_dsi: endpoint {
> + remote-endpoint = <&dsi_in>;
> + };
> + };
> +};
> --
> 2.27.0
>

2020-07-14 03:40:46

by Dillon Hua

Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.

Hi, Adrian,

Just one suggestion for you.

Adrian Pop <[email protected]> 于2020年7月3日周五 上午1:30写道：
>
> STM32f769-disco features a 4" MIPI DSI display: add support for it.
> On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
> memory pool for DMA with no-cache attribute which is located at the end of
> RAM.
>
> Signed-off-by: Adrian Pop <[email protected]>
> ---
> arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++
> arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
> 2 files changed, 83 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> index 93c063796780..577a812ca01c 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -48,6 +48,19 @@ / {
> #address-cells = <1>;
> #size-cells = <1>;
>
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + linux,dma {
> + compatible = "shared-dma-pool";
> + linux,dma-default;
> + no-map;
> + reg = <0xc0f00000 0x100000>;
> + };
> + };
> +
Christoph Hellwig was submit a patch for !CONFIG_MMU platforms to support mmap.
the patch is : 1fbf57d05302 dma-direct: re-enable mmap for !CONFIG_MMU
i thought there is no need to create a reserved-memory for it.

> clocks {
> clk_hse: clk-hse {
> #clock-cells = <0>;
> @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> };
>
> soc {
> + ltdc: display-controller@40016800 {
> + compatible = "st,stm32-ltdc";
> + reg = <0x40016800 0x200>;
> + interrupts = <88>, <89>;
> + resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> + clocks = <&rcc 1 CLK_LCD>;
> + clock-names = "lcd";
> + status = "disabled";
> + };
> +
> + dsi: dsi@40016c00 {
> + compatible = "st,stm32-dsi";
> + reg = <0x40016c00 0x800>;
> + interrupts = <98>;
> + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> + clock-names = "pclk", "ref";
> + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> + reset-names = "apb";
> + status = "disabled";
> + };
> +
> timer2: timer@40000000 {
> compatible = "st,stm32-timer";
> reg = <0x40000000 0x400>;
> diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
> index 1626e00bb2cb..a9e81b49809c 100644
> --- a/arch/arm/boot/dts/stm32f769-disco.dts
> +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> @@ -153,3 +153,52 @@ &usbotg_hs {
> pinctrl-names = "default";
> status = "okay";
> };
> +
> +&dsi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi_in: endpoint {
> + remote-endpoint = <&ltdc_out_dsi>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi_out: endpoint {
> + remote-endpoint = <&dsi_in_panel>;
> + };
> + };
> +
> + };
> +
> + panel: panel {
> + compatible = "orisetech,otm8009a";
> + reg = <0>;
> + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + port {
> + dsi_in_panel: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> + };
> +};
> +
> +&ltdc {
> + status = "okay";
> +
> + port {
> + ltdc_out_dsi: endpoint {
> + remote-endpoint = <&dsi_in>;
> + };
> + };
> +};
> --
> 2.27.0
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

2020-07-19 14:55:36

by Adrian Pop

Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.

Hello Hua,

Thank you for your review,

On Tue, Jul 14, 2020 at 6:37 AM Hua Dillon <[email protected]> wrote:
>
> Hi, Adrian,
>
> Just one suggestion for you.
>
> Adrian Pop <[email protected]> 于2020年7月3日周五 上午1:30写道：
> >
> > STM32f769-disco features a 4" MIPI DSI display: add support for it.
> > On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
> > memory pool for DMA with no-cache attribute which is located at the end of
> > RAM.
> >
> > Signed-off-by: Adrian Pop <[email protected]>
> > ---
> > arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++
> > arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
> > 2 files changed, 83 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> > index 93c063796780..577a812ca01c 100644
> > --- a/arch/arm/boot/dts/stm32f746.dtsi
> > +++ b/arch/arm/boot/dts/stm32f746.dtsi
> > @@ -48,6 +48,19 @@ / {
> > #address-cells = <1>;
> > #size-cells = <1>;
> >
> > + reserved-memory {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + linux,dma {
> > + compatible = "shared-dma-pool";
> > + linux,dma-default;
> > + no-map;
> > + reg = <0xc0f00000 0x100000>;
> > + };
> > + };
> > +
> Christoph Hellwig was submit a patch for !CONFIG_MMU platforms to support mmap.
> the patch is : 1fbf57d05302 dma-direct: re-enable mmap for !CONFIG_MMU
> i thought there is no need to create a reserved-memory for it.

Just tried with his patch, if I don't have the reserved-memory, I get:

[drm] Initialized stm 1.0.0 20170330 for 40016800.display-controller on minor 0
------------[ cut here ]------------
WARNING: CPU: 0 PID: 5 at arch/arm/mm/dma-mapping-nommu.c:50 0xc000b8e9
CPU: 0 PID: 5 Comm: kworker/0:0 Not tainted 5.8.0-rc1-next-20200616 #4
Hardware name: STM32 (Device Tree Support)
Workqueue: events 0xc0150fc1

This is the reason I added the reserved memory in the first place.

>
> > clocks {
> > clk_hse: clk-hse {
> > #clock-cells = <0>;
> > @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> > };
> >
> > soc {
> > + ltdc: display-controller@40016800 {
> > + compatible = "st,stm32-ltdc";
> > + reg = <0x40016800 0x200>;
> > + interrupts = <88>, <89>;
> > + resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> > + clocks = <&rcc 1 CLK_LCD>;
> > + clock-names = "lcd";
> > + status = "disabled";
> > + };
> > +
> > + dsi: dsi@40016c00 {
> > + compatible = "st,stm32-dsi";
> > + reg = <0x40016c00 0x800>;
> > + interrupts = <98>;
> > + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> > + clock-names = "pclk", "ref";
> > + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> > + reset-names = "apb";
> > + status = "disabled";
> > + };
> > +
> > timer2: timer@40000000 {
> > compatible = "st,stm32-timer";
> > reg = <0x40000000 0x400>;
> > diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
> > index 1626e00bb2cb..a9e81b49809c 100644
> > --- a/arch/arm/boot/dts/stm32f769-disco.dts
> > +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> > @@ -153,3 +153,52 @@ &usbotg_hs {
> > pinctrl-names = "default";
> > status = "okay";
> > };
> > +
> > +&dsi {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "okay";
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + dsi_in: endpoint {
> > + remote-endpoint = <&ltdc_out_dsi>;
> > + };
> > + };
> > +
> > + port@1 {
> > + reg = <1>;
> > + dsi_out: endpoint {
> > + remote-endpoint = <&dsi_in_panel>;
> > + };
> > + };
> > +
> > + };
> > +
> > + panel: panel {
> > + compatible = "orisetech,otm8009a";
> > + reg = <0>;
> > + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> > + status = "okay";
> > +
> > + port {
> > + dsi_in_panel: endpoint {
> > + remote-endpoint = <&dsi_out>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&ltdc {
> > + status = "okay";
> > +
> > + port {
> > + ltdc_out_dsi: endpoint {
> > + remote-endpoint = <&dsi_in>;
> > + };
> > + };
> > +};
> > --
> > 2.27.0
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > [email protected]
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Regards,
Adrian

2020-07-20 03:21:01

by Dillon Hua

Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.

Hi Adrian,

Adrian Pop <[email protected]> 于2020年7月19日周日 下午10:54写道：
>
> Hello Hua,
>
> Thank you for your review,
>
> On Tue, Jul 14, 2020 at 6:37 AM Hua Dillon <[email protected]> wrote:
> >
> > Hi, Adrian,
> >
> > Just one suggestion for you.
> >
> > Adrian Pop <[email protected]> 于2020年7月3日周五 上午1:30写道：
> > >
> > > STM32f769-disco features a 4" MIPI DSI display: add support for it.
> > > On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
> > > memory pool for DMA with no-cache attribute which is located at the end of
> > > RAM.
> > >
> > > Signed-off-by: Adrian Pop <[email protected]>
> > > ---
> > > arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++
> > > arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
> > > 2 files changed, 83 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> > > index 93c063796780..577a812ca01c 100644
> > > --- a/arch/arm/boot/dts/stm32f746.dtsi
> > > +++ b/arch/arm/boot/dts/stm32f746.dtsi
> > > @@ -48,6 +48,19 @@ / {
> > > #address-cells = <1>;
> > > #size-cells = <1>;
> > >
> > > + reserved-memory {
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + ranges;
> > > +
> > > + linux,dma {
> > > + compatible = "shared-dma-pool";
> > > + linux,dma-default;
> > > + no-map;
> > > + reg = <0xc0f00000 0x100000>;
> > > + };
> > > + };
> > > +
> > Christoph Hellwig was submit a patch for !CONFIG_MMU platforms to support mmap.
> > the patch is : 1fbf57d05302 dma-direct: re-enable mmap for !CONFIG_MMU
> > i thought there is no need to create a reserved-memory for it.
>
> Just tried with his patch, if I don't have the reserved-memory, I get:
>
> [drm] Initialized stm 1.0.0 20170330 for 40016800.display-controller on minor 0
> ------------[ cut here ]------------
> WARNING: CPU: 0 PID: 5 at arch/arm/mm/dma-mapping-nommu.c:50 0xc000b8e9
> CPU: 0 PID: 5 Comm: kworker/0:0 Not tainted 5.8.0-rc1-next-20200616 #4
> Hardware name: STM32 (Device Tree Support)
> Workqueue: events 0xc0150fc1
>
> This is the reason I added the reserved memory in the first place.
>
Oh, sorry, i forget stm32f7 with cache inside. yes, you need a reserve
memory for that case.
but, "reg = <0xc0f00000 0x100000>;" should big enough for framebuffer,
as your know this is
a global reserve memory for all devices, it's might need more for
other devices, like camera etc.
or use per-device reserve memory region.

thanks.
> >
> > > clocks {
> > > clk_hse: clk-hse {
> > > #clock-cells = <0>;
> > > @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> > > };
> > >
> > > soc {
> > > + ltdc: display-controller@40016800 {
> > > + compatible = "st,stm32-ltdc";
> > > + reg = <0x40016800 0x200>;
> > > + interrupts = <88>, <89>;
> > > + resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> > > + clocks = <&rcc 1 CLK_LCD>;
> > > + clock-names = "lcd";
> > > + status = "disabled";
> > > + };
> > > +
> > > + dsi: dsi@40016c00 {
> > > + compatible = "st,stm32-dsi";
> > > + reg = <0x40016c00 0x800>;
> > > + interrupts = <98>;
> > > + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> > > + clock-names = "pclk", "ref";
> > > + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> > > + reset-names = "apb";
> > > + status = "disabled";
> > > + };
> > > +
> > > timer2: timer@40000000 {
> > > compatible = "st,stm32-timer";
> > > reg = <0x40000000 0x400>;
> > > diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
> > > index 1626e00bb2cb..a9e81b49809c 100644
> > > --- a/arch/arm/boot/dts/stm32f769-disco.dts
> > > +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> > > @@ -153,3 +153,52 @@ &usbotg_hs {
> > > pinctrl-names = "default";
> > > status = "okay";
> > > };
> > > +
> > > +&dsi {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > + status = "okay";
> > > +
> > > + ports {
> > > + #address-cells = <1>;
> > > + #size-cells = <0>;
> > > +
> > > + port@0 {
> > > + reg = <0>;
> > > + dsi_in: endpoint {
> > > + remote-endpoint = <&ltdc_out_dsi>;
> > > + };
> > > + };
> > > +
> > > + port@1 {
> > > + reg = <1>;
> > > + dsi_out: endpoint {
> > > + remote-endpoint = <&dsi_in_panel>;
> > > + };
> > > + };
> > > +
> > > + };
> > > +
> > > + panel: panel {
> > > + compatible = "orisetech,otm8009a";
> > > + reg = <0>;
> > > + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> > > + status = "okay";
> > > +
> > > + port {
> > > + dsi_in_panel: endpoint {
> > > + remote-endpoint = <&dsi_out>;
> > > + };
> > > + };
> > > + };
> > > +};
> > > +
> > > +&ltdc {
> > > + status = "okay";
> > > +
> > > + port {
> > > + ltdc_out_dsi: endpoint {
> > > + remote-endpoint = <&dsi_in>;
> > > + };
> > > + };
> > > +};
> > > --
> > > 2.27.0
> > >
> > >
> > > _______________________________________________
> > > linux-arm-kernel mailing list
> > > [email protected]
> > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> Regards,
> Adrian

2020-07-21 09:13:36

by Alexandre Torgue

Subject: Re: [PATCH v2 2/2] ARM: dts: stm32: Enable MIPI DSI display support.

Hi Adrian

On 7/2/20 7:27 PM, Adrian Pop wrote:
> STM32f769-disco features a 4" MIPI DSI display: add support for it.
> On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
> memory pool for DMA with no-cache attribute which is located at the end of
> RAM.
>
> Signed-off-by: Adrian Pop <[email protected]>
> ---
> arch/arm/boot/dts/stm32f746.dtsi | 34 +++++++++++++++++++
> arch/arm/boot/dts/stm32f769-disco.dts | 49 +++++++++++++++++++++++++++
> 2 files changed, 83 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
> index 93c063796780..577a812ca01c 100644
> --- a/arch/arm/boot/dts/stm32f746.dtsi
> +++ b/arch/arm/boot/dts/stm32f746.dtsi
> @@ -48,6 +48,19 @@ / {
> #address-cells = <1>;
> #size-cells = <1>;
>
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + linux,dma {
> + compatible = "shared-dma-pool";
> + linux,dma-default;
> + no-map;
> + reg = <0xc0f00000 0x100000>;
> + };
> + };
> +

Please check Rob's remark (make W=1). Furthermore this node should be
declared in board dts file is should depend on SDRAM size embedded on board.

> clocks {
> clk_hse: clk-hse {
> #clock-cells = <0>;
> @@ -75,6 +88,27 @@ clk_i2s_ckin: clk-i2s-ckin {
> };
>
> soc {
> + ltdc: display-controller@40016800 {
> + compatible = "st,stm32-ltdc";
> + reg = <0x40016800 0x200>;
> + interrupts = <88>, <89>;
> + resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
> + clocks = <&rcc 1 CLK_LCD>;
> + clock-names = "lcd";
> + status = "disabled";
> + };
> +
> + dsi: dsi@40016c00 {
> + compatible = "st,stm32-dsi";
> + reg = <0x40016c00 0x800>;
> + interrupts = <98>;
> + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
> + clock-names = "pclk", "ref";
> + resets = <&rcc STM32F7_APB2_RESET(DSI)>;
> + reset-names = "apb";
> + status = "disabled";
> + };
> +

Nodes are ordered by address in soc dtsi file. Please follow it.

> timer2: timer@40000000 {
> compatible = "st,stm32-timer";
> reg = <0x40000000 0x400>;
> diff --git a/arch/arm/boot/dts/stm32f769-disco.dts b/arch/arm/boot/dts/stm32f769-disco.dts
> index 1626e00bb2cb..a9e81b49809c 100644
> --- a/arch/arm/boot/dts/stm32f769-disco.dts
> +++ b/arch/arm/boot/dts/stm32f769-disco.dts
> @@ -153,3 +153,52 @@ &usbotg_hs {
> pinctrl-names = "default";
> status = "okay";
> };
> +
> +&dsi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi_in: endpoint {
> + remote-endpoint = <&ltdc_out_dsi>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dsi_out: endpoint {
> + remote-endpoint = <&dsi_in_panel>;
> + };
> + };
> +
> + };
> +
> + panel: panel {
> + compatible = "orisetech,otm8009a";
> + reg = <0>;
> + reset-gpios = <&gpioj 15 GPIO_ACTIVE_LOW>;
> + status = "okay";
> +
> + port {
> + dsi_in_panel: endpoint {
> + remote-endpoint = <&dsi_out>;
> + };
> + };
> + };
> +};
> +
> +&ltdc {
> + status = "okay";
> +
> + port {
> + ltdc_out_dsi: endpoint {
> + remote-endpoint = <&dsi_in>;
> + };
> + };
> +};