2019-06-11 08:57:18

by Sameer Pujar

Subject: [PATCH v2 1/2] arm64: tegra: add ACONNECT, ADMA and AGIC nodes

Add DT nodes for following devices on Tegra186 and Tegra194
* ACONNECT
* ADMA
* AGIC

Signed-off-by: Sameer Pujar <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 68 ++++++++++++++++++++++++++++++++
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 68 ++++++++++++++++++++++++++++++++
2 files changed, 136 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 426ac0b..ccd902b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1295,4 +1295,72 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&gic>;
};
+
+ aconnect@2a41000 {
+ compatible = "nvidia,tegra210-aconnect";
+ clocks = <&bpmp TEGRA186_CLK_APE>,
+ <&bpmp TEGRA186_CLK_APB2APE>;
+ clock-names = "ape", "apb2ape";
+ power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x02930000 0x0 0x02930000 0x50000
+ 0x02a41000 0x0 0x02a41000 0x3000>;
+ status = "disabled";
+
+ dma-controller@2930000 {
+ compatible = "nvidia,tegra186-adma";
+ reg = <0x02930000 0x50000>;
+ interrupt-parent = <&agic>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&bpmp TEGRA186_CLK_AHUB>;
+ clock-names = "d_audio";
+ status = "disabled";
+ };
+
+ agic: agic@2a41000 {
+ compatible = "nvidia,tegra210-agic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x02a41000 0x1000>,
+ <0x02a41000 0x2000>;
+ interrupts = <GIC_SPI 145
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&bpmp TEGRA186_CLK_APE>;
+ clock-names = "clk";
+ status = "disabled";
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index c77ca21..bcc06b6 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1054,4 +1054,72 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&gic>;
};
+
+ aconnect@2a41000 {
+ compatible = "nvidia,tegra210-aconnect";
+ clocks = <&bpmp TEGRA194_CLK_APE>,
+ <&bpmp TEGRA194_CLK_APB2APE>;
+ clock-names = "ape", "apb2ape";
+ power-domains = <&bpmp TEGRA194_POWER_DOMAIN_AUD>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x02930000 0x0 0x02930000 0x50000
+ 0x02a41000 0x0 0x02a41000 0x3000>;
+ status = "disabled";
+
+ dma-controller@2930000 {
+ compatible = "nvidia,tegra186-adma";
+ reg = <0x02930000 0x50000>;
+ interrupt-parent = <&agic>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&bpmp TEGRA194_CLK_AHUB>;
+ clock-names = "d_audio";
+ status = "disabled";
+ };
+
+ agic: agic@2a41000 {
+ compatible = "nvidia,tegra210-agic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x02a41000 0x1000>,
+ <0x02a41000 0x2000>;
+ interrupts = <GIC_SPI 145
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&bpmp TEGRA194_CLK_APE>;
+ clock-names = "clk";
+ status = "disabled";
+ };
+ };
};
--
2.7.4

2019-06-11 08:57:31

by Sameer Pujar

Subject: [PATCH v2 2/2] arm64: tegra: enable ACONNECT, ADMA and AGIC

Enable ACONNECT, ADMA and AGIC devices for following platforms
* Jetson TX2
* Jetson Xavier

Verified driver probe path and devices get registered fine.

Signed-off-by: Sameer Pujar <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 12 ++++++++++++
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 12 ++++++++++++
2 files changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index 5102de1..b818355 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -298,4 +298,16 @@
vin-supply = <&vdd_5v0_sys>;
};
};
+
+ aconnect@2a41000 {
+ status = "okay";
+
+ dma-controller@2930000 {
+ status = "okay";
+ };
+
+ agic@2a41000 {
+ status = "okay";
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index 6e6df65..d1cc028 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -167,4 +167,16 @@
};
};
};
+
+ aconnect@2a41000 {
+ status = "okay";
+
+ dma-controller@2930000 {
+ status = "okay";
+ };
+
+ agic@2a41000 {
+ status = "okay";
+ };
+ };
};
--
2.7.4

2019-06-12 17:26:37

by Jon Hunter

Subject: Re: [PATCH v2 1/2] arm64: tegra: add ACONNECT, ADMA and AGIC nodes

On 11/06/2019 09:56, Sameer Pujar wrote:
> Add DT nodes for following devices on Tegra186 and Tegra194
> * ACONNECT
> * ADMA
> * AGIC
>
> Signed-off-by: Sameer Pujar <[email protected]>
> ---
> arch/arm64/boot/dts/nvidia/tegra186.dtsi | 68 ++++++++++++++++++++++++++++++++
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 68 ++++++++++++++++++++++++++++++++
> 2 files changed, 136 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index 426ac0b..ccd902b 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -1295,4 +1295,72 @@
> (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> interrupt-parent = <&gic>;
> };
> +
> + aconnect@2a41000 {
> + compatible = "nvidia,tegra210-aconnect";
> + clocks = <&bpmp TEGRA186_CLK_APE>,
> + <&bpmp TEGRA186_CLK_APB2APE>;
> + clock-names = "ape", "apb2ape";
> + power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x02930000 0x0 0x02930000 0x50000
> + 0x02a41000 0x0 0x02a41000 0x3000>;

We only need one address range here that covers the entire APE.

> + status = "disabled";
> +
> + dma-controller@2930000 {
> + compatible = "nvidia,tegra186-adma";
> + reg = <0x02930000 0x50000>;
> + interrupt-parent = <&agic>;
> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + clocks = <&bpmp TEGRA186_CLK_AHUB>;
> + clock-names = "d_audio";
> + status = "disabled";
> + };
> +
> + agic: agic@2a41000 {
> + compatible = "nvidia,tegra210-agic";
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + reg = <0x02a41000 0x1000>,
> + <0x02a41000 0x2000>;

These addresses should not overlap.

Cheers
Jon

--
nvpublic

2019-06-12 17:27:10

by Jon Hunter

Subject: Re: [PATCH v2 2/2] arm64: tegra: enable ACONNECT, ADMA and AGIC

On 11/06/2019 09:56, Sameer Pujar wrote:
> Enable ACONNECT, ADMA and AGIC devices for following platforms
> * Jetson TX2
> * Jetson Xavier
>
> Verified driver probe path and devices get registered fine.
>
> Signed-off-by: Sameer Pujar <[email protected]>
> ---
> arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 12 ++++++++++++
> arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 12 ++++++++++++
> 2 files changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
> index 5102de1..b818355 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
> @@ -298,4 +298,16 @@
> vin-supply = <&vdd_5v0_sys>;
> };
> };
> +
> + aconnect@2a41000 {
> + status = "okay";
> +
> + dma-controller@2930000 {
> + status = "okay";
> + };
> +
> + agic@2a41000 {
> + status = "okay";
> + };
> + };
> };
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> index 6e6df65..d1cc028 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
> @@ -167,4 +167,16 @@
> };
> };
> };
> +
> + aconnect@2a41000 {
> + status = "okay";
> +
> + dma-controller@2930000 {
> + status = "okay";
> + };
> +
> + agic@2a41000 {
> + status = "okay";
> + };
> + };
> };
>

I believe that I have already ACK'ed this, so please include for the
next revision.

Acked-by: Jon Hunter <[email protected]>

Cheers
Jon

--
nvpublic

2019-06-12 17:34:59

by Sameer Pujar

Subject: Re: [PATCH v2 2/2] arm64: tegra: enable ACONNECT, ADMA and AGIC

On 6/12/2019 6:07 PM, Jon Hunter wrote:
>
> On 11/06/2019 09:56, Sameer Pujar wrote:
>> Enable ACONNECT, ADMA and AGIC devices for following platforms
>> * Jetson TX2
>> * Jetson Xavier
>>
>> Verified driver probe path and devices get registered fine.
>>
>> Signed-off-by: Sameer Pujar <[email protected]>
>> ---
>> arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 12 ++++++++++++
>> arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 12 ++++++++++++
>> 2 files changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
>> index 5102de1..b818355 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
>> +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
>> @@ -298,4 +298,16 @@
>> vin-supply = <&vdd_5v0_sys>;
>> };
>> };
>> +
>> + aconnect@2a41000 {
>> + status = "okay";
>> +
>> + dma-controller@2930000 {
>> + status = "okay";
>> + };
>> +
>> + agic@2a41000 {
>> + status = "okay";
>> + };
>> + };
>> };
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
>> index 6e6df65..d1cc028 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
>> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
>> @@ -167,4 +167,16 @@
>> };
>> };
>> };
>> +
>> + aconnect@2a41000 {
>> + status = "okay";
>> +
>> + dma-controller@2930000 {
>> + status = "okay";
>> + };
>> +
>> + agic@2a41000 {
>> + status = "okay";
>> + };
>> + };
>> };
>>
> I believe that I have already ACK'ed this, so please include for the
> next revision.
There is a small change related to dma node.
Will include ACK in the next revision.
> Acked-by: Jon Hunter <[email protected]>
>
> Cheers
> Jon
>

2019-06-12 17:57:14

by Sameer Pujar

Subject: Re: [PATCH v2 1/2] arm64: tegra: add ACONNECT, ADMA and AGIC nodes

On 6/12/2019 6:06 PM, Jon Hunter wrote:
> On 11/06/2019 09:56, Sameer Pujar wrote:
>> Add DT nodes for following devices on Tegra186 and Tegra194
>> * ACONNECT
>> * ADMA
>> * AGIC
>>
>> Signed-off-by: Sameer Pujar <[email protected]>
>> ---
>> arch/arm64/boot/dts/nvidia/tegra186.dtsi | 68 ++++++++++++++++++++++++++++++++
>> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 68 ++++++++++++++++++++++++++++++++
>> 2 files changed, 136 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
>> index 426ac0b..ccd902b 100644
>> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
>> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
>> @@ -1295,4 +1295,72 @@
>> (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>> interrupt-parent = <&gic>;
>> };
>> +
>> + aconnect@2a41000 {
>> + compatible = "nvidia,tegra210-aconnect";
>> + clocks = <&bpmp TEGRA186_CLK_APE>,
>> + <&bpmp TEGRA186_CLK_APB2APE>;
>> + clock-names = "ape", "apb2ape";
>> + power-domains = <&bpmp TEGRA186_POWER_DOMAIN_AUD>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0x02930000 0x0 0x02930000 0x50000
>> + 0x02a41000 0x0 0x02a41000 0x3000>;
> We only need one address range here that covers the entire APE.
will update.
>
>> + status = "disabled";
>> +
>> + dma-controller@2930000 {
>> + compatible = "nvidia,tegra186-adma";
>> + reg = <0x02930000 0x50000>;
>> + interrupt-parent = <&agic>;
>> + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
>> + #dma-cells = <1>;
>> + clocks = <&bpmp TEGRA186_CLK_AHUB>;
>> + clock-names = "d_audio";
>> + status = "disabled";
>> + };
>> +
>> + agic: agic@2a41000 {
>> + compatible = "nvidia,tegra210-agic";
>> + #interrupt-cells = <3>;
>> + interrupt-controller;
>> + reg = <0x02a41000 0x1000>,
>> + <0x02a41000 0x2000>;
> These addresses should not overlap.
typo! will fix, Thanks.
>
> Cheers
> Jon
>

2019-06-12 17:57:18

by Jon Hunter

Subject: Re: [PATCH v2 2/2] arm64: tegra: enable ACONNECT, ADMA and AGIC

On 12/06/2019 13:44, Sameer Pujar wrote:
>
> On 6/12/2019 6:07 PM, Jon Hunter wrote:
>>
>> On 11/06/2019 09:56, Sameer Pujar wrote:
>>> Enable ACONNECT, ADMA and AGIC devices for following platforms
>>>    * Jetson TX2
>>>    * Jetson Xavier
>>>
>>> Verified driver probe path and devices get registered fine.
>>>
>>> Signed-off-by: Sameer Pujar <[email protected]>
>>> ---
>>>   arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 12 ++++++++++++
>>>   arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 12 ++++++++++++
>>>   2 files changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
>>> b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
>>> index 5102de1..b818355 100644
>>> --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
>>> +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
>>> @@ -298,4 +298,16 @@
>>>               vin-supply = <&vdd_5v0_sys>;
>>>           };
>>>       };
>>> +
>>> +    aconnect@2a41000 {
>>> +        status = "okay";
>>> +
>>> +        dma-controller@2930000 {
>>> +            status = "okay";
>>> +        };
>>> +
>>> +        agic@2a41000 {
>>> +            status = "okay";
>>> +        };
>>> +    };
>>>   };
>>> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
>>> b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
>>> index 6e6df65..d1cc028 100644
>>> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
>>> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
>>> @@ -167,4 +167,16 @@
>>>               };
>>>           };
>>>       };
>>> +
>>> +    aconnect@2a41000 {
>>> +        status = "okay";
>>> +
>>> +        dma-controller@2930000 {
>>> +            status = "okay";
>>> +        };
>>> +
>>> +        agic@2a41000 {
>>> +            status = "okay";
>>> +        };
>>> +    };
>>>   };
>>>
>> I believe that I have already ACK'ed this, so please include for the
>> next revision.
> There is a small change related to dma node.
> Will include ACK in the next revision.

OK. I had assumed there was no change. Ah the 'dma-controller' name!

Usually you should list the changes for each revision under the '---'
beneath the signed-off line so people can see if there are any changes.

Cheers
Jon

--
nvpublic