This patch series plans to add support for running nested Microsoft
Hypervisor. In case of nested Microsoft Hypervisor there are few
privileged hypercalls which need to go L0 Hypervisor instead of L1
Hypervisor. This patches series basically identifies such hypercalls and
replace them with nested hypercalls.
Jinank Jain (5):
x86/hyperv: Add support for detecting nested hypervisor
Drivers: hv: Setup synic registers in case of nested root partition
x86/hyperv: Add an interface to do nested hypercalls
Drivers: hv: Enable vmbus driver for nested root partition
x86/hyperv: Change interrupt vector for nested root partition
arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
arch/x86/include/asm/idtentry.h | 2 +
arch/x86/include/asm/irq_vectors.h | 6 +++
arch/x86/include/asm/mshyperv.h | 68 ++++++++++++++++++++++++++++--
arch/x86/kernel/cpu/mshyperv.c | 22 ++++++++++
arch/x86/kernel/idt.c | 9 ++++
drivers/hv/hv.c | 18 +++++---
drivers/hv/hv_common.c | 7 ++-
drivers/hv/vmbus_drv.c | 5 ++-
include/asm-generic/hyperv-tlfs.h | 1 +
10 files changed, 141 insertions(+), 14 deletions(-)
--
2.25.1
According to TLFS, in order to communicate to L0 hypervisor there needs
to be an additional bit set in the control register. This communication
is required to perform priviledged instructions which can only be
performed by L0 hypervisor. An example of that could be setting up the
VMBus infrastructure.
Signed-off-by: Jinank Jain <[email protected]>
---
arch/x86/include/asm/hyperv-tlfs.h | 3 ++-
arch/x86/include/asm/mshyperv.h | 42 +++++++++++++++++++++++++++---
include/asm-generic/hyperv-tlfs.h | 1 +
3 files changed, 41 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h
index 0319091e2019..fd066226f12b 100644
--- a/arch/x86/include/asm/hyperv-tlfs.h
+++ b/arch/x86/include/asm/hyperv-tlfs.h
@@ -380,7 +380,8 @@ struct hv_nested_enlightenments_control {
__u32 reserved:31;
} features;
struct {
- __u32 reserved;
+ __u32 inter_partition_comm:1;
+ __u32 reserved:31;
} hypercallControls;
} __packed;
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index b0f16d06a0c5..32f6bed68e88 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -76,10 +76,16 @@ static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
return hv_status;
}
+/* Hypercall to the L0 hypervisor */
+static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
+{
+ return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
+}
+
/* Fast hypercall with 8 bytes of input and no output */
-static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
+static inline u64 _hv_do_fast_hypercall8(u64 control, u16 code, u64 input1)
{
- u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
+ u64 hv_status;
#ifdef CONFIG_X86_64
{
@@ -107,10 +113,24 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
return hv_status;
}
+static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
+{
+ u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
+
+ return _hv_do_fast_hypercall8(control, code, input1);
+}
+
+static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
+{
+ u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
+
+ return _hv_do_fast_hypercall8(control, code, input1);
+}
+
/* Fast hypercall with 16 bytes of input */
-static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
+static inline u64 _hv_do_fast_hypercall16(u64 control, u16 code, u64 input1, u64 input2)
{
- u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
+ u64 hv_status;
#ifdef CONFIG_X86_64
{
@@ -141,6 +161,20 @@ static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
return hv_status;
}
+static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
+{
+ u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
+
+ return _hv_do_fast_hypercall16(control, code, input1, input2);
+}
+
+static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
+{
+ u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
+
+ return _hv_do_fast_hypercall16(control, code, input1, input2);
+}
+
extern struct hv_vp_assist_page **hv_vp_assist_page;
static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hyperv-tlfs.h
index fdce7a4cfc6f..3840958201cd 100644
--- a/include/asm-generic/hyperv-tlfs.h
+++ b/include/asm-generic/hyperv-tlfs.h
@@ -185,6 +185,7 @@ enum HV_GENERIC_SET_FORMAT {
#define HV_HYPERCALL_VARHEAD_OFFSET 17
#define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17)
#define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27)
+#define HV_HYPERCALL_NESTED BIT_ULL(31)
#define HV_HYPERCALL_REP_COMP_OFFSET 32
#define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32)
#define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
--
2.25.1
On Thu, Nov 03, 2022 at 01:04:02PM +0000, Jinank Jain wrote:
> ...
Please stop spamming people with patches every day:
From: Documentation/process/submitting-patches.rst
Don't get discouraged - or impatient
------------------------------------
After you have submitted your change, be patient and wait. Reviewers are
busy people and may not get to your patch right away.
Once upon a time, patches used to disappear into the void without comment,
but the development process works more smoothly than that now. You should
receive comments within a week or so; if that does not happen, make sure
that you have sent your patches to the right place. Wait for a minimum of
^^^^^^^^^^^^^^^^^^^^^
one week before resubmitting or pinging reviewers - possibly longer during
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
busy times like merge windows.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
On Thu, Nov 03, 2022 at 01:04:02PM +0000, Jinank Jain wrote:
> This patch series plans to add support for running nested Microsoft
> Hypervisor. In case of nested Microsoft Hypervisor there are few
> privileged hypercalls which need to go L0 Hypervisor instead of L1
> Hypervisor. This patches series basically identifies such hypercalls and
> replace them with nested hypercalls.
In the future, please include a changelog in your cover letter
explaining what changed in each version of the series.
Anirudh.
>
> Jinank Jain (5):
> x86/hyperv: Add support for detecting nested hypervisor
> Drivers: hv: Setup synic registers in case of nested root partition
> x86/hyperv: Add an interface to do nested hypercalls
> Drivers: hv: Enable vmbus driver for nested root partition
> x86/hyperv: Change interrupt vector for nested root partition
>
> arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
> arch/x86/include/asm/idtentry.h | 2 +
> arch/x86/include/asm/irq_vectors.h | 6 +++
> arch/x86/include/asm/mshyperv.h | 68 ++++++++++++++++++++++++++++--
> arch/x86/kernel/cpu/mshyperv.c | 22 ++++++++++
> arch/x86/kernel/idt.c | 9 ++++
> drivers/hv/hv.c | 18 +++++---
> drivers/hv/hv_common.c | 7 ++-
> drivers/hv/vmbus_drv.c | 5 ++-
> include/asm-generic/hyperv-tlfs.h | 1 +
> 10 files changed, 141 insertions(+), 14 deletions(-)
>
> --
> 2.25.1
On Thu, Nov 03, 2022 at 01:04:05PM +0000, Jinank Jain wrote:
> According to TLFS, in order to communicate to L0 hypervisor there needs
> to be an additional bit set in the control register. This communication
> is required to perform priviledged instructions which can only be
> performed by L0 hypervisor. An example of that could be setting up the
> VMBus infrastructure.
>
> Signed-off-by: Jinank Jain <[email protected]>
> ---
> arch/x86/include/asm/hyperv-tlfs.h | 3 ++-
> arch/x86/include/asm/mshyperv.h | 42 +++++++++++++++++++++++++++---
> include/asm-generic/hyperv-tlfs.h | 1 +
> 3 files changed, 41 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h
> index 0319091e2019..fd066226f12b 100644
> --- a/arch/x86/include/asm/hyperv-tlfs.h
> +++ b/arch/x86/include/asm/hyperv-tlfs.h
> @@ -380,7 +380,8 @@ struct hv_nested_enlightenments_control {
> __u32 reserved:31;
> } features;
> struct {
> - __u32 reserved;
> + __u32 inter_partition_comm:1;
> + __u32 reserved:31;
> } hypercallControls;
> } __packed;
>
> diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
> index b0f16d06a0c5..32f6bed68e88 100644
> --- a/arch/x86/include/asm/mshyperv.h
> +++ b/arch/x86/include/asm/mshyperv.h
> @@ -76,10 +76,16 @@ static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
> return hv_status;
> }
>
> +/* Hypercall to the L0 hypervisor */
> +static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
> +{
> + return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
> +}
> +
> /* Fast hypercall with 8 bytes of input and no output */
> -static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
> +static inline u64 _hv_do_fast_hypercall8(u64 control, u16 code, u64 input1)
> {
> - u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
> + u64 hv_status;
>
> #ifdef CONFIG_X86_64
> {
> @@ -107,10 +113,24 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
> return hv_status;
> }
>
> +static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
> +{
> + u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
> +
> + return _hv_do_fast_hypercall8(control, code, input1);
> +}
> +
> +static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
> +{
> + u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
> +
> + return _hv_do_fast_hypercall8(control, code, input1);
> +}
> +
> /* Fast hypercall with 16 bytes of input */
> -static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
> +static inline u64 _hv_do_fast_hypercall16(u64 control, u16 code, u64 input1, u64 input2)
> {
> - u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
> + u64 hv_status;
>
> #ifdef CONFIG_X86_64
> {
> @@ -141,6 +161,20 @@ static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
> return hv_status;
> }
>
> +static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
> +{
> + u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;
> +
> + return _hv_do_fast_hypercall16(control, code, input1, input2);
> +}
> +
> +static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
> +{
> + u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;
> +
> + return _hv_do_fast_hypercall16(control, code, input1, input2);
> +}
> +
> extern struct hv_vp_assist_page **hv_vp_assist_page;
>
> static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
> diff --git a/include/asm-generic/hyperv-tlfs.h b/include/asm-generic/hyperv-tlfs.h
> index fdce7a4cfc6f..3840958201cd 100644
> --- a/include/asm-generic/hyperv-tlfs.h
> +++ b/include/asm-generic/hyperv-tlfs.h
> @@ -185,6 +185,7 @@ enum HV_GENERIC_SET_FORMAT {
> #define HV_HYPERCALL_VARHEAD_OFFSET 17
> #define HV_HYPERCALL_VARHEAD_MASK GENMASK_ULL(26, 17)
> #define HV_HYPERCALL_RSVD0_MASK GENMASK_ULL(31, 27)
> +#define HV_HYPERCALL_NESTED BIT_ULL(31)
> #define HV_HYPERCALL_REP_COMP_OFFSET 32
> #define HV_HYPERCALL_REP_COMP_1 BIT_ULL(32)
> #define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
> --
> 2.25.1
Reviewed-by: <[email protected]>
On Thu, Nov 03, 2022 at 01:04:02PM +0000, Jinank Jain wrote:
> This patch series plans to add support for running nested Microsoft
> Hypervisor. In case of nested Microsoft Hypervisor there are few
> privileged hypercalls which need to go L0 Hypervisor instead of L1
> Hypervisor. This patches series basically identifies such hypercalls and
> replace them with nested hypercalls.
>
> Jinank Jain (5):
> x86/hyperv: Add support for detecting nested hypervisor
I see `__weak hv_nested` in this patch.
I guess this version has fixed ARM64 build?
> Drivers: hv: Setup synic registers in case of nested root partition
> x86/hyperv: Add an interface to do nested hypercalls
> Drivers: hv: Enable vmbus driver for nested root partition
> x86/hyperv: Change interrupt vector for nested root partition
>
> arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
> arch/x86/include/asm/idtentry.h | 2 +
> arch/x86/include/asm/irq_vectors.h | 6 +++
> arch/x86/include/asm/mshyperv.h | 68 ++++++++++++++++++++++++++++--
> arch/x86/kernel/cpu/mshyperv.c | 22 ++++++++++
> arch/x86/kernel/idt.c | 9 ++++
> drivers/hv/hv.c | 18 +++++---
> drivers/hv/hv_common.c | 7 ++-
> drivers/hv/vmbus_drv.c | 5 ++-
> include/asm-generic/hyperv-tlfs.h | 1 +
> 10 files changed, 141 insertions(+), 14 deletions(-)
>
> --
> 2.25.1
>
On 11/16/2022 5:42 PM, Wei Liu wrote:
> On Thu, Nov 03, 2022 at 01:04:02PM +0000, Jinank Jain wrote:
>> This patch series plans to add support for running nested Microsoft
>> Hypervisor. In case of nested Microsoft Hypervisor there are few
>> privileged hypercalls which need to go L0 Hypervisor instead of L1
>> Hypervisor. This patches series basically identifies such hypercalls and
>> replace them with nested hypercalls.
>>
>> Jinank Jain (5):
>> x86/hyperv: Add support for detecting nested hypervisor
> I see `__weak hv_nested` in this patch.
>
> I guess this version has fixed ARM64 build?
It is fixed in v4 of the patch series.
Regards,
Jinank
>
>> Drivers: hv: Setup synic registers in case of nested root partition
>> x86/hyperv: Add an interface to do nested hypercalls
>> Drivers: hv: Enable vmbus driver for nested root partition
>> x86/hyperv: Change interrupt vector for nested root partition
>>
>> arch/x86/include/asm/hyperv-tlfs.h | 17 +++++++-
>> arch/x86/include/asm/idtentry.h | 2 +
>> arch/x86/include/asm/irq_vectors.h | 6 +++
>> arch/x86/include/asm/mshyperv.h | 68 ++++++++++++++++++++++++++++--
>> arch/x86/kernel/cpu/mshyperv.c | 22 ++++++++++
>> arch/x86/kernel/idt.c | 9 ++++
>> drivers/hv/hv.c | 18 +++++---
>> drivers/hv/hv_common.c | 7 ++-
>> drivers/hv/vmbus_drv.c | 5 ++-
>> include/asm-generic/hyperv-tlfs.h | 1 +
>> 10 files changed, 141 insertions(+), 14 deletions(-)
>>
>> --
>> 2.25.1
>>