Hi,
My IBM Thinkpad 600E changes between 100MHz and 400MHz depending if the
power is on. This means gettimeofday goes backwards if you boot with the
power out (tsc calibrated at 100MHz) and then plug the power in. (tsc is now
spinning at 4x speed, so offsets within the HZ timer period are 4x out!).
The answer is to boot with the notsc option, however since the
CONFIG_X86_TSC option is enabled for CONFIG_M686, we cannot do this. Saving
one indirect function call for do_gettimeofset is not enough of a reason for
CONFIG_X86_TSC. Should we trash this option?
Even so, we should really catch these cpus at run time.
Anton
--- linux/arch/i386/config.in Wed Jan 10 12:19:57 2001
+++ linux_intel/arch/i386/config.in Fri Mar 9 07:59:39 2001
@@ -80,7 +80,6 @@
fi
if [ "$CONFIG_M686" = "y" ]; then
define_int CONFIG_X86_L1_CACHE_SHIFT 5
- define_bool CONFIG_X86_TSC y
define_bool CONFIG_X86_GOOD_APIC y
define_bool CONFIG_X86_PGE y
define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
# cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 6
model name : Mobile Pentium II
stepping : 10
cache size : 256 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr
bogomips : 104.44
> My IBM Thinkpad 600E changes between 100MHz and 400MHz depending if the
> power is on. This means gettimeofday goes backwards if you boot with the
Intel speedstep CPU.
> Even so, we should really catch these cpus at run time.
Intel are being remarkably reluctant on the documentation front. We have
the AMD speed change docs, but the intel ones (chipset not cpu based
primarily) don't seem to be publically available. In fact the 815M manual
looks like someone quite pointedly went through and removed the relevant
material before publication
Alan Cox <[email protected]> writes:
> > My IBM Thinkpad 600E changes between 100MHz and 400MHz depending if the
> > power is on. This means gettimeofday goes backwards if you boot with the
>
> Intel speedstep CPU.
The 600E's CPU doesn't actually use SpeedStep (it's only a 400MHz
Mobile Pentium2, SpeedStep made its debut with the 600MHz Mobile
Pentium3), but rather some kind of external speed throttling... which
accomplishes basically the same thing, and makes one wonder why Intel
had to go and trademark the idea of incorporating it into the CPU.
Toshiba laptops and probably others have been doing the same thing for
ages now, I once had a Tecra (now sadly deceased) that would throttle
from 133MHz to 66MHz (I think) when unplugged.
I think this behaviour can be controlled with tpctl for the Thinkpads
and possibly with the Toshiba utils on Toshibas...
--
David Huggins-Daines - [email protected]
http://www.pobox.com/~dhd/
> The 600E's CPU doesn't actually use SpeedStep (it's only a 400MHz
> Mobile Pentium2, SpeedStep made its debut with the 600MHz Mobile
> Pentium3), but rather some kind of external speed throttling... which
> accomplishes basically the same thing, and makes one wonder why Intel
> had to go and trademark the idea of incorporating it into the CPU.
Its external on the 'speedstep' mostly. Take a look at what little docs
there are and you can see the mobile PIII chipset does it
> I think this behaviour can be controlled with tpctl for the Thinkpads
> and possibly with the Toshiba utils on Toshibas...
If tpctl can do it and we know how it does it then that may be sufficient since
the kernel init code can use DMI to find the 600E, tpctl copied code to go
to high speed, bogomip it and then drop back.
On Sat, Mar 10, 2001 at 01:19:03AM +0000, Alan Cox wrote:
> > My IBM Thinkpad 600E changes between 100MHz and 400MHz depending if the
> > power is on. This means gettimeofday goes backwards if you boot with the
> Intel speedstep CPU.
>
> > Even so, we should really catch these cpus at run time.
> Intel are being remarkably reluctant on the documentation front. We have
> the AMD speed change docs, but the intel ones (chipset not cpu based
> primarily) don't seem to be publically available. In fact the 815M manual
> looks like someone quite pointedly went through and removed the relevant
> material before publication
Isn't that one of the things that the ACPI is for ?
Aren't we supposed to use ACPI for this ?
/Matti Aarnio
> > Intel are being remarkably reluctant on the documentation front. We have
> > the AMD speed change docs, but the intel ones (chipset not cpu based
> > primarily) don't seem to be publically available. In fact the 815M manual
> > looks like someone quite pointedly went through and removed the relevant
> > material before publication
>
> Isn't that one of the things that the ACPI is for ?
> Aren't we supposed to use ACPI for this ?
If you want to trust a large in kernel interpreter of binary only interpreter
code from a BIOS vendor be my guest. Im also not sure ACPI will give us the
notifications we need, even in the cases where it actually works.
Alan
> Intel are being remarkably reluctant on the documentation front. We have
> the AMD speed change docs, but the intel ones (chipset not cpu based
> primarily) don't seem to be publically available. In fact the 815M manual
> looks like someone quite pointedly went through and removed the relevant
> material before publication
But is there a reason we don't allow the notsc option at all on
certain chipsets? Who would complain if I removed the CONFIG_X86_TSC
option from the CONFIG_M686 definition or even got rid of it completely?
Anton
> But is there a reason we don't allow the notsc option at all on
> certain chipsets? Who would complain if I removed the CONFIG_X86_TSC
> option from the CONFIG_M686 definition or even got rid of it completely?
I believe someone had performance reasons. I'm sceptical and I'd tend to agree
with your view. Bug Ingo see what he says
>>>>> "Alan" == Alan Cox <[email protected]> writes:
>> I think this behaviour can be controlled with tpctl for the
>> Thinkpads and possibly with the Toshiba utils on Toshibas...
Alan> If tpctl can do it and we know how it does it then that may be
Alan> sufficient since the kernel init code can use DMI to find the
Alan> 600E, tpctl copied code to go to high speed, bogomip it and then
Alan> drop back.
Well I can confirm that tpctl allows you to disable it and run the cpu
at 400MHz all the time, thats what I did for my 600E.
Jes