Changes in v1:
- add some more ddp component
- add mt8192 mmsys support
- add ovl mount on support
- add 2 more clock into mutex device
- fix ovl smi_id_en and fb null software bug
- fix ddp compoent size config bug
- add mt8192 drm support
- add ddp bypass shadow register function
- add 8192 dts description
Yongqiang Niu (21):
drm/mediatek: add component OVL_2L2
drm/mediatek: add component POSTMASK
drm/mediatek: add component RDMA4
mtk-mmsys: add mt8192 mmsys support
mtk-mmsys: add ovl mout on support
drm/mediatek: add disp config and mm 26mhz clock into mutex device
drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
drm/mediatek: check if fb is null
drm/mediatek: fix aal size config
drm/mediatek: fix dither size config
drm/mediatek: fix gamma size config
drm/mediatek: fix ccorr size config
drm/mediatek: add support for mediatek SOC MT8192
drm/mediatek: add bypass shadow register function call for ddp
component
drm/mediatek: add color bypass shadow register function
drm/mediatek: add ovl bypass shadow register function
drm/mediatek: add rdma bypass shadow register function
drm/mediatek: add dither bypass shadow register function
drm/mediatek: add aal bypass shadow register function
drm/mediatek: add ccorr bypass shadow register function
arm64: dts: mt8192: add display node
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 126 +++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_disp_color.c | 22 ++++
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 41 ++++++-
drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 27 +++++
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 3 +
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 84 +++++++++++--
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 80 +++++++++++-
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 8 ++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 48 ++++++++
drivers/soc/mediatek/mmsys/Makefile | 1 +
drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 182 ++++++++++++++++++++++++++++
drivers/soc/mediatek/mtk-mmsys.c | 8 ++
include/linux/soc/mediatek/mtk-mmsys.h | 6 +
13 files changed, 623 insertions(+), 13 deletions(-)
create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c
--
1.8.1.1.dirty
there are 2 more clock need enable for display.
parser these clock when mutex device probe,
enable and disable when mutex on/off
Signed-off-by: Yongqiang Niu <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 49 ++++++++++++++++++++++++++++------
1 file changed, 41 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 60788c1..de618a1 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -118,7 +118,7 @@ struct mtk_ddp_data {
struct mtk_ddp {
struct device *dev;
- struct clk *clk;
+ struct clk *clk[3];
void __iomem *regs;
struct mtk_disp_mutex mutex[10];
const struct mtk_ddp_data *data;
@@ -257,14 +257,39 @@ int mtk_disp_mutex_prepare(struct mtk_disp_mutex *mutex)
{
struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
mutex[mutex->id]);
- return clk_prepare_enable(ddp->clk);
+ int ret;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
+ if (IS_ERR(ddp->clk[i]))
+ continue;
+ ret = clk_prepare_enable(ddp->clk[i]);
+ if (ret) {
+ pr_err("failed to enable clock, err %d. i:%d\n",
+ ret, i);
+ goto err;
+ }
+ }
+
+ return 0;
+
+err:
+ while (--i >= 0)
+ clk_disable_unprepare(ddp->clk[i]);
+ return ret;
}
void mtk_disp_mutex_unprepare(struct mtk_disp_mutex *mutex)
{
struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
mutex[mutex->id]);
- clk_disable_unprepare(ddp->clk);
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
+ if (IS_ERR(ddp->clk[i]))
+ continue;
+ clk_disable_unprepare(ddp->clk[i]);
+ }
}
void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
@@ -415,11 +440,19 @@ static int mtk_ddp_probe(struct platform_device *pdev)
ddp->data = of_device_get_match_data(dev);
if (!ddp->data->no_clk) {
- ddp->clk = devm_clk_get(dev, NULL);
- if (IS_ERR(ddp->clk)) {
- if (PTR_ERR(ddp->clk) != -EPROBE_DEFER)
- dev_err(dev, "Failed to get clock\n");
- return PTR_ERR(ddp->clk);
+ int ret;
+
+ for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
+ ddp->clk[i] = of_clk_get(dev->of_node, i);
+
+ if (IS_ERR(ddp->clk[i])) {
+ ret = PTR_ERR(ddp->clk[i]);
+ if (ret != EPROBE_DEFER)
+ dev_err(dev, "Failed to get clock %d\n",
+ ret);
+
+ return ret;
+ }
}
}
--
1.8.1.1.dirty
On 20/08/2020 08:03, Yongqiang Niu wrote:
> Changes in v1:
> - add some more ddp component
> - add mt8192 mmsys support
> - add ovl mount on support
> - add 2 more clock into mutex device
> - fix ovl smi_id_en and fb null software bug
> - fix ddp compoent size config bug
> - add mt8192 drm support
> - add ddp bypass shadow register function
> - add 8192 dts description
>
> Yongqiang Niu (21):
> drm/mediatek: add component OVL_2L2
> drm/mediatek: add component POSTMASK
> drm/mediatek: add component RDMA4
> mtk-mmsys: add mt8192 mmsys support
> mtk-mmsys: add ovl mout on support
> drm/mediatek: add disp config and mm 26mhz clock into mutex device
> drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
> drm/mediatek: check if fb is null
> drm/mediatek: fix aal size config
> drm/mediatek: fix dither size config
> drm/mediatek: fix gamma size config
> drm/mediatek: fix ccorr size config
> drm/mediatek: add support for mediatek SOC MT8192
> drm/mediatek: add bypass shadow register function call for ddp
> component
> drm/mediatek: add color bypass shadow register function
> drm/mediatek: add ovl bypass shadow register function
> drm/mediatek: add rdma bypass shadow register function
> drm/mediatek: add dither bypass shadow register function
> drm/mediatek: add aal bypass shadow register function
> drm/mediatek: add ccorr bypass shadow register function
> arm64: dts: mt8192: add display node
>
At least regarding mmsys and dtsi patches, these are not based on upstream.
Please rebase.
Regards,
Matthias
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 126 +++++++++++++++++++
> drivers/gpu/drm/mediatek/mtk_disp_color.c | 22 ++++
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 41 ++++++-
> drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 27 +++++
> drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 3 +
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 84 +++++++++++--
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 80 +++++++++++-
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 8 ++
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 48 ++++++++
> drivers/soc/mediatek/mmsys/Makefile | 1 +
> drivers/soc/mediatek/mmsys/mt8192-mmsys.c | 182 ++++++++++++++++++++++++++++
> drivers/soc/mediatek/mtk-mmsys.c | 8 ++
> include/linux/soc/mediatek/mtk-mmsys.h | 6 +
> 13 files changed, 623 insertions(+), 13 deletions(-)
> create mode 100644 drivers/soc/mediatek/mmsys/mt8192-mmsys.c
>
Hi, Yongqiang:
Yongqiang Niu <[email protected]> 於 2020年8月20日 週四 下午2:06寫道：
>
> there are 2 more clock need enable for display.
> parser these clock when mutex device probe,
> enable and disable when mutex on/off
>
> Signed-off-by: Yongqiang Niu <[email protected]>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 49 ++++++++++++++++++++++++++++------
> 1 file changed, 41 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index 60788c1..de618a1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -118,7 +118,7 @@ struct mtk_ddp_data {
>
> struct mtk_ddp {
> struct device *dev;
> - struct clk *clk;
> + struct clk *clk[3];
> void __iomem *regs;
> struct mtk_disp_mutex mutex[10];
> const struct mtk_ddp_data *data;
> @@ -257,14 +257,39 @@ int mtk_disp_mutex_prepare(struct mtk_disp_mutex *mutex)
> {
> struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
> mutex[mutex->id]);
> - return clk_prepare_enable(ddp->clk);
> + int ret;
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
> + if (IS_ERR(ddp->clk[i]))
> + continue;
> + ret = clk_prepare_enable(ddp->clk[i]);
> + if (ret) {
> + pr_err("failed to enable clock, err %d. i:%d\n",
> + ret, i);
> + goto err;
> + }
> + }
> +
> + return 0;
> +
> +err:
> + while (--i >= 0)
> + clk_disable_unprepare(ddp->clk[i]);
> + return ret;
> }
>
> void mtk_disp_mutex_unprepare(struct mtk_disp_mutex *mutex)
> {
> struct mtk_ddp *ddp = container_of(mutex, struct mtk_ddp,
> mutex[mutex->id]);
> - clk_disable_unprepare(ddp->clk);
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
> + if (IS_ERR(ddp->clk[i]))
> + continue;
> + clk_disable_unprepare(ddp->clk[i]);
> + }
> }
>
> void mtk_disp_mutex_add_comp(struct mtk_disp_mutex *mutex,
> @@ -415,11 +440,19 @@ static int mtk_ddp_probe(struct platform_device *pdev)
> ddp->data = of_device_get_match_data(dev);
>
> if (!ddp->data->no_clk) {
> - ddp->clk = devm_clk_get(dev, NULL);
> - if (IS_ERR(ddp->clk)) {
> - if (PTR_ERR(ddp->clk) != -EPROBE_DEFER)
> - dev_err(dev, "Failed to get clock\n");
> - return PTR_ERR(ddp->clk);
> + int ret;
> +
> + for (i = 0; i < ARRAY_SIZE(ddp->clk); i++) {
Modify binding document for this.
Regards,
Chun-Kuang.
> + ddp->clk[i] = of_clk_get(dev->of_node, i);
> +
> + if (IS_ERR(ddp->clk[i])) {
> + ret = PTR_ERR(ddp->clk[i]);
> + if (ret != EPROBE_DEFER)
> + dev_err(dev, "Failed to get clock %d\n",
> + ret);
> +
> + return ret;
> + }
> }
> }
>
> --
> 1.8.1.1.dirty
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