Convert the mmsys bindings to the YAML format.
Signed-off-by: Fabien Parent <[email protected]>
---
.../bindings/arm/mediatek/mediatek,mmsys.txt | 31 ----------
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 57 +++++++++++++++++++
2 files changed, 57 insertions(+), 31 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
deleted file mode 100644
index 78c50733985c..000000000000
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-Mediatek mmsys controller
-============================
-
-The Mediatek mmsys system controller provides clock control, routing control,
-and miscellaneous control in mmsys partition.
-
-Required Properties:
-
-- compatible: Should be one of:
- - "mediatek,mt2701-mmsys", "syscon"
- - "mediatek,mt2712-mmsys", "syscon"
- - "mediatek,mt6765-mmsys", "syscon"
- - "mediatek,mt6779-mmsys", "syscon"
- - "mediatek,mt6797-mmsys", "syscon"
- - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon"
- - "mediatek,mt8167-mmsys", "syscon"
- - "mediatek,mt8173-mmsys", "syscon"
- - "mediatek,mt8183-mmsys", "syscon"
-- #clock-cells: Must be 1
-
-For the clock control, the mmsys controller uses the common clk binding from
-Documentation/devicetree/bindings/clock/clock-bindings.txt
-The available clocks are defined in dt-bindings/clock/mt*-clk.h.
-
-Example:
-
-mmsys: syscon@14000000 {
- compatible = "mediatek,mt8173-mmsys", "syscon";
- reg = <0 0x14000000 0 0x1000>;
- #clock-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
new file mode 100644
index 000000000000..a419da33e10b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: MediaTek mmsys controller
+
+maintainers:
+ - Matthias Brugger <[email protected]>
+
+description:
+ The MediaTek mmsys system controller provides clock control, routing control,
+ and miscellaneous control in mmsys partition.
+
+properties:
+ $nodename:
+ pattern: "^syscon@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - mediatek,mt2701-mmsys
+ - mediatek,mt2712-mmsys
+ - mediatek,mt6765-mmsys
+ - mediatek,mt6779-mmsys
+ - mediatek,mt6797-mmsys
+ - mediatek,mt8167-mmsys
+ - mediatek,mt8173-mmsys
+ - mediatek,mt8183-mmsys
+ - const: syscon
+ - items:
+ - const: mediatek,mt7623-mmsys
+ - const: mediatek,mt2701-mmsys
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ "#clock-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ mmsys: syscon@14000000 {
+ compatible = "mediatek,mt8173-mmsys", "syscon";
+ reg = <0x14000000 0x1000>;
+ #clock-cells = <1>;
+ };
--
2.31.1
Add the MMSYS binding documentation for the MT8365 SoC.
Signed-off-by: Fabien Parent <[email protected]>
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index a419da33e10b..2d4ff0ce387b 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -29,6 +29,7 @@ properties:
- mediatek,mt8167-mmsys
- mediatek,mt8173-mmsys
- mediatek,mt8183-mmsys
+ - mediatek,mt8365-mmsys
- const: syscon
- items:
- const: mediatek,mt7623-mmsys
--
2.31.1
Add DSI mmsys connections for the MT8365 SoC.
Signed-off-by: Fabien Parent <[email protected]>
---
drivers/soc/mediatek/mt8365-mmsys.h | 60 +++++++++++++++++++++++++++++
drivers/soc/mediatek/mtk-mmsys.c | 11 ++++++
2 files changed, 71 insertions(+)
create mode 100644 drivers/soc/mediatek/mt8365-mmsys.h
diff --git a/drivers/soc/mediatek/mt8365-mmsys.h b/drivers/soc/mediatek/mt8365-mmsys.h
new file mode 100644
index 000000000000..2475aeb79791
--- /dev/null
+++ b/drivers/soc/mediatek/mt8365-mmsys.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __SOC_MEDIATEK_MT8365_MMSYS_H
+#define __SOC_MEDIATEK_MT8365_MMSYS_H
+
+#define MT8365_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0xf3c
+#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL 0xf4c
+#define MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN 0xf50
+#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SEL_IN 0xf54
+#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN 0xf60
+#define MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0xf64
+#define MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN 0xf68
+
+#define MT8365_RDMA0_SOUT_COLOR0 0x1
+#define MT8365_DITHER_MOUT_EN_DSI0 0x1
+#define MT8365_DSI0_SEL_IN_DITHER 0x1
+#define MT8365_RDMA0_SEL_IN_OVL0 0x0
+#define MT8365_RDMA0_RSZ0_SEL_IN_RDMA0 0x0
+#define MT8365_DISP_COLOR_SEL_IN_COLOR0 0x0
+#define MT8365_OVL0_MOUT_PATH0_SEL BIT(0)
+
+static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = {
+ {
+ DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
+ MT8365_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN,
+ MT8365_OVL0_MOUT_PATH0_SEL
+ },
+ {
+ DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
+ MT8365_DISP_REG_CONFIG_DISP_RDMA0_SEL_IN,
+ MT8365_RDMA0_SEL_IN_OVL0
+ },
+ {
+ DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
+ MT8365_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL,
+ MT8365_RDMA0_SOUT_COLOR0
+ },
+ {
+ DDP_COMPONENT_COLOR0, DDP_COMPONENT_CCORR,
+ MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN,
+ MT8365_DISP_COLOR_SEL_IN_COLOR0
+ },
+ {
+ DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+ MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN,
+ MT8365_DITHER_MOUT_EN_DSI0
+ },
+ {
+ DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
+ MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN,
+ MT8365_DSI0_SEL_IN_DITHER
+ },
+ {
+ DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
+ MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN,
+ MT8365_RDMA0_RSZ0_SEL_IN_RDMA0
+ },
+};
+
+#endif /* __SOC_MEDIATEK_MT8365_MMSYS_H */
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index 080660ef11bf..44aff822d035 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -13,6 +13,7 @@
#include "mtk-mmsys.h"
#include "mt8167-mmsys.h"
#include "mt8183-mmsys.h"
+#include "mt8365-mmsys.h"
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
.clk_driver = "clk-mt2701-mm",
@@ -52,6 +53,12 @@ static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
.num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
};
+static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
+ .clk_driver = "clk-mt8365-mm",
+ .routes = mt8365_mmsys_routing_table,
+ .num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table),
+};
+
struct mtk_mmsys {
void __iomem *regs;
const struct mtk_mmsys_driver_data *data;
@@ -157,6 +164,10 @@ static const struct of_device_id of_match_mtk_mmsys[] = {
.compatible = "mediatek,mt8183-mmsys",
.data = &mt8183_mmsys_driver_data,
},
+ {
+ .compatible = "mediatek,mt8365-mmsys",
+ .data = &mt8365_mmsys_driver_data,
+ },
{ }
};
--
2.31.1
On Wed, 19 May 2021 18:18:44 +0200, Fabien Parent wrote:
> Convert the mmsys bindings to the YAML format.
>
> Signed-off-by: Fabien Parent <[email protected]>
> ---
> .../bindings/arm/mediatek/mediatek,mmsys.txt | 31 ----------
> .../bindings/arm/mediatek/mediatek,mmsys.yaml | 57 +++++++++++++++++++
> 2 files changed, 57 insertions(+), 31 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
> create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
>
Applied, thanks!
On Wed, 19 May 2021 18:18:45 +0200, Fabien Parent wrote:
> Add the MMSYS binding documentation for the MT8365 SoC.
>
> Signed-off-by: Fabien Parent <[email protected]>
> ---
> .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <[email protected]>
On Thu, May 20, 2021 at 8:48 PM Rob Herring <[email protected]> wrote:
>
> On Wed, 19 May 2021 18:18:44 +0200, Fabien Parent wrote:
> > Convert the mmsys bindings to the YAML format.
> >
> > Signed-off-by: Fabien Parent <[email protected]>
> > ---
> > .../bindings/arm/mediatek/mediatek,mmsys.txt | 31 ----------
> > .../bindings/arm/mediatek/mediatek,mmsys.yaml | 57 +++++++++++++++++++
> > 2 files changed, 57 insertions(+), 31 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
> > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> >
>
> Applied, thanks!
Actually, should go with patch 3. So dropped and:
Reviewed-by: Rob Herring <[email protected]>
Hi Rob,
Missatge de Rob Herring <[email protected]> del dia dv., 21 de maig
2021 a les 3:51:
>
> On Thu, May 20, 2021 at 8:48 PM Rob Herring <[email protected]> wrote:
> >
> > On Wed, 19 May 2021 18:18:44 +0200, Fabien Parent wrote:
> > > Convert the mmsys bindings to the YAML format.
> > >
> > > Signed-off-by: Fabien Parent <[email protected]>
> > > ---
> > > .../bindings/arm/mediatek/mediatek,mmsys.txt | 31 ----------
> > > .../bindings/arm/mediatek/mediatek,mmsys.yaml | 57 +++++++++++++++++++
> > > 2 files changed, 57 insertions(+), 31 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
> > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> > >
> >
> > Applied, thanks!
>
> Actually, should go with patch 3. So dropped and:
>
I think that this patch can be applied alone through your tree, patch
2 and 3 can be applied later for the maintainers when they are fine.
There are other patches in the ML that depend on having this meged, so
it would be really nice to have it. Although it has already your
ack/review if it help I also took a look and I know the hardware so:
Reviewed-by: Enric Balletbo i Serra <[email protected]>
Thanks,
Enric
> Reviewed-by: Rob Herring <[email protected]>
>
> _______________________________________________
> Linux-mediatek mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Fri, Jul 23, 2021 at 3:45 AM Enric Balletbo Serra
<[email protected]> wrote:
>
> Hi Rob,
>
> Missatge de Rob Herring <[email protected]> del dia dv., 21 de maig
> 2021 a les 3:51:
> >
> > On Thu, May 20, 2021 at 8:48 PM Rob Herring <[email protected]> wrote:
> > >
> > > On Wed, 19 May 2021 18:18:44 +0200, Fabien Parent wrote:
> > > > Convert the mmsys bindings to the YAML format.
> > > >
> > > > Signed-off-by: Fabien Parent <[email protected]>
> > > > ---
> > > > .../bindings/arm/mediatek/mediatek,mmsys.txt | 31 ----------
> > > > .../bindings/arm/mediatek/mediatek,mmsys.yaml | 57 +++++++++++++++++++
> > > > 2 files changed, 57 insertions(+), 31 deletions(-)
> > > > delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
> > > > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> > > >
> > >
> > > Applied, thanks!
> >
> > Actually, should go with patch 3. So dropped and:
> >
>
> I think that this patch can be applied alone through your tree, patch
> 2 and 3 can be applied later for the maintainers when they are fine.
> There are other patches in the ML that depend on having this meged, so
> it would be really nice to have it. Although it has already your
> ack/review if it help I also took a look and I know the hardware so:
>
> Reviewed-by: Enric Balletbo i Serra <[email protected]>
Okay, patch 1 and 2 applied.
Rob
Hi Fabien,
On 19/05/2021 18:18, Fabien Parent wrote:
> Add DSI mmsys connections for the MT8365 SoC.
>
> Signed-off-by: Fabien Parent <[email protected]>
> ---
> drivers/soc/mediatek/mt8365-mmsys.h | 60 +++++++++++++++++++++++++++++
> drivers/soc/mediatek/mtk-mmsys.c | 11 ++++++
> 2 files changed, 71 insertions(+)
> create mode 100644 drivers/soc/mediatek/mt8365-mmsys.h
>
> diff --git a/drivers/soc/mediatek/mt8365-mmsys.h b/drivers/soc/mediatek/mt8365-mmsys.h
> new file mode 100644
> index 000000000000..2475aeb79791
> --- /dev/null
> +++ b/drivers/soc/mediatek/mt8365-mmsys.h
> @@ -0,0 +1,60 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __SOC_MEDIATEK_MT8365_MMSYS_H
> +#define __SOC_MEDIATEK_MT8365_MMSYS_H
> +
> +#define MT8365_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN 0xf3c
> +#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL 0xf4c
> +#define MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN 0xf50
> +#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SEL_IN 0xf54
> +#define MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN 0xf60
> +#define MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN 0xf64
> +#define MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN 0xf68
> +
> +#define MT8365_RDMA0_SOUT_COLOR0 0x1
> +#define MT8365_DITHER_MOUT_EN_DSI0 0x1
> +#define MT8365_DSI0_SEL_IN_DITHER 0x1
> +#define MT8365_RDMA0_SEL_IN_OVL0 0x0
> +#define MT8365_RDMA0_RSZ0_SEL_IN_RDMA0 0x0
> +#define MT8365_DISP_COLOR_SEL_IN_COLOR0 0x0
> +#define MT8365_OVL0_MOUT_PATH0_SEL BIT(0)
> +
> +static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = {
> + {
> + DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
> + MT8365_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN,
> + MT8365_OVL0_MOUT_PATH0_SEL
I pushed this patch to v4.15-next/soc
As we now include the mask field in mtk_mmsys_routes I updated that in the patch.
Please let me know if I screwed something up.
Regards,
Matthias
> + },
> + {
> + DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
> + MT8365_DISP_REG_CONFIG_DISP_RDMA0_SEL_IN,
> + MT8365_RDMA0_SEL_IN_OVL0
> + },
> + {
> + DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
> + MT8365_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL,
> + MT8365_RDMA0_SOUT_COLOR0
> + },
> + {
> + DDP_COMPONENT_COLOR0, DDP_COMPONENT_CCORR,
> + MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN,
> + MT8365_DISP_COLOR_SEL_IN_COLOR0
> + },
> + {
> + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> + MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN,
> + MT8365_DITHER_MOUT_EN_DSI0
> + },
> + {
> + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> + MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN,
> + MT8365_DSI0_SEL_IN_DITHER
> + },
> + {
> + DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
> + MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN,
> + MT8365_RDMA0_RSZ0_SEL_IN_RDMA0
> + },
> +};
> +
> +#endif /* __SOC_MEDIATEK_MT8365_MMSYS_H */
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
> index 080660ef11bf..44aff822d035 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -13,6 +13,7 @@
> #include "mtk-mmsys.h"
> #include "mt8167-mmsys.h"
> #include "mt8183-mmsys.h"
> +#include "mt8365-mmsys.h"
>
> static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
> .clk_driver = "clk-mt2701-mm",
> @@ -52,6 +53,12 @@ static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
> .num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
> };
>
> +static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
> + .clk_driver = "clk-mt8365-mm",
> + .routes = mt8365_mmsys_routing_table,
> + .num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table),
> +};
> +
> struct mtk_mmsys {
> void __iomem *regs;
> const struct mtk_mmsys_driver_data *data;
> @@ -157,6 +164,10 @@ static const struct of_device_id of_match_mtk_mmsys[] = {
> .compatible = "mediatek,mt8183-mmsys",
> .data = &mt8183_mmsys_driver_data,
> },
> + {
> + .compatible = "mediatek,mt8365-mmsys",
> + .data = &mt8365_mmsys_driver_data,
> + },
> { }
> };
>
>