Add GSC support for XeHP SDV and DG2 platforms.
The series includes changes for the mei driver:
- add ability to use polling instead of interrupts
- add ability to use extended timeouts
- setup extended operational memory for GSC
The series includes changes for the i915 driver:
- allocate extended operational memory for GSC
- GSC on XeHP SDV offsets and definitions
- GSC on DG2 offsets and definitions
The first six patches of the series are copied from the
already reviewed series [1] to provide series that
can be built in CI.
This series will be rebased and merged only after
series [1] merge.
Greg KH, please review and ACK the MEI patches.
We are pushing these patches through gfx tree as
the auxiliary device belongs there.
[1] https://patchwork.freedesktop.org/series/102160/
Alexander Usyskin (7):
mei: gsc: setup char driver alive in spite of firmware handshake
failure
mei: gsc: retrieve the firmware version
drm/i915/gsc: add slow_fw flag to the mei auxiliary device
drm/i915/gsc: add slow_fw flag to the gsc device definition
drm/i915/gsc: add GSC XeHP SDV platform definition
mei: gsc: wait for reset thread on stop
mei: extend timeouts on slow devices.
Daniele Ceraolo Spurio (1):
HAX: drm/i915: force INTEL_MEI_GSC on for CI
Tomas Winkler (9):
drm/i915/gsc: add gsc as a mei auxiliary device
mei: add support for graphics system controller (gsc) devices
mei: gsc: add runtime pm handlers
mei: gsc: use polling instead of interrupts
drm/i915/dg2: add gsc with special gsc bar offsets
mei: mkhi: add memory ready command
mei: gsc: setup gsc extended operational memory
mei: debugfs: add pxp mode to devstate in debugfs
drm/i915/gsc: allocate extended operational memory in LMEM
Vitaly Lubart (3):
drm/i915/gsc: skip irq initialization if using polling
mei: bus: export common mkhi definitions into a separate header
mei: gsc: add transition to PXP mode in resume flow
MAINTAINERS | 1 +
drivers/gpu/drm/i915/Kconfig | 1 +
drivers/gpu/drm/i915/Kconfig.debug | 1 +
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/gt/intel_gsc.c | 323 +++++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_gsc.h | 40 +++
drivers/gpu/drm/i915/gt/intel_gt.c | 3 +
drivers/gpu/drm/i915/gt/intel_gt.h | 5 +
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 13 +
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 2 +
drivers/gpu/drm/i915/i915_drv.h | 8 +
drivers/gpu/drm/i915/i915_pci.c | 4 +-
drivers/gpu/drm/i915/i915_reg.h | 4 +
drivers/gpu/drm/i915/intel_device_info.h | 2 +
drivers/misc/mei/Kconfig | 14 +
drivers/misc/mei/Makefile | 3 +
drivers/misc/mei/bus-fixup.c | 128 ++++++---
drivers/misc/mei/client.c | 14 +-
drivers/misc/mei/debugfs.c | 17 ++
drivers/misc/mei/gsc-me.c | 316 ++++++++++++++++++++++
drivers/misc/mei/hbm.c | 12 +-
drivers/misc/mei/hw-me-regs.h | 7 +
drivers/misc/mei/hw-me.c | 145 ++++++++--
drivers/misc/mei/hw-me.h | 16 +-
drivers/misc/mei/hw-txe.c | 2 +-
drivers/misc/mei/hw.h | 5 +
drivers/misc/mei/init.c | 21 +-
drivers/misc/mei/main.c | 2 +-
drivers/misc/mei/mei_dev.h | 26 ++
drivers/misc/mei/mkhi.h | 57 ++++
drivers/misc/mei/pci-me.c | 2 +-
include/linux/mei_aux.h | 21 ++
33 files changed, 1146 insertions(+), 73 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gt/intel_gsc.c
create mode 100644 drivers/gpu/drm/i915/gt/intel_gsc.h
create mode 100644 drivers/misc/mei/gsc-me.c
create mode 100644 drivers/misc/mei/mkhi.h
create mode 100644 include/linux/mei_aux.h
--
2.32.0
Setup char device in spite of firmware handshake failure.
In order to provide host access to the firmware status registers and other
information required for the manufacturing process.
Signed-off-by: Alexander Usyskin <[email protected]>
Signed-off-by: Tomas Winkler <[email protected]>
Reviewed-by: Daniele Ceraolo Spurio <[email protected]>
---
drivers/misc/mei/gsc-me.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c
index 64b02adf3149..58e39c00f150 100644
--- a/drivers/misc/mei/gsc-me.c
+++ b/drivers/misc/mei/gsc-me.c
@@ -79,11 +79,12 @@ static int mei_gsc_probe(struct auxiliary_device *aux_dev,
pm_runtime_set_active(device);
pm_runtime_enable(device);
- if (mei_start(dev)) {
- dev_err(device, "init hw failure.\n");
- ret = -ENODEV;
- goto irq_err;
- }
+ /* Continue to char device setup in spite of firmware handshake failure.
+ * In order to provide access to the firmware status registers to the user
+ * space via sysfs.
+ */
+ if (mei_start(dev))
+ dev_warn(device, "init hw failure.\n");
pm_runtime_set_autosuspend_delay(device, MEI_GSC_RPM_TIMEOUT);
pm_runtime_use_autosuspend(device);
@@ -97,7 +98,6 @@ static int mei_gsc_probe(struct auxiliary_device *aux_dev,
register_err:
mei_stop(dev);
-irq_err:
devm_free_irq(device, hw->irq, dev);
err:
--
2.32.0
From: Tomas Winkler <[email protected]>
Add GSC memory ready command.
The command indicates to the firmware that
extend operation memory was setup and
the firmware may enter PXP mode.
CC: Daniele Ceraolo Spurio <[email protected]>
Signed-off-by: Tomas Winkler <[email protected]>
---
drivers/misc/mei/mkhi.h | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/mei/mkhi.h b/drivers/misc/mei/mkhi.h
index 27a9b476904e..ea9fe487cb0f 100644
--- a/drivers/misc/mei/mkhi.h
+++ b/drivers/misc/mei/mkhi.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * Copyright (c) 2003-2020, Intel Corporation. All rights reserved.
+ * Copyright (c) 2003-2021, Intel Corporation. All rights reserved.
* Intel Management Engine Interface (Intel MEI) Linux driver
*/
@@ -18,6 +18,13 @@
#define MCHI_GROUP_ID 0xA
+#define MKHI_GROUP_ID_GFX 0x30
+#define MKHI_GFX_RESET_WARN_CMD_REQ 0x0
+#define MKHI_GFX_MEMORY_READY_CMD_REQ 0x1
+
+/* Allow transition to PXP mode without approval */
+#define MKHI_GFX_MEM_READY_PXP_ALLOWED 0x1
+
struct mkhi_rule_id {
__le16 rule_type;
u8 feature_id;
@@ -42,4 +49,9 @@ struct mkhi_msg {
u8 data[];
} __packed;
+struct mkhi_gfx_mem_ready {
+ struct mkhi_msg_hdr hdr;
+ uint32_t flags;
+} __packed;
+
#endif /* _MEI_MKHI_H_ */
--
2.32.0
Add slow_fw flag to the gsc device definition
and pass it to mei auxiliary device.
Signed-off-by: Alexander Usyskin <[email protected]>
---
drivers/gpu/drm/i915/gt/intel_gsc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c
index 280dba4fd32d..175571c6f71d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -41,6 +41,7 @@ struct gsc_def {
unsigned long bar;
size_t bar_size;
bool use_polling;
+ bool slow_fw;
};
/* gsc resources and definitions (HECI1 and HECI2) */
@@ -125,6 +126,7 @@ static void gsc_init_one(struct drm_i915_private *i915,
adev->bar.end = adev->bar.start + def->bar_size - 1;
adev->bar.flags = IORESOURCE_MEM;
adev->bar.desc = IORES_DESC_NONE;
+ adev->slow_fw = def->slow_fw;
aux_dev = &adev->aux_dev;
aux_dev->name = def->name;
--
2.32.0
From: Vitaly Lubart <[email protected]>
Exported common mkhi definitions from bus-fixup.c into a separate
header file mkhi.h for other driver usage.
Signed-off-by: Vitaly Lubart <[email protected]>
Signed-off-by: Tomas Winkler <[email protected]>
---
drivers/misc/mei/bus-fixup.c | 32 ++-----------------------
drivers/misc/mei/mkhi.h | 45 ++++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+), 30 deletions(-)
create mode 100644 drivers/misc/mei/mkhi.h
diff --git a/drivers/misc/mei/bus-fixup.c b/drivers/misc/mei/bus-fixup.c
index 24e91a9ea558..190691abddc9 100644
--- a/drivers/misc/mei/bus-fixup.c
+++ b/drivers/misc/mei/bus-fixup.c
@@ -15,6 +15,7 @@
#include "mei_dev.h"
#include "client.h"
+#include "mkhi.h"
#define MEI_UUID_NFC_INFO UUID_LE(0xd2de1625, 0x382d, 0x417d, \
0x48, 0xa4, 0xef, 0xab, 0xba, 0x8a, 0x12, 0x06)
@@ -80,6 +81,7 @@ static void whitelist(struct mei_cl_device *cldev)
}
#define OSTYPE_LINUX 2
+
struct mei_os_ver {
__le16 build;
__le16 reserved1;
@@ -89,20 +91,6 @@ struct mei_os_ver {
u8 reserved2;
} __packed;
-#define MKHI_FEATURE_PTT 0x10
-
-struct mkhi_rule_id {
- __le16 rule_type;
- u8 feature_id;
- u8 reserved;
-} __packed;
-
-struct mkhi_fwcaps {
- struct mkhi_rule_id id;
- u8 len;
- u8 data[];
-} __packed;
-
struct mkhi_fw_ver_block {
u16 minor;
u8 major;
@@ -115,22 +103,6 @@ struct mkhi_fw_ver {
struct mkhi_fw_ver_block ver[MEI_MAX_FW_VER_BLOCKS];
} __packed;
-#define MKHI_FWCAPS_GROUP_ID 0x3
-#define MKHI_FWCAPS_SET_OS_VER_APP_RULE_CMD 6
-#define MKHI_GEN_GROUP_ID 0xFF
-#define MKHI_GEN_GET_FW_VERSION_CMD 0x2
-struct mkhi_msg_hdr {
- u8 group_id;
- u8 command;
- u8 reserved;
- u8 result;
-} __packed;
-
-struct mkhi_msg {
- struct mkhi_msg_hdr hdr;
- u8 data[];
-} __packed;
-
#define MKHI_OSVER_BUF_LEN (sizeof(struct mkhi_msg_hdr) + \
sizeof(struct mkhi_fwcaps) + \
sizeof(struct mei_os_ver))
diff --git a/drivers/misc/mei/mkhi.h b/drivers/misc/mei/mkhi.h
new file mode 100644
index 000000000000..27a9b476904e
--- /dev/null
+++ b/drivers/misc/mei/mkhi.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2003-2020, Intel Corporation. All rights reserved.
+ * Intel Management Engine Interface (Intel MEI) Linux driver
+ */
+
+#ifndef _MEI_MKHI_H_
+#define _MEI_MKHI_H_
+
+#include "mei_dev.h"
+
+#define MKHI_FEATURE_PTT 0x10
+
+#define MKHI_FWCAPS_GROUP_ID 0x3
+#define MKHI_FWCAPS_SET_OS_VER_APP_RULE_CMD 6
+#define MKHI_GEN_GROUP_ID 0xFF
+#define MKHI_GEN_GET_FW_VERSION_CMD 0x2
+
+#define MCHI_GROUP_ID 0xA
+
+struct mkhi_rule_id {
+ __le16 rule_type;
+ u8 feature_id;
+ u8 reserved;
+} __packed;
+
+struct mkhi_fwcaps {
+ struct mkhi_rule_id id;
+ u8 len;
+ u8 data[];
+} __packed;
+
+struct mkhi_msg_hdr {
+ u8 group_id;
+ u8 command;
+ u8 reserved;
+ u8 result;
+} __packed;
+
+struct mkhi_msg {
+ struct mkhi_msg_hdr hdr;
+ u8 data[];
+} __packed;
+
+#endif /* _MEI_MKHI_H_ */
--
2.32.0
From: Tomas Winkler <[email protected]>
DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).
Signed-off-by: Alexander Usyskin <[email protected]>
Signed-off-by: Tomas Winkler <[email protected]>
---
drivers/gpu/drm/i915/gt/intel_gsc.c | 15 +++++++++++++++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 2 ++
3 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c
index ffe6716590f0..bfc307e49bf9 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -69,6 +69,19 @@ static const struct gsc_def gsc_def_xehpsdv[] = {
}
};
+static const struct gsc_def gsc_def_dg2[] = {
+ {
+ .name = "mei-gsc",
+ .bar = DG2_GSC_HECI1_BASE,
+ .bar_size = GSC_BAR_LENGTH,
+ },
+ {
+ .name = "mei-gscfi",
+ .bar = DG2_GSC_HECI2_BASE,
+ .bar_size = GSC_BAR_LENGTH,
+ }
+};
+
static void gsc_release_dev(struct device *dev)
{
struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
@@ -109,6 +122,8 @@ static void gsc_init_one(struct drm_i915_private *i915,
def = &gsc_def_dg1[intf_id];
} else if (IS_XEHPSDV(i915)) {
def = &gsc_def_xehpsdv[intf_id];
+ } else if (IS_DG2(i915)) {
+ def = &gsc_def_dg2[intf_id];
} else {
drm_warn_once(&i915->drm, "Unknown platform\n");
return;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 06e6dad0d7f7..cb6dcc3f48f4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1051,6 +1051,7 @@ static const struct intel_device_info xehpsdv_info = {
.has_4tile = 1, \
.has_64k_pages = 1, \
.has_guc_deprivilege = 1, \
+ .has_heci_pxp = 1, \
.needs_compact_pt = 1, \
.platform_engine_mask = \
BIT(RCS0) | BIT(BCS0) | \
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1dd7b7de6002..efcfe32cd8eb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -978,6 +978,8 @@
#define BLT_RING_BASE 0x22000
#define DG1_GSC_HECI1_BASE 0x00258000
#define DG1_GSC_HECI2_BASE 0x00259000
+#define DG2_GSC_HECI1_BASE 0x00373000
+#define DG2_GSC_HECI2_BASE 0x00374000
--
2.32.0
On 4/7/2022 5:58 AM, Alexander Usyskin wrote:
> Add slow_fw flag to the gsc device definition
> and pass it to mei auxiliary device.
>
> Signed-off-by: Alexander Usyskin <[email protected]>
Reviewed-by: Daniele Ceraolo Spurio <[email protected]>
Daniele
> ---
> drivers/gpu/drm/i915/gt/intel_gsc.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c
> index 280dba4fd32d..175571c6f71d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gsc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
> @@ -41,6 +41,7 @@ struct gsc_def {
> unsigned long bar;
> size_t bar_size;
> bool use_polling;
> + bool slow_fw;
> };
>
> /* gsc resources and definitions (HECI1 and HECI2) */
> @@ -125,6 +126,7 @@ static void gsc_init_one(struct drm_i915_private *i915,
> adev->bar.end = adev->bar.start + def->bar_size - 1;
> adev->bar.flags = IORESOURCE_MEM;
> adev->bar.desc = IORES_DESC_NONE;
> + adev->slow_fw = def->slow_fw;
>
> aux_dev = &adev->aux_dev;
> aux_dev->name = def->name;
On 4/7/2022 5:58 AM, Alexander Usyskin wrote:
> From: Tomas Winkler <[email protected]>
>
> DG2 uses different GSC offsets on memory bar
> and uses PXP head (HECI1).
>
> Signed-off-by: Alexander Usyskin <[email protected]>
> Signed-off-by: Tomas Winkler <[email protected]>
Reviewed-by: Daniele Ceraolo Spurio <[email protected]>
Daniele
> ---
> drivers/gpu/drm/i915/gt/intel_gsc.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> 3 files changed, 18 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c
> index ffe6716590f0..bfc307e49bf9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gsc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
> @@ -69,6 +69,19 @@ static const struct gsc_def gsc_def_xehpsdv[] = {
> }
> };
>
> +static const struct gsc_def gsc_def_dg2[] = {
> + {
> + .name = "mei-gsc",
> + .bar = DG2_GSC_HECI1_BASE,
> + .bar_size = GSC_BAR_LENGTH,
> + },
> + {
> + .name = "mei-gscfi",
> + .bar = DG2_GSC_HECI2_BASE,
> + .bar_size = GSC_BAR_LENGTH,
> + }
> +};
> +
> static void gsc_release_dev(struct device *dev)
> {
> struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
> @@ -109,6 +122,8 @@ static void gsc_init_one(struct drm_i915_private *i915,
> def = &gsc_def_dg1[intf_id];
> } else if (IS_XEHPSDV(i915)) {
> def = &gsc_def_xehpsdv[intf_id];
> + } else if (IS_DG2(i915)) {
> + def = &gsc_def_dg2[intf_id];
> } else {
> drm_warn_once(&i915->drm, "Unknown platform\n");
> return;
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 06e6dad0d7f7..cb6dcc3f48f4 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1051,6 +1051,7 @@ static const struct intel_device_info xehpsdv_info = {
> .has_4tile = 1, \
> .has_64k_pages = 1, \
> .has_guc_deprivilege = 1, \
> + .has_heci_pxp = 1, \
> .needs_compact_pt = 1, \
> .platform_engine_mask = \
> BIT(RCS0) | BIT(BCS0) | \
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1dd7b7de6002..efcfe32cd8eb 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -978,6 +978,8 @@
> #define BLT_RING_BASE 0x22000
> #define DG1_GSC_HECI1_BASE 0x00258000
> #define DG1_GSC_HECI2_BASE 0x00259000
> +#define DG2_GSC_HECI1_BASE 0x00373000
> +#define DG2_GSC_HECI2_BASE 0x00374000
>
>
>