Hi Joerg,
This series includes several fixes and cleanups after delegating
DMA domain to generic iommu. Please review and consider them for
linux-next.
Best regards,
Baolu
Lu Baolu (5):
iommu/vt-d: Don't return error when device gets right domain
iommu/vt-d: Set domain type for a private domain
iommu/vt-d: Don't enable iommu's which have been ignored
iommu/vt-d: Fix suspicious RCU usage in probe_acpi_namespace_devices()
iommu/vt-d: Consolidate domain_init() to avoid duplication
Sai Praneeth Prakhya (1):
iommu/vt-d: Cleanup after delegating DMA domain to generic iommu
drivers/iommu/intel-iommu.c | 210 +++++++++---------------------------
1 file changed, 53 insertions(+), 157 deletions(-)
--
2.17.1
From: Sai Praneeth Prakhya <[email protected]>
[No functional changes]
1. Starting with commit df4f3c603aeb ("iommu/vt-d: Remove static identity
map code") there are no callers for iommu_prepare_rmrr_dev() but the
implementation of the function still exists, so remove it. Also, as a
ripple effect remove get_domain_for_dev() and iommu_prepare_identity_map()
because they aren't being used either.
2. init_dmars() runs the same loop (for_each_active_iommu(iommu, drhd))
over different functions back to back. So, remove the duplicate loop to
make it a single for_each_active_iommu().
3. Cleanup few double spaces.
Cc: Joerg Roedel <[email protected]>
Cc: Ashok Raj <[email protected]>
Cc: Lu Baolu <[email protected]>
Cc: Sohil Mehta <[email protected]>
Cc: Jacob Pan <[email protected]>
Signed-off-by: Sai Praneeth Prakhya <[email protected]>
---
drivers/iommu/intel-iommu.c | 68 ++++---------------------------------
1 file changed, 6 insertions(+), 62 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d1cd7e449161..d60cf0fd9500 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -909,7 +909,6 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain,
return pte;
}
-
/* return address's pte at specific level */
static struct dma_pte *dma_pfn_level_pte(struct dmar_domain *domain,
unsigned long pfn,
@@ -1578,7 +1577,6 @@ static void iommu_disable_translation(struct intel_iommu *iommu)
raw_spin_unlock_irqrestore(&iommu->register_lock, flag);
}
-
static int iommu_init_domains(struct intel_iommu *iommu)
{
u32 ndomains, nlongs;
@@ -1616,8 +1614,6 @@ static int iommu_init_domains(struct intel_iommu *iommu)
return -ENOMEM;
}
-
-
/*
* If Caching mode is set, then invalid translations are tagged
* with domain-id 0, hence we need to pre-allocate it. We also
@@ -2649,29 +2645,6 @@ static struct dmar_domain *set_domain_for_dev(struct device *dev,
return domain;
}
-static struct dmar_domain *get_domain_for_dev(struct device *dev, int gaw)
-{
- struct dmar_domain *domain, *tmp;
-
- domain = find_domain(dev);
- if (domain)
- goto out;
-
- domain = find_or_alloc_domain(dev, gaw);
- if (!domain)
- goto out;
-
- tmp = set_domain_for_dev(dev, domain);
- if (!tmp || domain != tmp) {
- domain_exit(domain);
- domain = tmp;
- }
-
-out:
-
- return domain;
-}
-
static int iommu_domain_identity_map(struct dmar_domain *domain,
unsigned long long start,
unsigned long long end)
@@ -2736,33 +2709,6 @@ static int domain_prepare_identity_map(struct device *dev,
return iommu_domain_identity_map(domain, start, end);
}
-static int iommu_prepare_identity_map(struct device *dev,
- unsigned long long start,
- unsigned long long end)
-{
- struct dmar_domain *domain;
- int ret;
-
- domain = get_domain_for_dev(dev, DEFAULT_DOMAIN_ADDRESS_WIDTH);
- if (!domain)
- return -ENOMEM;
-
- ret = domain_prepare_identity_map(dev, domain, start, end);
- if (ret)
- domain_exit(domain);
-
- return ret;
-}
-
-static inline int iommu_prepare_rmrr_dev(struct dmar_rmrr_unit *rmrr,
- struct device *dev)
-{
- if (dev->archdata.iommu == DUMMY_DEVICE_DOMAIN_INFO)
- return 0;
- return iommu_prepare_identity_map(dev, rmrr->base_address,
- rmrr->end_address);
-}
-
static int md_domain_init(struct dmar_domain *domain, int guest_width);
static int __init si_domain_init(int hw)
@@ -3306,14 +3252,13 @@ static int __init init_dmars(void)
if (pasid_supported(iommu))
intel_svm_init(iommu);
#endif
- }
- /*
- * Now that qi is enabled on all iommus, set the root entry and flush
- * caches. This is required on some Intel X58 chipsets, otherwise the
- * flush_context function will loop forever and the boot hangs.
- */
- for_each_active_iommu(iommu, drhd) {
+ /*
+ * Now that qi is enabled on all iommus, set the root entry and
+ * flush caches. This is required on some Intel X58 chipsets,
+ * otherwise the flush_context function will loop forever and
+ * the boot hangs.
+ */
iommu_flush_write_buffer(iommu);
iommu_set_root_entry(iommu);
iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
@@ -4058,7 +4003,6 @@ static void __init init_iommu_pm_ops(void)
static inline void init_iommu_pm_ops(void) {}
#endif /* CONFIG_PM */
-
int __init dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg)
{
struct acpi_dmar_reserved_memory *rmrr;
--
2.17.1
The drhd and device scope list should be iterated with the
iommu global lock held. Otherwise, a suspicious RCU usage
message will be displayed.
[ 3.695886] =============================
[ 3.695917] WARNING: suspicious RCU usage
[ 3.695950] 5.2.0-rc2+ #2467 Not tainted
[ 3.695981] -----------------------------
[ 3.696014] drivers/iommu/intel-iommu.c:4569 suspicious rcu_dereference_check() usage!
[ 3.696069]
other info that might help us debug this:
[ 3.696126]
rcu_scheduler_active = 2, debug_locks = 1
[ 3.696173] no locks held by swapper/0/1.
[ 3.696204]
stack backtrace:
[ 3.696241] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.2.0-rc2+ #2467
[ 3.696370] Call Trace:
[ 3.696404] dump_stack+0x85/0xcb
[ 3.696441] intel_iommu_init+0x128c/0x13ce
[ 3.696478] ? kmem_cache_free+0x16b/0x2c0
[ 3.696516] ? __fput+0x14b/0x270
[ 3.696550] ? __call_rcu+0xb7/0x300
[ 3.696583] ? get_max_files+0x10/0x10
[ 3.696631] ? set_debug_rodata+0x11/0x11
[ 3.696668] ? e820__memblock_setup+0x60/0x60
[ 3.696704] ? pci_iommu_init+0x16/0x3f
[ 3.696737] ? set_debug_rodata+0x11/0x11
[ 3.696770] pci_iommu_init+0x16/0x3f
[ 3.696805] do_one_initcall+0x5d/0x2e4
[ 3.696844] ? set_debug_rodata+0x11/0x11
[ 3.696880] ? rcu_read_lock_sched_held+0x6b/0x80
[ 3.696924] kernel_init_freeable+0x1f0/0x27c
[ 3.696961] ? rest_init+0x260/0x260
[ 3.696997] kernel_init+0xa/0x110
[ 3.697028] ret_from_fork+0x3a/0x50
Fixes: fa212a97f3a36 ("iommu/vt-d: Probe DMA-capable ACPI name space devices")
Signed-off-by: Lu Baolu <[email protected]>
---
drivers/iommu/intel-iommu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 5251533a18a4..d1cd7e449161 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -4793,8 +4793,10 @@ int __init intel_iommu_init(void)
cpuhp_setup_state(CPUHP_IOMMU_INTEL_DEAD, "iommu/intel:dead", NULL,
intel_iommu_cpu_dead);
+ down_read(&dmar_global_lock);
if (probe_acpi_namespace_devices())
pr_warn("ACPI name space devices didn't probe correctly\n");
+ up_read(&dmar_global_lock);
/* Finally, we enable the DMA remapping hardware. */
for_each_iommu(iommu, drhd) {
--
2.17.1
The domain_init() and md_domain_init() do almost the same job.
Consolidate them to avoid duplication.
Signed-off-by: Lu Baolu <[email protected]>
---
drivers/iommu/intel-iommu.c | 123 +++++++++++-------------------------
1 file changed, 36 insertions(+), 87 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d60cf0fd9500..a4f68585941e 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -1825,63 +1825,6 @@ static inline int guestwidth_to_adjustwidth(int gaw)
return agaw;
}
-static int domain_init(struct dmar_domain *domain, struct intel_iommu *iommu,
- int guest_width)
-{
- int adjust_width, agaw;
- unsigned long sagaw;
- int err;
-
- init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN);
-
- err = init_iova_flush_queue(&domain->iovad,
- iommu_flush_iova, iova_entry_free);
- if (err)
- return err;
-
- domain_reserve_special_ranges(domain);
-
- /* calculate AGAW */
- if (guest_width > cap_mgaw(iommu->cap))
- guest_width = cap_mgaw(iommu->cap);
- domain->gaw = guest_width;
- adjust_width = guestwidth_to_adjustwidth(guest_width);
- agaw = width_to_agaw(adjust_width);
- sagaw = cap_sagaw(iommu->cap);
- if (!test_bit(agaw, &sagaw)) {
- /* hardware doesn't support it, choose a bigger one */
- pr_debug("Hardware doesn't support agaw %d\n", agaw);
- agaw = find_next_bit(&sagaw, 5, agaw);
- if (agaw >= 5)
- return -ENODEV;
- }
- domain->agaw = agaw;
-
- if (ecap_coherent(iommu->ecap))
- domain->iommu_coherency = 1;
- else
- domain->iommu_coherency = 0;
-
- if (ecap_sc_support(iommu->ecap))
- domain->iommu_snooping = 1;
- else
- domain->iommu_snooping = 0;
-
- if (intel_iommu_superpage)
- domain->iommu_superpage = fls(cap_super_page_val(iommu->cap));
- else
- domain->iommu_superpage = 0;
-
- domain->nid = iommu->node;
-
- /* always allocate the top pgd */
- domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
- if (!domain->pgd)
- return -ENOMEM;
- __iommu_flush_cache(iommu, domain->pgd, PAGE_SIZE);
- return 0;
-}
-
static void domain_exit(struct dmar_domain *domain)
{
struct page *freelist;
@@ -2563,6 +2506,31 @@ static int get_last_alias(struct pci_dev *pdev, u16 alias, void *opaque)
return 0;
}
+static int domain_init(struct dmar_domain *domain, int guest_width)
+{
+ int adjust_width;
+
+ init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN);
+ domain_reserve_special_ranges(domain);
+
+ /* calculate AGAW */
+ domain->gaw = guest_width;
+ adjust_width = guestwidth_to_adjustwidth(guest_width);
+ domain->agaw = width_to_agaw(adjust_width);
+
+ domain->iommu_coherency = 0;
+ domain->iommu_snooping = 0;
+ domain->iommu_superpage = 0;
+ domain->max_addr = 0;
+
+ /* always allocate the top pgd */
+ domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
+ if (!domain->pgd)
+ return -ENOMEM;
+ domain_flush_cache(domain, domain->pgd, PAGE_SIZE);
+ return 0;
+}
+
static struct dmar_domain *find_or_alloc_domain(struct device *dev, int gaw)
{
struct device_domain_info *info;
@@ -2600,11 +2568,19 @@ static struct dmar_domain *find_or_alloc_domain(struct device *dev, int gaw)
domain = alloc_domain(0);
if (!domain)
return NULL;
- if (domain_init(domain, iommu, gaw)) {
+
+ if (domain_init(domain, gaw)) {
domain_exit(domain);
return NULL;
}
+ if (init_iova_flush_queue(&domain->iovad,
+ iommu_flush_iova,
+ iova_entry_free)) {
+ pr_warn("iova flush queue initialization failed\n");
+ intel_iommu_strict = 1;
+ }
+
out:
return domain;
}
@@ -2709,8 +2685,6 @@ static int domain_prepare_identity_map(struct device *dev,
return iommu_domain_identity_map(domain, start, end);
}
-static int md_domain_init(struct dmar_domain *domain, int guest_width);
-
static int __init si_domain_init(int hw)
{
struct dmar_rmrr_unit *rmrr;
@@ -2721,7 +2695,7 @@ static int __init si_domain_init(int hw)
if (!si_domain)
return -EFAULT;
- if (md_domain_init(si_domain, DEFAULT_DOMAIN_ADDRESS_WIDTH)) {
+ if (domain_init(si_domain, DEFAULT_DOMAIN_ADDRESS_WIDTH)) {
domain_exit(si_domain);
return -EFAULT;
}
@@ -4836,31 +4810,6 @@ static void dmar_remove_one_dev_info(struct device *dev)
spin_unlock_irqrestore(&device_domain_lock, flags);
}
-static int md_domain_init(struct dmar_domain *domain, int guest_width)
-{
- int adjust_width;
-
- init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN);
- domain_reserve_special_ranges(domain);
-
- /* calculate AGAW */
- domain->gaw = guest_width;
- adjust_width = guestwidth_to_adjustwidth(guest_width);
- domain->agaw = width_to_agaw(adjust_width);
-
- domain->iommu_coherency = 0;
- domain->iommu_snooping = 0;
- domain->iommu_superpage = 0;
- domain->max_addr = 0;
-
- /* always allocate the top pgd */
- domain->pgd = (struct dma_pte *)alloc_pgtable_page(domain->nid);
- if (!domain->pgd)
- return -ENOMEM;
- domain_flush_cache(domain, domain->pgd, PAGE_SIZE);
- return 0;
-}
-
static struct iommu_domain *intel_iommu_domain_alloc(unsigned type)
{
struct dmar_domain *dmar_domain;
@@ -4875,7 +4824,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type)
pr_err("Can't allocate dmar_domain\n");
return NULL;
}
- if (md_domain_init(dmar_domain, DEFAULT_DOMAIN_ADDRESS_WIDTH)) {
+ if (domain_init(dmar_domain, DEFAULT_DOMAIN_ADDRESS_WIDTH)) {
pr_err("Domain initialization failed\n");
domain_exit(dmar_domain);
return NULL;
--
2.17.1
On Sun, 2019-06-09 at 10:38 +0800, Lu Baolu wrote:
> static int __init si_domain_init(int hw)
> @@ -3306,14 +3252,13 @@ static int __init init_dmars(void)
> if (pasid_supported(iommu))
> intel_svm_init(iommu);
> #endif
> - }
>
> - /*
> - * Now that qi is enabled on all iommus, set the root entry
> and flush
> - * caches. This is required on some Intel X58 chipsets,
> otherwise the
> - * flush_context function will loop forever and the boot
> hangs.
> - */
> - for_each_active_iommu(iommu, drhd) {
> + /*
> + * Now that qi is enabled on all iommus, set the root
> entry and
> + * flush caches. This is required on some Intel X58
> chipsets,
> + * otherwise the flush_context function will loop
> forever and
> + * the boot hangs.
> + */
> iommu_flush_write_buffer(iommu);
> iommu_set_root_entry(iommu);
> iommu->flush.flush_context(iommu, 0, 0, 0,
> DMA_CCMD_GLOBAL_INVL);
This changes the intent of the original code. As the comment says
enable QI on all IOMMUs, then flush the caches and set the root entry.
The order of setting the root entries has changed now.
Refer:
Commit a4c34ff1c029 ('iommu/vt-d: Enable QI on all IOMMUs before
setting root entry')
--Sohil
On Mon, 2019-06-10 at 11:45 -0700, Mehta, Sohil wrote:
> On Sun, 2019-06-09 at 10:38 +0800, Lu Baolu wrote:
> > static int __init si_domain_init(int hw)
> > @@ -3306,14 +3252,13 @@ static int __init init_dmars(void)
> > if (pasid_supported(iommu))
> > intel_svm_init(iommu);
> > #endif
> > - }
> >
> > - /*
> > - * Now that qi is enabled on all iommus, set the root entry
> > and flush
> > - * caches. This is required on some Intel X58 chipsets,
> > otherwise the
> > - * flush_context function will loop forever and the boot
> > hangs.
> > - */
> > - for_each_active_iommu(iommu, drhd) {
> > + /*
> > + * Now that qi is enabled on all iommus, set the root
> > entry and
> > + * flush caches. This is required on some Intel X58
> > chipsets,
> > + * otherwise the flush_context function will loop
> > forever and
> > + * the boot hangs.
> > + */
> > iommu_flush_write_buffer(iommu);
> > iommu_set_root_entry(iommu);
> > iommu->flush.flush_context(iommu, 0, 0, 0,
> > DMA_CCMD_GLOBAL_INVL);
>
> This changes the intent of the original code. As the comment says
> enable QI on all IOMMUs, then flush the caches and set the root entry.
> The order of setting the root entries has changed now.
>
> Refer:
> Commit a4c34ff1c029 ('iommu/vt-d: Enable QI on all IOMMUs before
> setting root entry')
Thanks Sohil! for catching the bug.
Will send a V2 to Lu Baolu fixing this.
Regards,
Sai
Hi,
On 6/11/19 3:25 AM, Sai Praneeth Prakhya wrote:
> On Mon, 2019-06-10 at 11:45 -0700, Mehta, Sohil wrote:
>> On Sun, 2019-06-09 at 10:38 +0800, Lu Baolu wrote:
>>> static int __init si_domain_init(int hw)
>>> @@ -3306,14 +3252,13 @@ static int __init init_dmars(void)
>>> if (pasid_supported(iommu))
>>> intel_svm_init(iommu);
>>> #endif
>>> - }
>>>
>>> - /*
>>> - * Now that qi is enabled on all iommus, set the root entry
>>> and flush
>>> - * caches. This is required on some Intel X58 chipsets,
>>> otherwise the
>>> - * flush_context function will loop forever and the boot
>>> hangs.
>>> - */
>>> - for_each_active_iommu(iommu, drhd) {
>>> + /*
>>> + * Now that qi is enabled on all iommus, set the root
>>> entry and
>>> + * flush caches. This is required on some Intel X58
>>> chipsets,
>>> + * otherwise the flush_context function will loop
>>> forever and
>>> + * the boot hangs.
>>> + */
>>> iommu_flush_write_buffer(iommu);
>>> iommu_set_root_entry(iommu);
>>> iommu->flush.flush_context(iommu, 0, 0, 0,
>>> DMA_CCMD_GLOBAL_INVL);
>>
>> This changes the intent of the original code. As the comment says
>> enable QI on all IOMMUs, then flush the caches and set the root entry.
>> The order of setting the root entries has changed now.
>>
>> Refer:
>> Commit a4c34ff1c029 ('iommu/vt-d: Enable QI on all IOMMUs before
>> setting root entry')
>
> Thanks Sohil! for catching the bug.
> Will send a V2 to Lu Baolu fixing this.
Okay, I will submit a v2 of this series later.
>
> Regards,
> Sai
Best regards,
Baolu
On Sun, 2019-06-09 at 10:37 +0800, Lu Baolu wrote:
> Hi Joerg,
>
> This series includes several fixes and cleanups after delegating
> DMA domain to generic iommu. Please review and consider them for
> linux-next.
>
> Best regards,
> Baolu
>
> Lu Baolu (5):
> iommu/vt-d: Don't return error when device gets right domain
> iommu/vt-d: Set domain type for a private domain
> iommu/vt-d: Don't enable iommu's which have been ignored
> iommu/vt-d: Fix suspicious RCU usage in probe_acpi_namespace_devices()
> iommu/vt-d: Consolidate domain_init() to avoid duplication
>
> Sai Praneeth Prakhya (1):
> iommu/vt-d: Cleanup after delegating DMA domain to generic iommu
>
> drivers/iommu/intel-iommu.c | 210 +++++++++---------------------------
> 1 file changed, 53 insertions(+), 157 deletions(-)
>
BTW, the linux-next commit "iommu/vt-d: Expose ISA direct mapping region via
iommu_get_resv_regions" [1] also introduced a memory leak below, as it forgets
to ask intel_iommu_put_resv_regions() to call kfree() when
CONFIG_INTEL_IOMMU_FLOPPY_WA=y.
[1] https://lore.kernel.org/patchwork/patch/1078963/
unreferenced object 0xffff88912ef789c8 (size 64):
comm "swapper/0", pid 1, jiffies 4294946232 (age 5399.530s)
hex dump (first 32 bytes):
48 83 f7 2e 91 88 ff ff 30 fa e3 00 82 88 ff ff H.......0.......
00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 ................
backtrace:
[<00000000d267f4be>] kmem_cache_alloc_trace+0x266/0x380
[<00000000d383d15b>] iommu_alloc_resv_region+0x40/0xb0
[<00000000db8be31b>] intel_iommu_get_resv_regions+0x25e/0x2d0
[<0000000021fbc6c3>] iommu_group_create_direct_mappings+0x159/0x3d0
[<0000000022259268>] iommu_group_add_device+0x17b/0x4f0
[<0000000028b91093>] iommu_group_get_for_dev+0x153/0x460
[<00000000577c33b4>] intel_iommu_add_device+0xc4/0x210
[<00000000587b7492>] iommu_probe_device+0x63/0x80
[<000000004aa997d1>] add_iommu_group+0xe/0x20
[<00000000c93a9cd6>] bus_for_each_dev+0xf0/0x150
[<00000000a2e5f0cb>] bus_set_iommu+0xc6/0x100
[<00000000dbad5db0>] intel_iommu_init+0x682/0xb0a
[<00000000226f7444>] pci_iommu_init+0x26/0x62
[<000000002d8694f5>] do_one_initcall+0xe5/0x3ea
[<000000004bc60101>] kernel_init_freeable+0x5ad/0x640
[<0000000091b0bad6>] kernel_init+0x11/0x138
Hi,
This is supposed to be fixed by this patch
https://lkml.org/lkml/2019/6/3/115
which is part of several RMRR related fixes and enhancements.
Best regards,
Baolu
On 6/12/19 12:55 AM, Qian Cai wrote:
> On Sun, 2019-06-09 at 10:37 +0800, Lu Baolu wrote:
>> Hi Joerg,
>>
>> This series includes several fixes and cleanups after delegating
>> DMA domain to generic iommu. Please review and consider them for
>> linux-next.
>>
>> Best regards,
>> Baolu
>>
>> Lu Baolu (5):
>> iommu/vt-d: Don't return error when device gets right domain
>> iommu/vt-d: Set domain type for a private domain
>> iommu/vt-d: Don't enable iommu's which have been ignored
>> iommu/vt-d: Fix suspicious RCU usage in probe_acpi_namespace_devices()
>> iommu/vt-d: Consolidate domain_init() to avoid duplication
>>
>> Sai Praneeth Prakhya (1):
>> iommu/vt-d: Cleanup after delegating DMA domain to generic iommu
>>
>> drivers/iommu/intel-iommu.c | 210 +++++++++---------------------------
>> 1 file changed, 53 insertions(+), 157 deletions(-)
>>
>
> BTW, the linux-next commit "iommu/vt-d: Expose ISA direct mapping region via
> iommu_get_resv_regions" [1] also introduced a memory leak below, as it forgets
> to ask intel_iommu_put_resv_regions() to call kfree() when
> CONFIG_INTEL_IOMMU_FLOPPY_WA=y.
>
> [1] https://lore.kernel.org/patchwork/patch/1078963/
>
> unreferenced object 0xffff88912ef789c8 (size 64):
> comm "swapper/0", pid 1, jiffies 4294946232 (age 5399.530s)
> hex dump (first 32 bytes):
> 48 83 f7 2e 91 88 ff ff 30 fa e3 00 82 88 ff ff H.......0.......
> 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 ................
> backtrace:
> [<00000000d267f4be>] kmem_cache_alloc_trace+0x266/0x380
> [<00000000d383d15b>] iommu_alloc_resv_region+0x40/0xb0
> [<00000000db8be31b>] intel_iommu_get_resv_regions+0x25e/0x2d0
> [<0000000021fbc6c3>] iommu_group_create_direct_mappings+0x159/0x3d0
> [<0000000022259268>] iommu_group_add_device+0x17b/0x4f0
> [<0000000028b91093>] iommu_group_get_for_dev+0x153/0x460
> [<00000000577c33b4>] intel_iommu_add_device+0xc4/0x210
> [<00000000587b7492>] iommu_probe_device+0x63/0x80
> [<000000004aa997d1>] add_iommu_group+0xe/0x20
> [<00000000c93a9cd6>] bus_for_each_dev+0xf0/0x150
> [<00000000a2e5f0cb>] bus_set_iommu+0xc6/0x100
> [<00000000dbad5db0>] intel_iommu_init+0x682/0xb0a
> [<00000000226f7444>] pci_iommu_init+0x26/0x62
> [<000000002d8694f5>] do_one_initcall+0xe5/0x3ea
> [<000000004bc60101>] kernel_init_freeable+0x5ad/0x640
> [<0000000091b0bad6>] kernel_init+0x11/0x138
>
>