This is completely overengineered and definitely not an interface which
should be made available to anything else than this particular MCE case.
Signed-off-by: Thomas Gleixner <[email protected]>
---
arch/x86/include/asm/traps.h | 2 --
arch/x86/kernel/cpu/mce/core.c | 6 ++++--
arch/x86/kernel/traps.c | 37 -------------------------------------
3 files changed, 4 insertions(+), 41 deletions(-)
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -120,8 +120,6 @@ asmlinkage void smp_irq_move_cleanup_int
extern void ist_enter(struct pt_regs *regs);
extern void ist_exit(struct pt_regs *regs);
-extern void ist_begin_non_atomic(struct pt_regs *regs);
-extern void ist_end_non_atomic(void);
#ifdef CONFIG_VMAP_STACK
void __noreturn handle_stack_overflow(const char *message,
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1352,13 +1352,15 @@ void notrace do_machine_check(struct pt_
/* Fault was in user mode and we need to take some action */
if ((m.cs & 3) == 3) {
- ist_begin_non_atomic(regs);
+ /* If this triggers there is no way to recover. Die hard. */
+ BUG_ON(!on_thread_stack() || !user_mode(regs));
local_irq_enable();
+ preempt_enable();
if (kill_it || do_memory_failure(&m))
force_sig(SIGBUS);
+ preempt_disable();
local_irq_disable();
- ist_end_non_atomic();
} else {
if (!fixup_exception(regs, X86_TRAP_MC, error_code, 0))
mce_panic("Failed kernel mode recovery", &m, msg);
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -117,43 +117,6 @@ void ist_exit(struct pt_regs *regs)
rcu_nmi_exit();
}
-/**
- * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
- * @regs: regs passed to the IST exception handler
- *
- * IST exception handlers normally cannot schedule. As a special
- * exception, if the exception interrupted userspace code (i.e.
- * user_mode(regs) would return true) and the exception was not
- * a double fault, it can be safe to schedule. ist_begin_non_atomic()
- * begins a non-atomic section within an ist_enter()/ist_exit() region.
- * Callers are responsible for enabling interrupts themselves inside
- * the non-atomic section, and callers must call ist_end_non_atomic()
- * before ist_exit().
- */
-void ist_begin_non_atomic(struct pt_regs *regs)
-{
- BUG_ON(!user_mode(regs));
-
- /*
- * Sanity check: we need to be on the normal thread stack. This
- * will catch asm bugs and any attempt to use ist_preempt_enable
- * from double_fault.
- */
- BUG_ON(!on_thread_stack());
-
- preempt_enable_no_resched();
-}
-
-/**
- * ist_end_non_atomic() - begin a non-atomic section in an IST exception
- *
- * Ends a non-atomic section started with ist_begin_non_atomic().
- */
-void ist_end_non_atomic(void)
-{
- preempt_disable();
-}
-
int is_valid_bugaddr(unsigned long addr)
{
unsigned short ud;
On 5/5/20 3:16 PM, Thomas Gleixner wrote:
> This is completely overengineered and definitely not an interface which
> should be made available to anything else than this particular MCE case.
>
> Signed-off-by: Thomas Gleixner <[email protected]>
> ---
> arch/x86/include/asm/traps.h | 2 --
> arch/x86/kernel/cpu/mce/core.c | 6 ++++--
> arch/x86/kernel/traps.c | 37 -------------------------------------
> 3 files changed, 4 insertions(+), 41 deletions(-)
Reviewed-by: Alexandre Chartre <[email protected]>
alex.
> --- a/arch/x86/include/asm/traps.h
> +++ b/arch/x86/include/asm/traps.h
> @@ -120,8 +120,6 @@ asmlinkage void smp_irq_move_cleanup_int
>
> extern void ist_enter(struct pt_regs *regs);
> extern void ist_exit(struct pt_regs *regs);
> -extern void ist_begin_non_atomic(struct pt_regs *regs);
> -extern void ist_end_non_atomic(void);
>
> #ifdef CONFIG_VMAP_STACK
> void __noreturn handle_stack_overflow(const char *message,
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -1352,13 +1352,15 @@ void notrace do_machine_check(struct pt_
>
> /* Fault was in user mode and we need to take some action */
> if ((m.cs & 3) == 3) {
> - ist_begin_non_atomic(regs);
> + /* If this triggers there is no way to recover. Die hard. */
> + BUG_ON(!on_thread_stack() || !user_mode(regs));
> local_irq_enable();
> + preempt_enable();
>
> if (kill_it || do_memory_failure(&m))
> force_sig(SIGBUS);
> + preempt_disable();
> local_irq_disable();
> - ist_end_non_atomic();
> } else {
> if (!fixup_exception(regs, X86_TRAP_MC, error_code, 0))
> mce_panic("Failed kernel mode recovery", &m, msg);
> --- a/arch/x86/kernel/traps.c
> +++ b/arch/x86/kernel/traps.c
> @@ -117,43 +117,6 @@ void ist_exit(struct pt_regs *regs)
> rcu_nmi_exit();
> }
>
> -/**
> - * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
> - * @regs: regs passed to the IST exception handler
> - *
> - * IST exception handlers normally cannot schedule. As a special
> - * exception, if the exception interrupted userspace code (i.e.
> - * user_mode(regs) would return true) and the exception was not
> - * a double fault, it can be safe to schedule. ist_begin_non_atomic()
> - * begins a non-atomic section within an ist_enter()/ist_exit() region.
> - * Callers are responsible for enabling interrupts themselves inside
> - * the non-atomic section, and callers must call ist_end_non_atomic()
> - * before ist_exit().
> - */
> -void ist_begin_non_atomic(struct pt_regs *regs)
> -{
> - BUG_ON(!user_mode(regs));
> -
> - /*
> - * Sanity check: we need to be on the normal thread stack. This
> - * will catch asm bugs and any attempt to use ist_preempt_enable
> - * from double_fault.
> - */
> - BUG_ON(!on_thread_stack());
> -
> - preempt_enable_no_resched();
> -}
> -
> -/**
> - * ist_end_non_atomic() - begin a non-atomic section in an IST exception
> - *
> - * Ends a non-atomic section started with ist_begin_non_atomic().
> - */
> -void ist_end_non_atomic(void)
> -{
> - preempt_disable();
> -}
> -
> int is_valid_bugaddr(unsigned long addr)
> {
> unsigned short ud;
>
On Tue, May 5, 2020 at 7:13 AM Thomas Gleixner <[email protected]> wrote:
>
> This is completely overengineered and definitely not an interface which
> should be made available to anything else than this particular MCE case.
Sorry for the overengineering. :)
--Andy
----- On May 5, 2020, at 9:16 AM, Thomas Gleixner [email protected] wrote:
> This is completely overengineered and definitely not an interface which
> should be made available to anything else than this particular MCE case.
This patch introduces a significant change under the radar (not explained
in the changelog): it turns preempt_enable_no_resched() into preempt_enable().
Why, and why was it a no_resched() in the first place ? Was it for performance
or correctness reasons ?
Thanks,
Mathieu
>
> Signed-off-by: Thomas Gleixner <[email protected]>
> ---
> arch/x86/include/asm/traps.h | 2 --
> arch/x86/kernel/cpu/mce/core.c | 6 ++++--
> arch/x86/kernel/traps.c | 37 -------------------------------------
> 3 files changed, 4 insertions(+), 41 deletions(-)
>
> --- a/arch/x86/include/asm/traps.h
> +++ b/arch/x86/include/asm/traps.h
> @@ -120,8 +120,6 @@ asmlinkage void smp_irq_move_cleanup_int
>
> extern void ist_enter(struct pt_regs *regs);
> extern void ist_exit(struct pt_regs *regs);
> -extern void ist_begin_non_atomic(struct pt_regs *regs);
> -extern void ist_end_non_atomic(void);
>
> #ifdef CONFIG_VMAP_STACK
> void __noreturn handle_stack_overflow(const char *message,
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -1352,13 +1352,15 @@ void notrace do_machine_check(struct pt_
>
> /* Fault was in user mode and we need to take some action */
> if ((m.cs & 3) == 3) {
> - ist_begin_non_atomic(regs);
> + /* If this triggers there is no way to recover. Die hard. */
> + BUG_ON(!on_thread_stack() || !user_mode(regs));
> local_irq_enable();
> + preempt_enable();
>
> if (kill_it || do_memory_failure(&m))
> force_sig(SIGBUS);
> + preempt_disable();
> local_irq_disable();
> - ist_end_non_atomic();
> } else {
> if (!fixup_exception(regs, X86_TRAP_MC, error_code, 0))
> mce_panic("Failed kernel mode recovery", &m, msg);
> --- a/arch/x86/kernel/traps.c
> +++ b/arch/x86/kernel/traps.c
> @@ -117,43 +117,6 @@ void ist_exit(struct pt_regs *regs)
> rcu_nmi_exit();
> }
>
> -/**
> - * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
> - * @regs: regs passed to the IST exception handler
> - *
> - * IST exception handlers normally cannot schedule. As a special
> - * exception, if the exception interrupted userspace code (i.e.
> - * user_mode(regs) would return true) and the exception was not
> - * a double fault, it can be safe to schedule. ist_begin_non_atomic()
> - * begins a non-atomic section within an ist_enter()/ist_exit() region.
> - * Callers are responsible for enabling interrupts themselves inside
> - * the non-atomic section, and callers must call ist_end_non_atomic()
> - * before ist_exit().
> - */
> -void ist_begin_non_atomic(struct pt_regs *regs)
> -{
> - BUG_ON(!user_mode(regs));
> -
> - /*
> - * Sanity check: we need to be on the normal thread stack. This
> - * will catch asm bugs and any attempt to use ist_preempt_enable
> - * from double_fault.
> - */
> - BUG_ON(!on_thread_stack());
> -
> - preempt_enable_no_resched();
> -}
> -
> -/**
> - * ist_end_non_atomic() - begin a non-atomic section in an IST exception
> - *
> - * Ends a non-atomic section started with ist_begin_non_atomic().
> - */
> -void ist_end_non_atomic(void)
> -{
> - preempt_disable();
> -}
> -
> int is_valid_bugaddr(unsigned long addr)
> {
> unsigned short ud;
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
On Wed, 13 May 2020 18:57:25 -0400 (EDT)
Mathieu Desnoyers <[email protected]> wrote:
> ----- On May 5, 2020, at 9:16 AM, Thomas Gleixner [email protected] wrote:
>
> > This is completely overengineered and definitely not an interface which
> > should be made available to anything else than this particular MCE case.
>
> This patch introduces a significant change under the radar (not explained
> in the changelog): it turns preempt_enable_no_resched() into preempt_enable().
>
> Why, and why was it a no_resched() in the first place ? Was it for performance
> or correctness reasons ?
I believe the reason for no_resched, is because it was within a
local_irq_disable() section, which means it couldn't schedule anyway.
-- Steve
> > --- a/arch/x86/kernel/cpu/mce/core.c
> > +++ b/arch/x86/kernel/cpu/mce/core.c
> > @@ -1352,13 +1352,15 @@ void notrace do_machine_check(struct pt_
> >
> > /* Fault was in user mode and we need to take some action */
> > if ((m.cs & 3) == 3) {
> > - ist_begin_non_atomic(regs);
> > + /* If this triggers there is no way to recover.
> > Die hard. */
> > + BUG_ON(!on_thread_stack() || !user_mode(regs));
> > local_irq_enable();
> > + preempt_enable();
> >
> > if (kill_it || do_memory_failure(&m))
> > force_sig(SIGBUS);
> > + preempt_disable();
> > local_irq_disable();
> > - ist_end_non_atomic();
> > } else {
> > if (!fixup_exception(regs, X86_TRAP_MC, error_code,
> > -void ist_begin_non_atomic(struct pt_regs *regs)
> > -{
> > - BUG_ON(!user_mode(regs));
> > -
> > - /*
> > - * Sanity check: we need to be on the normal thread
> > stack. This
> > - * will catch asm bugs and any attempt to use
> > ist_preempt_enable
> > - * from double_fault.
> > - */
> > - BUG_ON(!on_thread_stack());
> > -
> > - preempt_enable_no_resched();
> > -}
> > -
> > -/**
> > - * ist_end_non_atomic() - begin a non-atomic section in an IST
> > exception
> > - *
> > - * Ends a non-atomic section started with ist_begin_non_atomic().
> > - */
> > -void ist_end_non_atomic(void)
> > -{
> > - preempt_disable();
> > -}
> > -
> > int is_valid_bugaddr(unsigned long addr)
> > {
> > unsigned short ud;
>
Mathieu Desnoyers <[email protected]> writes:
> ----- On May 5, 2020, at 9:16 AM, Thomas Gleixner [email protected] wrote:
>
>> This is completely overengineered and definitely not an interface which
>> should be made available to anything else than this particular MCE case.
>
> This patch introduces a significant change under the radar (not explained
> in the changelog): it turns preempt_enable_no_resched() into preempt_enable().
>
> Why, and why was it a no_resched() in the first place ? Was it for performance
> or correctness reasons ?
_no_resched() is an optimization when in code which cannot schedule
anyway. But #MC is definitely not a performance critical hotpath.
So yes, it's a change but really not significant.
>> Signed-off-by: Thomas Gleixner <[email protected]>
>> ---
< Remove useless gunk >
Can you please trim your replies?
Thanks,
tglx
----- On May 15, 2020, at 5:34 AM, Thomas Gleixner [email protected] wrote:
[...]
>
> Can you please trim your replies?
Sorry, will do,
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
The following commit has been merged into the core/rcu branch of tip:
Commit-ID: b052df3da821adfd6be26a6eb16624fb50e90e56
Gitweb: https://git.kernel.org/tip/b052df3da821adfd6be26a6eb16624fb50e90e56
Author: Thomas Gleixner <[email protected]>
AuthorDate: Thu, 05 Mar 2020 00:52:41 +01:00
Committer: Thomas Gleixner <[email protected]>
CommitterDate: Tue, 19 May 2020 15:51:19 +02:00
x86/entry: Get rid of ist_begin/end_non_atomic()
This is completely overengineered and definitely not an interface which
should be made available to anything else than this particular MCE case.
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Alexandre Chartre <[email protected]>
Acked-by: Peter Zijlstra <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
---
arch/x86/include/asm/traps.h | 2 +--
arch/x86/kernel/cpu/mce/core.c | 6 +++--
arch/x86/kernel/traps.c | 37 +---------------------------------
3 files changed, 4 insertions(+), 41 deletions(-)
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index c26a7e1..fe109fc 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -120,8 +120,6 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void);
extern void ist_enter(struct pt_regs *regs);
extern void ist_exit(struct pt_regs *regs);
-extern void ist_begin_non_atomic(struct pt_regs *regs);
-extern void ist_end_non_atomic(void);
#ifdef CONFIG_VMAP_STACK
void __noreturn handle_stack_overflow(const char *message,
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 54165f3..98bf91c 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1352,13 +1352,15 @@ void notrace do_machine_check(struct pt_regs *regs, long error_code)
/* Fault was in user mode and we need to take some action */
if ((m.cs & 3) == 3) {
- ist_begin_non_atomic(regs);
+ /* If this triggers there is no way to recover. Die hard. */
+ BUG_ON(!on_thread_stack() || !user_mode(regs));
local_irq_enable();
+ preempt_enable();
if (kill_it || do_memory_failure(&m))
force_sig(SIGBUS);
+ preempt_disable();
local_irq_disable();
- ist_end_non_atomic();
} else {
if (!fixup_exception(regs, X86_TRAP_MC, error_code, 0))
mce_panic("Failed kernel mode recovery", &m, msg);
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index d54cffd..6740e83 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -117,43 +117,6 @@ void ist_exit(struct pt_regs *regs)
rcu_nmi_exit();
}
-/**
- * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
- * @regs: regs passed to the IST exception handler
- *
- * IST exception handlers normally cannot schedule. As a special
- * exception, if the exception interrupted userspace code (i.e.
- * user_mode(regs) would return true) and the exception was not
- * a double fault, it can be safe to schedule. ist_begin_non_atomic()
- * begins a non-atomic section within an ist_enter()/ist_exit() region.
- * Callers are responsible for enabling interrupts themselves inside
- * the non-atomic section, and callers must call ist_end_non_atomic()
- * before ist_exit().
- */
-void ist_begin_non_atomic(struct pt_regs *regs)
-{
- BUG_ON(!user_mode(regs));
-
- /*
- * Sanity check: we need to be on the normal thread stack. This
- * will catch asm bugs and any attempt to use ist_preempt_enable
- * from double_fault.
- */
- BUG_ON(!on_thread_stack());
-
- preempt_enable_no_resched();
-}
-
-/**
- * ist_end_non_atomic() - begin a non-atomic section in an IST exception
- *
- * Ends a non-atomic section started with ist_begin_non_atomic().
- */
-void ist_end_non_atomic(void)
-{
- preempt_disable();
-}
-
int is_valid_bugaddr(unsigned long addr)
{
unsigned short ud;