2019-06-11 12:27:21

by Wanpeng Li

[permalink] [raw]
Subject: [PATCH v3 0/4] KVM: LAPIC: Implement Exitless Timer

Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur vmexits.
This patchset tries to avoid vmexit which is incurred by the emulated
timer fires in dedicated instance scenario.

When nohz_full is enabled in dedicated instances scenario, the unpinned
timer will be moved to the nearest busy housekeepers after commit 444969223c8
("sched/nohz: Fix affine unpinned timers mess"). However, KVM always makes
lapic timer pinned to the pCPU which vCPU residents, the reason is explained
by commit 61abdbe0 (kvm: x86: make lapic hrtimer pinned). Actually, these
emulated timers can be offload to the housekeeping cpus since APICv
is really common in recent years. The guest timer interrupt is injected by
posted-interrupt which is delivered by housekeeping cpu once the emulated
timer fires.

The host admin should fine tuned, e.g. dedicated instances scenario w/
nohz_full cover the pCPUs which vCPUs resident, several pCPUs surplus
for housekeeping, disable mwait/hlt/pause vmexits to occupy the pCPUs,
fortunately preemption timer is disabled after mwait is exposed to
guest which makes emulated timer offload can be possible.
~3% redis performance benefit can be observed on Skylake server.

w/o patchset:

VM-EXIT Samples Samples% Time% Min Time Max Time Avg time

EXTERNAL_INTERRUPT 42916 49.43% 39.30% 0.47us 106.09us 0.71us ( +- 1.09% )

w/ patchset:

VM-EXIT Samples Samples% Time% Min Time Max Time Avg time

EXTERNAL_INTERRUPT 6871 9.29% 2.96% 0.44us 57.88us 0.72us ( +- 4.02% )


v2 -> v3:
* disarming the vmx preemption timer when posted_interrupt_inject_timer_enabled()
* check kvm_hlt_in_guest instead

v1 -> v2:
* check vcpu_halt_in_guest
* move module parameter from kvm-intel to kvm
* add housekeeping_enabled
* rename apic_timer_expired_pi to kvm_apic_inject_pending_timer_irqs


Wanpeng Li (4):
KVM: LAPIC: Make lapic timer unpinned when timer is injected by pi
KVM: LAPIC: lapic timer interrupt is injected by posted interrupt
KVM: LAPIC: Ignore timer migration when lapic timer is injected by pi
KVM: LAPIC: add advance timer support to pi_inject_timer

arch/x86/kvm/lapic.c | 61 +++++++++++++++++++++++++++++++----------
arch/x86/kvm/lapic.h | 3 +-
arch/x86/kvm/svm.c | 2 +-
arch/x86/kvm/vmx/vmx.c | 5 ++--
arch/x86/kvm/x86.c | 5 ++++
arch/x86/kvm/x86.h | 2 ++
include/linux/sched/isolation.h | 2 ++
kernel/sched/isolation.c | 6 ++++
8 files changed, 68 insertions(+), 18 deletions(-)

--
2.7.4


2019-06-11 12:27:23

by Wanpeng Li

[permalink] [raw]
Subject: [PATCH v3 2/4] KVM: LAPIC: lapic timer interrupt is injected by posted interrupt

From: Wanpeng Li <[email protected]>

Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur vmexits.
This patch tries to avoid vmexit which is incurred by the emulated
timer fires in dedicated instance scenario.

When nohz_full is enabled in dedicated instances scenario, the emulated
timers can be offload to the nearest busy housekeeping cpus since APICv
is really common in recent years. The guest timer interrupt is injected
by posted-interrupt which is delivered by housekeeping cpu once the emulated
timer fires.

~3% redis performance benefit can be observed on Skylake server.

w/o patch:

VM-EXIT Samples Samples% Time% Min Time Max Time Avg time

EXTERNAL_INTERRUPT 42916 49.43% 39.30% 0.47us 106.09us 0.71us ( +- 1.09% )

w/ patch:

VM-EXIT Samples Samples% Time% Min Time Max Time Avg time

EXTERNAL_INTERRUPT 6871 9.29% 2.96% 0.44us 57.88us 0.72us ( +- 4.02% )

Cc: Paolo Bonzini <[email protected]>
Cc: Radim Krčmář <[email protected]>
Signed-off-by: Wanpeng Li <[email protected]>
---
arch/x86/kvm/lapic.c | 32 +++++++++++++++++++++++++-------
1 file changed, 25 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index e57eeba..020599f 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -133,6 +133,12 @@ inline bool posted_interrupt_inject_timer_enabled(struct kvm_vcpu *vcpu)
}
EXPORT_SYMBOL_GPL(posted_interrupt_inject_timer_enabled);

+static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
+{
+ return posted_interrupt_inject_timer_enabled(vcpu) &&
+ kvm_hlt_in_guest(vcpu->kvm);
+}
+
static inline bool kvm_apic_map_get_logical_dest(struct kvm_apic_map *map,
u32 dest_id, struct kvm_lapic ***cluster, u16 *mask) {
switch (map->mode) {
@@ -1441,6 +1447,19 @@ static void apic_update_lvtt(struct kvm_lapic *apic)
}
}

+static void kvm_apic_inject_pending_timer_irqs(struct kvm_lapic *apic)
+{
+ struct kvm_timer *ktimer = &apic->lapic_timer;
+
+ kvm_apic_local_deliver(apic, APIC_LVTT);
+ if (apic_lvtt_tscdeadline(apic))
+ ktimer->tscdeadline = 0;
+ if (apic_lvtt_oneshot(apic)) {
+ ktimer->tscdeadline = 0;
+ ktimer->target_expiration = 0;
+ }
+}
+
static void apic_timer_expired(struct kvm_lapic *apic)
{
struct kvm_vcpu *vcpu = apic->vcpu;
@@ -1450,6 +1469,11 @@ static void apic_timer_expired(struct kvm_lapic *apic)
if (atomic_read(&apic->lapic_timer.pending))
return;

+ if (can_posted_interrupt_inject_timer(apic->vcpu)) {
+ kvm_apic_inject_pending_timer_irqs(apic);
+ return;
+ }
+
atomic_inc(&apic->lapic_timer.pending);
kvm_set_pending_timer(vcpu);

@@ -2386,13 +2410,7 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu)
struct kvm_lapic *apic = vcpu->arch.apic;

if (atomic_read(&apic->lapic_timer.pending) > 0) {
- kvm_apic_local_deliver(apic, APIC_LVTT);
- if (apic_lvtt_tscdeadline(apic))
- apic->lapic_timer.tscdeadline = 0;
- if (apic_lvtt_oneshot(apic)) {
- apic->lapic_timer.tscdeadline = 0;
- apic->lapic_timer.target_expiration = 0;
- }
+ kvm_apic_inject_pending_timer_irqs(apic);
atomic_set(&apic->lapic_timer.pending, 0);
}
}
--
2.7.4

2019-06-11 12:27:25

by Wanpeng Li

[permalink] [raw]
Subject: [PATCH v3 3/4] KVM: LAPIC: Ignore timer migration when lapic timer is injected by posted-interrupt

From: Wanpeng Li <[email protected]>

When lapic timer is injected by posted-interrupt, the emulated timer is
offload to the housekeeping cpu. The timer interrupt will be delivered
properly, no need to migrate timer.

Cc: Paolo Bonzini <[email protected]>
Cc: Radim Krčmář <[email protected]>
Signed-off-by: Wanpeng Li <[email protected]>
---
arch/x86/kvm/lapic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 020599f..c21bab2 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2532,7 +2532,8 @@ void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
{
struct hrtimer *timer;

- if (!lapic_in_kernel(vcpu))
+ if (!lapic_in_kernel(vcpu) ||
+ posted_interrupt_inject_timer_enabled(vcpu))
return;

timer = &vcpu->arch.apic->lapic_timer.timer;
--
2.7.4

2019-06-11 12:27:42

by Wanpeng Li

[permalink] [raw]
Subject: [PATCH v3 1/4] KVM: LAPIC: Make lapic timer unpinned when timer is injected by pi

From: Wanpeng Li <[email protected]>

Make lapic timer unpinned when timer is injected by posted-interrupt,
the emulated timer can be offload to the housekeeping cpus.

The host admin should fine tuned, e.g. dedicated instances scenario
w/ nohz_full cover the pCPUs which vCPUs resident, several pCPUs
surplus for housekeeping, disable mwait/hlt/pause vmexits to occupy
the pCPUs, fortunately preemption timer is disabled after mwait is
exposed to guest which makes emulated timer offload can be possible.

Cc: Paolo Bonzini <[email protected]>
Cc: Radim Krčmář <[email protected]>
Signed-off-by: Wanpeng Li <[email protected]>
---
arch/x86/kvm/lapic.c | 20 ++++++++++++++++----
arch/x86/kvm/lapic.h | 1 +
arch/x86/kvm/vmx/vmx.c | 3 ++-
arch/x86/kvm/x86.c | 5 +++++
arch/x86/kvm/x86.h | 2 ++
include/linux/sched/isolation.h | 2 ++
kernel/sched/isolation.c | 6 ++++++
7 files changed, 34 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index fcf42a3..e57eeba 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -127,6 +127,12 @@ static inline u32 kvm_x2apic_id(struct kvm_lapic *apic)
return apic->vcpu->vcpu_id;
}

+inline bool posted_interrupt_inject_timer_enabled(struct kvm_vcpu *vcpu)
+{
+ return pi_inject_timer && kvm_vcpu_apicv_active(vcpu);
+}
+EXPORT_SYMBOL_GPL(posted_interrupt_inject_timer_enabled);
+
static inline bool kvm_apic_map_get_logical_dest(struct kvm_apic_map *map,
u32 dest_id, struct kvm_lapic ***cluster, u16 *mask) {
switch (map->mode) {
@@ -1581,7 +1587,9 @@ static void start_sw_tscdeadline(struct kvm_lapic *apic)
likely(ns > apic->lapic_timer.timer_advance_ns)) {
expire = ktime_add_ns(now, ns);
expire = ktime_sub_ns(expire, ktimer->timer_advance_ns);
- hrtimer_start(&ktimer->timer, expire, HRTIMER_MODE_ABS_PINNED);
+ hrtimer_start(&ktimer->timer, expire,
+ posted_interrupt_inject_timer_enabled(vcpu) ?
+ HRTIMER_MODE_ABS : HRTIMER_MODE_ABS_PINNED);
} else
apic_timer_expired(apic);

@@ -1683,7 +1691,8 @@ static void start_sw_period(struct kvm_lapic *apic)

hrtimer_start(&apic->lapic_timer.timer,
apic->lapic_timer.target_expiration,
- HRTIMER_MODE_ABS_PINNED);
+ posted_interrupt_inject_timer_enabled(apic->vcpu) ?
+ HRTIMER_MODE_ABS : HRTIMER_MODE_ABS_PINNED);
}

bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu)
@@ -2320,7 +2329,8 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu, int timer_advance_ns)
apic->vcpu = vcpu;

hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC,
- HRTIMER_MODE_ABS_PINNED);
+ posted_interrupt_inject_timer_enabled(vcpu) ?
+ HRTIMER_MODE_ABS : HRTIMER_MODE_ABS_PINNED);
apic->lapic_timer.timer.function = apic_timer_fn;
if (timer_advance_ns == -1) {
apic->lapic_timer.timer_advance_ns = 1000;
@@ -2509,7 +2519,9 @@ void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)

timer = &vcpu->arch.apic->lapic_timer.timer;
if (hrtimer_cancel(timer))
- hrtimer_start_expires(timer, HRTIMER_MODE_ABS_PINNED);
+ hrtimer_start_expires(timer,
+ posted_interrupt_inject_timer_enabled(vcpu) ?
+ HRTIMER_MODE_ABS : HRTIMER_MODE_ABS_PINNED);
}

/*
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index f974a3d..7b85a7c 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -231,6 +231,7 @@ void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu);
void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);
void kvm_lapic_restart_hv_timer(struct kvm_vcpu *vcpu);
+inline bool posted_interrupt_inject_timer_enabled(struct kvm_vcpu *vcpu);

static inline enum lapic_mode kvm_apic_mode(u64 apic_base)
{
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index da24f18..6d3c0b1 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7042,7 +7042,8 @@ static int vmx_set_hv_timer(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
u64 tscl, guest_tscl, delta_tsc, lapic_timer_advance_cycles;
struct kvm_timer *ktimer = &vcpu->arch.apic->lapic_timer;

- if (kvm_mwait_in_guest(vcpu->kvm))
+ if (kvm_mwait_in_guest(vcpu->kvm) ||
+ posted_interrupt_inject_timer_enabled(vcpu))
return -EOPNOTSUPP;

vmx = to_vmx(vcpu);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 6200d5a..35c4884 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -54,6 +54,7 @@
#include <linux/kvm_irqfd.h>
#include <linux/irqbypass.h>
#include <linux/sched/stat.h>
+#include <linux/sched/isolation.h>
#include <linux/mem_encrypt.h>

#include <trace/events/kvm.h>
@@ -155,6 +156,9 @@ EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
static bool __read_mostly force_emulation_prefix = false;
module_param(force_emulation_prefix, bool, S_IRUGO);

+bool __read_mostly pi_inject_timer = 0;
+module_param(pi_inject_timer, bool, S_IRUGO | S_IWUSR);
+
#define KVM_NR_SHARED_MSRS 16

struct kvm_shared_msrs_global {
@@ -7030,6 +7034,7 @@ int kvm_arch_init(void *opaque)
host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);

kvm_lapic_init();
+ pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
#ifdef CONFIG_X86_64
pvclock_gtod_register_notifier(&pvclock_gtod_notifier);

diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 275b3b6..aa539d6 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -296,6 +296,8 @@ extern unsigned int min_timer_period_us;

extern bool enable_vmware_backdoor;

+extern bool pi_inject_timer;
+
extern struct static_key kvm_no_apic_vcpu;

static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
diff --git a/include/linux/sched/isolation.h b/include/linux/sched/isolation.h
index b0fb144..6fc5407 100644
--- a/include/linux/sched/isolation.h
+++ b/include/linux/sched/isolation.h
@@ -19,6 +19,7 @@ enum hk_flags {
DECLARE_STATIC_KEY_FALSE(housekeeping_overridden);
extern int housekeeping_any_cpu(enum hk_flags flags);
extern const struct cpumask *housekeeping_cpumask(enum hk_flags flags);
+extern bool housekeeping_enabled(enum hk_flags flags);
extern void housekeeping_affine(struct task_struct *t, enum hk_flags flags);
extern bool housekeeping_test_cpu(int cpu, enum hk_flags flags);
extern void __init housekeeping_init(void);
@@ -38,6 +39,7 @@ static inline const struct cpumask *housekeeping_cpumask(enum hk_flags flags)
static inline void housekeeping_affine(struct task_struct *t,
enum hk_flags flags) { }
static inline void housekeeping_init(void) { }
+static inline bool housekeeping_enabled(enum hk_flags flags) { }
#endif /* CONFIG_CPU_ISOLATION */

static inline bool housekeeping_cpu(int cpu, enum hk_flags flags)
diff --git a/kernel/sched/isolation.c b/kernel/sched/isolation.c
index 123ea07..ccb2808 100644
--- a/kernel/sched/isolation.c
+++ b/kernel/sched/isolation.c
@@ -14,6 +14,12 @@ EXPORT_SYMBOL_GPL(housekeeping_overridden);
static cpumask_var_t housekeeping_mask;
static unsigned int housekeeping_flags;

+bool housekeeping_enabled(enum hk_flags flags)
+{
+ return !!(housekeeping_flags & flags);
+}
+EXPORT_SYMBOL_GPL(housekeeping_enabled);
+
int housekeeping_any_cpu(enum hk_flags flags)
{
if (static_branch_unlikely(&housekeeping_overridden))
--
2.7.4

2019-06-11 12:27:45

by Wanpeng Li

[permalink] [raw]
Subject: [PATCH v3 4/4] KVM: LAPIC: add advance timer support to pi_inject_timer

From: Wanpeng Li <[email protected]>

Wait before calling posted-interrupt deliver function directly to add
advance timer support to pi_inject_timer.

Cc: Paolo Bonzini <[email protected]>
Cc: Radim Krčmář <[email protected]>
Signed-off-by: Wanpeng Li <[email protected]>
---
arch/x86/kvm/lapic.c | 6 ++++--
arch/x86/kvm/lapic.h | 2 +-
arch/x86/kvm/svm.c | 2 +-
arch/x86/kvm/vmx/vmx.c | 2 +-
4 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index c21bab2..8f1fc94 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1470,6 +1470,8 @@ static void apic_timer_expired(struct kvm_lapic *apic)
return;

if (can_posted_interrupt_inject_timer(apic->vcpu)) {
+ if (apic->lapic_timer.timer_advance_ns)
+ kvm_wait_lapic_expire(vcpu, true);
kvm_apic_inject_pending_timer_irqs(apic);
return;
}
@@ -1561,7 +1563,7 @@ static inline void adjust_lapic_timer_advance(struct kvm_vcpu *vcpu,
apic->lapic_timer.timer_advance_ns = timer_advance_ns;
}

-void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu)
+void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu, bool pi_inject)
{
struct kvm_lapic *apic = vcpu->arch.apic;
u64 guest_tsc, tsc_deadline;
@@ -1569,7 +1571,7 @@ void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu)
if (apic->lapic_timer.expired_tscdeadline == 0)
return;

- if (!lapic_timer_int_injected(vcpu))
+ if (!lapic_timer_int_injected(vcpu) && !pi_inject)
return;

tsc_deadline = apic->lapic_timer.expired_tscdeadline;
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 7b85a7c..4520164 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -220,7 +220,7 @@ static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)

bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);

-void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu);
+void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu, bool pi_inject);

bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
struct kvm_vcpu **dest_vcpu);
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 302cb40..049ba64 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -5648,7 +5648,7 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu)

if (lapic_in_kernel(vcpu) &&
vcpu->arch.apic->lapic_timer.timer_advance_ns)
- kvm_wait_lapic_expire(vcpu);
+ kvm_wait_lapic_expire(vcpu, false);

/*
* If this vCPU has touched SPEC_CTRL, restore the guest's value if
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 6d3c0b1..155aba6 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -6447,7 +6447,7 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu)

if (lapic_in_kernel(vcpu) &&
vcpu->arch.apic->lapic_timer.timer_advance_ns)
- kvm_wait_lapic_expire(vcpu);
+ kvm_wait_lapic_expire(vcpu, false);

/*
* If this vCPU has touched SPEC_CTRL, restore the guest's value if
--
2.7.4

2019-06-12 01:02:49

by Marcelo Tosatti

[permalink] [raw]
Subject: Re: [PATCH v3 1/4] KVM: LAPIC: Make lapic timer unpinned when timer is injected by pi

On Tue, Jun 11, 2019 at 08:17:06PM +0800, Wanpeng Li wrote:
> From: Wanpeng Li <[email protected]>
>
> Make lapic timer unpinned when timer is injected by posted-interrupt,
> the emulated timer can be offload to the housekeeping cpus.
>
> The host admin should fine tuned, e.g. dedicated instances scenario
> w/ nohz_full cover the pCPUs which vCPUs resident, several pCPUs
> surplus for housekeeping, disable mwait/hlt/pause vmexits to occupy
> the pCPUs, fortunately preemption timer is disabled after mwait is
> exposed to guest which makes emulated timer offload can be possible.

Li,

Nice!

I think you can drop the HRTIMER_MODE_ABS_PINNED and
instead have

void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
{
kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
kvm_vcpu_kick(vcpu);
}

As an alternative to commit 61abdbe0bcc2b32745ab4479cc550f4c1f518ee2
(as a first patch in your series).

This will make the logic simpler (and timer migration, for
nonhousekeeping case, ensures timer is migrated).

Also, should make this work for non housekeeping case as well.
(But that can be done later).

Thanks.

2019-06-12 01:06:05

by Marcelo Tosatti

[permalink] [raw]
Subject: Re: [PATCH v3 2/4] KVM: LAPIC: lapic timer interrupt is injected by posted interrupt

On Tue, Jun 11, 2019 at 08:17:07PM +0800, Wanpeng Li wrote:
> From: Wanpeng Li <[email protected]>
>
> Dedicated instances are currently disturbed by unnecessary jitter due
> to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
> There is no hardware virtual timer on Intel for guest like ARM. Both
> programming timer in guest and the emulated timer fires incur vmexits.
> This patch tries to avoid vmexit which is incurred by the emulated
> timer fires in dedicated instance scenario.
>
> When nohz_full is enabled in dedicated instances scenario, the emulated
> timers can be offload to the nearest busy housekeeping cpus since APICv
> is really common in recent years. The guest timer interrupt is injected
> by posted-interrupt which is delivered by housekeeping cpu once the emulated
> timer fires.
>
> ~3% redis performance benefit can be observed on Skylake server.
>
> w/o patch:
>
> VM-EXIT Samples Samples% Time% Min Time Max Time Avg time
>
> EXTERNAL_INTERRUPT 42916 49.43% 39.30% 0.47us 106.09us 0.71us ( +- 1.09% )
>
> w/ patch:
>
> VM-EXIT Samples Samples% Time% Min Time Max Time Avg time
>
> EXTERNAL_INTERRUPT 6871 9.29% 2.96% 0.44us 57.88us 0.72us ( +- 4.02% )
>
> Cc: Paolo Bonzini <[email protected]>
> Cc: Radim Krčmář <[email protected]>
> Signed-off-by: Wanpeng Li <[email protected]>
> ---
> arch/x86/kvm/lapic.c | 32 +++++++++++++++++++++++++-------
> 1 file changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index e57eeba..020599f 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -133,6 +133,12 @@ inline bool posted_interrupt_inject_timer_enabled(struct kvm_vcpu *vcpu)
> }
> EXPORT_SYMBOL_GPL(posted_interrupt_inject_timer_enabled);
>
> +static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
> +{
> + return posted_interrupt_inject_timer_enabled(vcpu) &&
> + kvm_hlt_in_guest(vcpu->kvm);
> +}

Hi Li,

Don't think its necessary to depend on kvm_hlt_in_guest: Can also use
exitless injection if the guest is running (think DPDK style workloads
that busy-spin on network card).

2019-06-12 07:19:12

by Wanpeng Li

[permalink] [raw]
Subject: Re: [PATCH v3 1/4] KVM: LAPIC: Make lapic timer unpinned when timer is injected by pi

On Wed, 12 Jun 2019 at 04:39, Marcelo Tosatti <[email protected]> wrote:
>
> On Tue, Jun 11, 2019 at 08:17:06PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li <[email protected]>
> >
> > Make lapic timer unpinned when timer is injected by posted-interrupt,
> > the emulated timer can be offload to the housekeeping cpus.
> >
> > The host admin should fine tuned, e.g. dedicated instances scenario
> > w/ nohz_full cover the pCPUs which vCPUs resident, several pCPUs
> > surplus for housekeeping, disable mwait/hlt/pause vmexits to occupy
> > the pCPUs, fortunately preemption timer is disabled after mwait is
> > exposed to guest which makes emulated timer offload can be possible.
>
> Li,
>
> Nice!
>
> I think you can drop the HRTIMER_MODE_ABS_PINNED and
> instead have
>
> void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
> {
> kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
> kvm_vcpu_kick(vcpu);
> }
>
> As an alternative to commit 61abdbe0bcc2b32745ab4479cc550f4c1f518ee2
> (as a first patch in your series).
>
> This will make the logic simpler (and timer migration, for
> nonhousekeeping case, ensures timer is migrated).

Good point. :)

>
> Also, should make this work for non housekeeping case as well.
> (But that can be done later).

The timer fire may cause other vCPUs vmexits for non housekeeping
case(after migrating timers fail during vCPU is scheduled to run in a
different pCPU). Could you explain more?

Regards,
Wanpeng Li

2019-06-12 07:23:55

by Wanpeng Li

[permalink] [raw]
Subject: Re: [PATCH v3 2/4] KVM: LAPIC: lapic timer interrupt is injected by posted interrupt

On Wed, 12 Jun 2019 at 04:39, Marcelo Tosatti <[email protected]> wrote:
>
> On Tue, Jun 11, 2019 at 08:17:07PM +0800, Wanpeng Li wrote:
> > From: Wanpeng Li <[email protected]>
> >
> > Dedicated instances are currently disturbed by unnecessary jitter due
> > to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
> > There is no hardware virtual timer on Intel for guest like ARM. Both
> > programming timer in guest and the emulated timer fires incur vmexits.
> > This patch tries to avoid vmexit which is incurred by the emulated
> > timer fires in dedicated instance scenario.
> >
> > When nohz_full is enabled in dedicated instances scenario, the emulated
> > timers can be offload to the nearest busy housekeeping cpus since APICv
> > is really common in recent years. The guest timer interrupt is injected
> > by posted-interrupt which is delivered by housekeeping cpu once the emulated
> > timer fires.
> >
> > ~3% redis performance benefit can be observed on Skylake server.
> >
> > w/o patch:
> >
> > VM-EXIT Samples Samples% Time% Min Time Max Time Avg time
> >
> > EXTERNAL_INTERRUPT 42916 49.43% 39.30% 0.47us 106.09us 0.71us ( +- 1.09% )
> >
> > w/ patch:
> >
> > VM-EXIT Samples Samples% Time% Min Time Max Time Avg time
> >
> > EXTERNAL_INTERRUPT 6871 9.29% 2.96% 0.44us 57.88us 0.72us ( +- 4.02% )
> >
> > Cc: Paolo Bonzini <[email protected]>
> > Cc: Radim Krčmář <[email protected]>
> > Signed-off-by: Wanpeng Li <[email protected]>
> > ---
> > arch/x86/kvm/lapic.c | 32 +++++++++++++++++++++++++-------
> > 1 file changed, 25 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > index e57eeba..020599f 100644
> > --- a/arch/x86/kvm/lapic.c
> > +++ b/arch/x86/kvm/lapic.c
> > @@ -133,6 +133,12 @@ inline bool posted_interrupt_inject_timer_enabled(struct kvm_vcpu *vcpu)
> > }
> > EXPORT_SYMBOL_GPL(posted_interrupt_inject_timer_enabled);
> >
> > +static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
> > +{
> > + return posted_interrupt_inject_timer_enabled(vcpu) &&
> > + kvm_hlt_in_guest(vcpu->kvm);
> > +}
>
> Hi Li,

Hi Marcelo,

>
> Don't think its necessary to depend on kvm_hlt_in_guest: Can also use
> exitless injection if the guest is running (think DPDK style workloads
> that busy-spin on network card).
>

There are some discussions here.

https://lkml.org/lkml/2019/6/11/424
https://lkml.org/lkml/2019/6/5/436

Regards,
Wanpeng Li

2019-06-12 18:05:54

by Radim Krčmář

[permalink] [raw]
Subject: Re: [PATCH v3 2/4] KVM: LAPIC: lapic timer interrupt is injected by posted interrupt

2019-06-12 09:48+0800, Wanpeng Li:
> On Wed, 12 Jun 2019 at 04:39, Marcelo Tosatti <[email protected]> wrote:
> > On Tue, Jun 11, 2019 at 08:17:07PM +0800, Wanpeng Li wrote:
> > > From: Wanpeng Li <[email protected]>
> > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > > @@ -133,6 +133,12 @@ inline bool posted_interrupt_inject_timer_enabled(struct kvm_vcpu *vcpu)
> > > }
> > > EXPORT_SYMBOL_GPL(posted_interrupt_inject_timer_enabled);
> > >
> > > +static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
> > > +{
> > > + return posted_interrupt_inject_timer_enabled(vcpu) &&
> > > + kvm_hlt_in_guest(vcpu->kvm);
> > > +}
> >
> > Hi Li,
>
> Hi Marcelo,
>
> >
> > Don't think its necessary to depend on kvm_hlt_in_guest: Can also use
> > exitless injection if the guest is running (think DPDK style workloads
> > that busy-spin on network card).

I agree.

> There are some discussions here.
>
> https://lkml.org/lkml/2019/6/11/424
> https://lkml.org/lkml/2019/6/5/436

Paolo wants to disable the APF synthetic halt first, which I think is
unrelated to the timer implementation.
The synthetic halt happens when the VCPU cannot progress because the
host swapped out its memory and any asynchronous event should unhalt it,
because we assume that the interrupt path wasn't swapped out.

The posted interrupt does a swake_up_one (part of vcpu kick), which is
everything what the non-posted path does after setting a KVM request --
it's a bug if we later handle the PIR differently from the KVM request,
so the guest is going to be woken up on any halt blocking in KVM (even
synthetic APF halt).

Paolo, have I missed the point?

Thanks.

2019-06-12 18:07:52

by Marcelo Tosatti

[permalink] [raw]
Subject: Re: [PATCH v3 1/4] KVM: LAPIC: Make lapic timer unpinned when timer is injected by pi

On Wed, Jun 12, 2019 at 08:45:10AM +0800, Wanpeng Li wrote:
> On Wed, 12 Jun 2019 at 04:39, Marcelo Tosatti <[email protected]> wrote:
> >
> > On Tue, Jun 11, 2019 at 08:17:06PM +0800, Wanpeng Li wrote:
> > > From: Wanpeng Li <[email protected]>
> > >
> > > Make lapic timer unpinned when timer is injected by posted-interrupt,
> > > the emulated timer can be offload to the housekeeping cpus.
> > >
> > > The host admin should fine tuned, e.g. dedicated instances scenario
> > > w/ nohz_full cover the pCPUs which vCPUs resident, several pCPUs
> > > surplus for housekeeping, disable mwait/hlt/pause vmexits to occupy
> > > the pCPUs, fortunately preemption timer is disabled after mwait is
> > > exposed to guest which makes emulated timer offload can be possible.
> >
> > Li,
> >
> > Nice!
> >
> > I think you can drop the HRTIMER_MODE_ABS_PINNED and
> > instead have
> >
> > void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
> > {
> > kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
> > kvm_vcpu_kick(vcpu);
> > }
> >
> > As an alternative to commit 61abdbe0bcc2b32745ab4479cc550f4c1f518ee2
> > (as a first patch in your series).
> >
> > This will make the logic simpler (and timer migration, for
> > nonhousekeeping case, ensures timer is migrated).
>
> Good point. :)

Actually should probably revisit the KVM_REQ_PENDING_TIMER logic,
and only use the LAPIC injection to avoid guest entry,
and use LAPIC's vcpu_kick as well.

> > Also, should make this work for non housekeeping case as well.
> > (But that can be done later).
>
> The timer fire may cause other vCPUs vmexits for non housekeeping
> case(after migrating timers fail during vCPU is scheduled to run in a
> different pCPU).

There should be no timer migration fail in the non housekeeping case?

> Could you explain more?

Would have to find an optimal placement of interrupt handlers and vcpus.

Say, if a socket has 4 pcpus, and 3 vcpus, the free pcpu could house
the interrupt handlers.

But can start with housekeeping structure, then later find a solution
for nonhousekeeping.

2019-06-13 15:42:45

by Maxim Levitsky

[permalink] [raw]
Subject: Re: [PATCH v3 0/4] KVM: LAPIC: Implement Exitless Timer

On Thu, 2019-06-13 at 16:25 +0800, Wanpeng Li wrote:
> On Thu, 13 Jun 2019 at 15:59, Maxim Levitsky <[email protected]> wrote:
> >
> > On Tue, 2019-06-11 at 20:17 +0800, Wanpeng Li wrote:
> > > Dedicated instances are currently disturbed by unnecessary jitter due
> > > to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
> > > There is no hardware virtual timer on Intel for guest like ARM. Both
> > > programming timer in guest and the emulated timer fires incur vmexits.
> > > This patchset tries to avoid vmexit which is incurred by the emulated
> > > timer fires in dedicated instance scenario.
> > >
> > > When nohz_full is enabled in dedicated instances scenario, the unpinned
> > > timer will be moved to the nearest busy housekeepers after commit 444969223c8
> > > ("sched/nohz: Fix affine unpinned timers mess"). However, KVM always makes
> > > lapic timer pinned to the pCPU which vCPU residents, the reason is explained
> > > by commit 61abdbe0 (kvm: x86: make lapic hrtimer pinned). Actually, these
> > > emulated timers can be offload to the housekeeping cpus since APICv
> > > is really common in recent years. The guest timer interrupt is injected by
> > > posted-interrupt which is delivered by housekeeping cpu once the emulated
> > > timer fires.
> > >
> > > The host admin should fine tuned, e.g. dedicated instances scenario w/
> > > nohz_full cover the pCPUs which vCPUs resident, several pCPUs surplus
> > > for housekeeping, disable mwait/hlt/pause vmexits to occupy the pCPUs,
> > > fortunately preemption timer is disabled after mwait is exposed to
> > > guest which makes emulated timer offload can be possible.
> > > ~3% redis performance benefit can be observed on Skylake server.
> >
> > I don't yet know the kvm well enough to review this patch series, but overall I really like the idea.
>
> Thank you. :)
>
> > I researched this area some time ago, to see what can be done to reduce the number of vmexits,
> > to an absolute minimum.
> >
> > I have one small question, just out of curiosity.
> >
> > Why do you require mwait in the guest to be enabled?
> >
> > If I understand it correctly, you say
> > that when mwait in the guest is disabled, then vmx preemption timer will be used,
> > and thus it will handle the apic timer?
>
> Actually we don't have this restriction in v3, the patchset
> description need to update. The lapic timer which guest use can be
> emulated by software(a hrtimer on host) or VT-x hardware (VMX
> preemption timer). VMX preemption timer triggers vmexit when the timer
> fires on the same pCPU which vCPU is running on, so the injection
> vmexit can't be avoided. The hrtimer on host is used to emulate the
> lapic timer when VMX preemption timer is disabled. After commit
> 9642d18eee2cd(nohz: Affine unpinned timers to housekeepers), unpinned
> timers will be moved to nearest busy housekeepers, which means that we
> can offload the hrtimer to the housekeeping cpus instead of running on
> the pCPU which vCPU residents, the timer fires on the housekeeping
> cpus and be injected by posted-interrupt to the vCPU w/o incur
> vmexits. In patchset v3, the preemption timer will be disarmed if
> lapic timer is injected by posted-interrupt. VMX preemption timer stop
> working in C-states deeper than C2, that's why I utilize mwait expose
> before. (commit 386c6ddbda1 X86/VMX: Disable VMX preemption timer if
> MWAIT is not intercepted)

That explains it very well. Thank you!

Best regards,
Maxim Levitsky

2019-06-13 16:33:21

by Wanpeng Li

[permalink] [raw]
Subject: Re: [PATCH v3 0/4] KVM: LAPIC: Implement Exitless Timer

On Thu, 13 Jun 2019 at 15:59, Maxim Levitsky <[email protected]> wrote:
>
> On Tue, 2019-06-11 at 20:17 +0800, Wanpeng Li wrote:
> > Dedicated instances are currently disturbed by unnecessary jitter due
> > to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
> > There is no hardware virtual timer on Intel for guest like ARM. Both
> > programming timer in guest and the emulated timer fires incur vmexits.
> > This patchset tries to avoid vmexit which is incurred by the emulated
> > timer fires in dedicated instance scenario.
> >
> > When nohz_full is enabled in dedicated instances scenario, the unpinned
> > timer will be moved to the nearest busy housekeepers after commit 444969223c8
> > ("sched/nohz: Fix affine unpinned timers mess"). However, KVM always makes
> > lapic timer pinned to the pCPU which vCPU residents, the reason is explained
> > by commit 61abdbe0 (kvm: x86: make lapic hrtimer pinned). Actually, these
> > emulated timers can be offload to the housekeeping cpus since APICv
> > is really common in recent years. The guest timer interrupt is injected by
> > posted-interrupt which is delivered by housekeeping cpu once the emulated
> > timer fires.
> >
> > The host admin should fine tuned, e.g. dedicated instances scenario w/
> > nohz_full cover the pCPUs which vCPUs resident, several pCPUs surplus
> > for housekeeping, disable mwait/hlt/pause vmexits to occupy the pCPUs,
> > fortunately preemption timer is disabled after mwait is exposed to
> > guest which makes emulated timer offload can be possible.
> > ~3% redis performance benefit can be observed on Skylake server.
>
> I don't yet know the kvm well enough to review this patch series, but overall I really like the idea.

Thank you. :)

> I researched this area some time ago, to see what can be done to reduce the number of vmexits,
> to an absolute minimum.
>
> I have one small question, just out of curiosity.
>
> Why do you require mwait in the guest to be enabled?
>
> If I understand it correctly, you say
> that when mwait in the guest is disabled, then vmx preemption timer will be used,
> and thus it will handle the apic timer?

Actually we don't have this restriction in v3, the patchset
description need to update. The lapic timer which guest use can be
emulated by software(a hrtimer on host) or VT-x hardware (VMX
preemption timer). VMX preemption timer triggers vmexit when the timer
fires on the same pCPU which vCPU is running on, so the injection
vmexit can't be avoided. The hrtimer on host is used to emulate the
lapic timer when VMX preemption timer is disabled. After commit
9642d18eee2cd(nohz: Affine unpinned timers to housekeepers), unpinned
timers will be moved to nearest busy housekeepers, which means that we
can offload the hrtimer to the housekeeping cpus instead of running on
the pCPU which vCPU residents, the timer fires on the housekeeping
cpus and be injected by posted-interrupt to the vCPU w/o incur
vmexits. In patchset v3, the preemption timer will be disarmed if
lapic timer is injected by posted-interrupt. VMX preemption timer stop
working in C-states deeper than C2, that's why I utilize mwait expose
before. (commit 386c6ddbda1 X86/VMX: Disable VMX preemption timer if
MWAIT is not intercepted)

Regards,
Wanpeng Li

2019-06-13 16:34:04

by Maxim Levitsky

[permalink] [raw]
Subject: Re: [PATCH v3 0/4] KVM: LAPIC: Implement Exitless Timer

On Tue, 2019-06-11 at 20:17 +0800, Wanpeng Li wrote:
> Dedicated instances are currently disturbed by unnecessary jitter due
> to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
> There is no hardware virtual timer on Intel for guest like ARM. Both
> programming timer in guest and the emulated timer fires incur vmexits.
> This patchset tries to avoid vmexit which is incurred by the emulated
> timer fires in dedicated instance scenario.
>
> When nohz_full is enabled in dedicated instances scenario, the unpinned
> timer will be moved to the nearest busy housekeepers after commit 444969223c8
> ("sched/nohz: Fix affine unpinned timers mess"). However, KVM always makes
> lapic timer pinned to the pCPU which vCPU residents, the reason is explained
> by commit 61abdbe0 (kvm: x86: make lapic hrtimer pinned). Actually, these
> emulated timers can be offload to the housekeeping cpus since APICv
> is really common in recent years. The guest timer interrupt is injected by
> posted-interrupt which is delivered by housekeeping cpu once the emulated
> timer fires.
>
> The host admin should fine tuned, e.g. dedicated instances scenario w/
> nohz_full cover the pCPUs which vCPUs resident, several pCPUs surplus
> for housekeeping, disable mwait/hlt/pause vmexits to occupy the pCPUs,
> fortunately preemption timer is disabled after mwait is exposed to
> guest which makes emulated timer offload can be possible.
> ~3% redis performance benefit can be observed on Skylake server.

I don't yet know the kvm well enough to review this patch series, but overall I really like the idea.
I researched this area some time ago, to see what can be done to reduce the number of vmexits,
to an absolute minimum.

I have one small question, just out of curiosity.

Why do you require mwait in the guest to be enabled?

If I understand it correctly, you say
that when mwait in the guest is disabled, then vmx preemption timer will be used,
and thus it will handle the apic timer?

Best regards,
Maxim Levitsky

2019-06-13 22:56:15

by Marcelo Tosatti

[permalink] [raw]
Subject: Re: [PATCH v3 2/4] KVM: LAPIC: lapic timer interrupt is injected by posted interrupt

On Wed, Jun 12, 2019 at 05:22:31PM +0200, Radim Krčmář wrote:
> 2019-06-12 09:48+0800, Wanpeng Li:
> > On Wed, 12 Jun 2019 at 04:39, Marcelo Tosatti <[email protected]> wrote:
> > > On Tue, Jun 11, 2019 at 08:17:07PM +0800, Wanpeng Li wrote:
> > > > From: Wanpeng Li <[email protected]>
> > > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> > > > @@ -133,6 +133,12 @@ inline bool posted_interrupt_inject_timer_enabled(struct kvm_vcpu *vcpu)
> > > > }
> > > > EXPORT_SYMBOL_GPL(posted_interrupt_inject_timer_enabled);
> > > >
> > > > +static inline bool can_posted_interrupt_inject_timer(struct kvm_vcpu *vcpu)
> > > > +{
> > > > + return posted_interrupt_inject_timer_enabled(vcpu) &&
> > > > + kvm_hlt_in_guest(vcpu->kvm);
> > > > +}
> > >
> > > Hi Li,
> >
> > Hi Marcelo,
> >
> > >
> > > Don't think its necessary to depend on kvm_hlt_in_guest: Can also use
> > > exitless injection if the guest is running (think DPDK style workloads
> > > that busy-spin on network card).
>
> I agree.
>
> > There are some discussions here.
> >
> > https://lkml.org/lkml/2019/6/11/424
> > https://lkml.org/lkml/2019/6/5/436
>
> Paolo wants to disable the APF synthetic halt first, which I think is
> unrelated to the timer implementation.
> The synthetic halt happens when the VCPU cannot progress because the
> host swapped out its memory and any asynchronous event should unhalt it,
> because we assume that the interrupt path wasn't swapped out.
>
> The posted interrupt does a swake_up_one (part of vcpu kick), which is
> everything what the non-posted path does after setting a KVM request --
> it's a bug if we later handle the PIR differently from the KVM request,
> so the guest is going to be woken up on any halt blocking in KVM (even
> synthetic APF halt).
>
> Paolo, have I missed the point?
>
> Thanks.

"Here you need to check kvm_halt_in_guest, not kvm_mwait_in_guest,
because you need to go through kvm_apic_expired if the guest needs to be
woken up from kvm_vcpu_block."

Note: VMX preemption timer is disabled by Li's patch.