2020-09-09 12:05:07

by Andrew Jeffery

Subject: [PATCH 0/3] pinctrl: aspeed: AST2600 pinconf fixes

Hello,

The AST2600 pinctrl driver was missing support for bias control on the 1.8V
GPIO pins, and in the process of resolving that I discovered a couple of other
bugs that are fixed in the first two patches of the series.

Please review!

Andrew

Andrew Jeffery (3):
pinctrl: aspeed: Format pinconf debug consistent with pinmux
pinctrl: aspeed: Use the right pinconf mask
pinctrl: aspeed-g6: Add bias controls for 1.8V GPIO banks

drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 17 +++++++++++++++++
drivers/pinctrl/aspeed/pinctrl-aspeed.c | 8 ++++----
2 files changed, 21 insertions(+), 4 deletions(-)

--
2.25.1

2020-09-09 12:06:45

by Andrew Jeffery

Subject: [PATCH 1/3] pinctrl: aspeed: Format pinconf debug consistent with pinmux

When displaying which pinconf register and field is being touched, format the
field mask so that it's consistent with the way the pinmux portion
formats the mask.

Signed-off-by: Andrew Jeffery <[email protected]>
---
drivers/pinctrl/aspeed/pinctrl-aspeed.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
index 53f3f8aec695..d8972911d505 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
@@ -539,9 +539,9 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
if (rc < 0)
return rc;

- pr_debug("%s: Set SCU%02X[%lu]=%d for param %d(=%d) on pin %d\n",
- __func__, pconf->reg, __ffs(pconf->mask),
- pmap->val, param, arg, offset);
+ pr_debug("%s: Set SCU%02X[0x%08X]=%d for param %d(=%d) on pin %d\n",
+ __func__, pconf->reg, pconf->mask,
+ val, param, arg, offset);
}

return 0;
--
2.25.1

2020-09-10 02:06:53

by Joel Stanley

Subject: Re: [PATCH 1/3] pinctrl: aspeed: Format pinconf debug consistent with pinmux

On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery <[email protected]> wrote:
>
> When displaying which pinconf register and field is being touched, format the
> field mask so that it's consistent with the way the pinmux portion
> formats the mask.
>
> Signed-off-by: Andrew Jeffery <[email protected]>
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> index 53f3f8aec695..d8972911d505 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> @@ -539,9 +539,9 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
> if (rc < 0)
> return rc;
>
> - pr_debug("%s: Set SCU%02X[%lu]=%d for param %d(=%d) on pin %d\n",
> - __func__, pconf->reg, __ffs(pconf->mask),
> - pmap->val, param, arg, offset);
> + pr_debug("%s: Set SCU%02X[0x%08X]=%d for param %d(=%d) on pin %d\n",


The pr_debug in pinmux-aspeed.c prints val as 0x%X. Did you want to do
that here?

> + __func__, pconf->reg, pconf->mask,
> + val, param, arg, offset);
> }
>
> return 0;
> --
> 2.25.1
>

2020-09-10 02:18:28

by Andrew Jeffery

Subject: Re: [PATCH 1/3] pinctrl: aspeed: Format pinconf debug consistent with pinmux

On Thu, 10 Sep 2020, at 11:22, Joel Stanley wrote:
> On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery <[email protected]> wrote:
> >
> > When displaying which pinconf register and field is being touched, format the
> > field mask so that it's consistent with the way the pinmux portion
> > formats the mask.
> >
> > Signed-off-by: Andrew Jeffery <[email protected]>
> > ---
> > drivers/pinctrl/aspeed/pinctrl-aspeed.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> > index 53f3f8aec695..d8972911d505 100644
> > --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> > +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> > @@ -539,9 +539,9 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
> > if (rc < 0)
> > return rc;
> >
> > - pr_debug("%s: Set SCU%02X[%lu]=%d for param %d(=%d) on pin %d\n",
> > - __func__, pconf->reg, __ffs(pconf->mask),
> > - pmap->val, param, arg, offset);
> > + pr_debug("%s: Set SCU%02X[0x%08X]=%d for param %d(=%d) on pin %d\n",
>
>
> The pr_debug in pinmux-aspeed.c prints val as 0x%X. Did you want to do
> that here?

Fair point, I'll do a v2.

Andrew

2020-09-29 12:27:52

by Linus Walleij

Subject: Re: [PATCH 0/3] pinctrl: aspeed: AST2600 pinconf fixes

On Wed, Sep 9, 2020 at 1:43 PM Andrew Jeffery <[email protected]> wrote:

> The AST2600 pinctrl driver was missing support for bias control on the 1.8V
> GPIO pins, and in the process of resolving that I discovered a couple of other
> bugs that are fixed in the first two patches of the series.

All 3 patches applied.

Yours,
Linus Walleij