2019-03-22 21:56:44

by Atish Patra

Subject: [PATCH] clocksource/drivers/riscv: Fix clocksource mask

For all riscv architectures (RV32, RV64 and RV128), the clocksource
is a 64 bit incrementing counter.

Fix the clock source mask accordingly.

Tested on both 64bit and 32 bit virt machine in QEMU.

Signed-off-by: Atish Patra <[email protected]>
---
drivers/clocksource/timer-riscv.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index e8163693..5e6038fb 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -58,7 +58,7 @@ static u64 riscv_sched_clock(void)
static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
.name = "riscv_clocksource",
.rating = 300,
- .mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
+ .mask = CLOCKSOURCE_MASK(64),
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
.read = riscv_clocksource_rdtime,
};
@@ -120,8 +120,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
return error;
}

- sched_clock_register(riscv_sched_clock,
- BITS_PER_LONG, riscv_timebase);
+ sched_clock_register(riscv_sched_clock, 64, riscv_timebase);

error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
"clockevents/riscv/timer:starting",
--
2.21.0

2019-03-23 11:17:57

by Anup Patel

Subject: Re: [PATCH] clocksource/drivers/riscv: Fix clocksource mask

On Sat, Mar 23, 2019 at 3:24 AM Atish Patra <[email protected]> wrote:
>
> For all riscv architectures (RV32, RV64 and RV128), the clocksource
> is a 64 bit incrementing counter.
>
> Fix the clock source mask accordingly.
>
> Tested on both 64bit and 32 bit virt machine in QEMU.
>
> Signed-off-by: Atish Patra <[email protected]>
> ---
> drivers/clocksource/timer-riscv.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index e8163693..5e6038fb 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -58,7 +58,7 @@ static u64 riscv_sched_clock(void)
> static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
> .name = "riscv_clocksource",
> .rating = 300,
> - .mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
> + .mask = CLOCKSOURCE_MASK(64),
> .flags = CLOCK_SOURCE_IS_CONTINUOUS,
> .read = riscv_clocksource_rdtime,
> };
> @@ -120,8 +120,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> return error;
> }
>
> - sched_clock_register(riscv_sched_clock,
> - BITS_PER_LONG, riscv_timebase);
> + sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
>
> error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
> "clockevents/riscv/timer:starting",
> --
> 2.21.0
>

Looks good to me.

It would be great if you can add "Fixes:" line and
"Cc: [email protected]"

Reviewed-by: Anup Patel <[email protected]>

Regards,
Anup

2019-03-23 11:29:08

by tip-bot for Vasyl Gomonovych

Subject: [tip:timers/urgent] clocksource/drivers/riscv: Fix clocksource mask

Commit-ID: 32d0be018f6f5ee2d5d19c4795304613560814cf
Gitweb: https://git.kernel.org/tip/32d0be018f6f5ee2d5d19c4795304613560814cf
Author: Atish Patra <[email protected]>
AuthorDate: Fri, 22 Mar 2019 14:54:11 -0700
Committer: Thomas Gleixner <[email protected]>
CommitDate: Sat, 23 Mar 2019 12:25:34 +0100

clocksource/drivers/riscv: Fix clocksource mask

For all riscv architectures (RV32, RV64 and RV128), the clocksource
is a 64 bit incrementing counter.

Fix the clock source mask accordingly.

Tested on both 64bit and 32 bit virt machine in QEMU.

Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")
Signed-off-by: Atish Patra <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Cc: Albert Ou <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Cc: [email protected]
Cc: Palmer Dabbelt <[email protected]>
Cc: Anup Patel <[email protected]>
Cc: Damien Le Moal <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]

---
drivers/clocksource/timer-riscv.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index e8163693e936..5e6038fbf115 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -58,7 +58,7 @@ static u64 riscv_sched_clock(void)
static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
.name = "riscv_clocksource",
.rating = 300,
- .mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
+ .mask = CLOCKSOURCE_MASK(64),
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
.read = riscv_clocksource_rdtime,
};
@@ -120,8 +120,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
return error;
}

- sched_clock_register(riscv_sched_clock,
- BITS_PER_LONG, riscv_timebase);
+ sched_clock_register(riscv_sched_clock, 64, riscv_timebase);

error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
"clockevents/riscv/timer:starting",