SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/[email protected]/
Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
commit e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc")
One small difference on SA8540P-ride, the PMIC register bank SDAM6 is
not writable, so use SDAM7 instead.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Eric Chanudet <[email protected]>
---
Changes in v2:
* Default pmm8540a_sdam_7 status to "disabled" in sa8540p-pmics.dtsi.
arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 11 ++++++++++-
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 15 +++++++++++++++
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
index 1221be89b3de..85a077619ae4 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
@@ -14,7 +14,7 @@ pmm8540a: pmic@0 {
#address-cells = <1>;
#size-cells = <0>;
- rtc@6000 {
+ pmm8540a_rtc: rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
@@ -22,6 +22,15 @@ rtc@6000 {
wakeup-source;
};
+ pmm8540a_sdam_7: nvram@b610 {
+ compatible = "qcom,spmi-sdam";
+ reg = <0xb610>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xb610 0xb0>;
+ status = "disabled";
+ };
+
pmm8540a_gpios: gpio@c000 {
compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index 5a26974dcf8f..608dd71a3f1c 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -407,6 +407,21 @@ &pcie3a_phy {
status = "okay";
};
+&pmm8540a_rtc {
+ nvmem-cells = <&rtc_offset>;
+ nvmem-cell-names = "offset";
+
+ status = "okay";
+};
+
+&pmm8540a_sdam_7 {
+ status = "okay";
+
+ rtc_offset: rtc-offset@ac {
+ reg = <0xac 0x4>;
+ };
+};
+
&qup0 {
status = "okay";
};
--
2.41.0
On Tue, Jul 18, 2023 at 10:46:10AM -0400, Eric Chanudet wrote:
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
[..]
> +&pmm8540a_sdam_7 {
> + status = "okay";
> +
> + rtc_offset: rtc-offset@ac {
> + reg = <0xac 0x4>;
I'm still trying to get confirmation that this is a good choice.
Regards,
Bjorn
On Fri, Jul 21, 2023 at 08:59:30PM -0700, Bjorn Andersson wrote:
> On Tue, Jul 18, 2023 at 10:46:10AM -0400, Eric Chanudet wrote:
> > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> [..]
> > +&pmm8540a_sdam_7 {
> > + status = "okay";
> > +
> > + rtc_offset: rtc-offset@ac {
> > + reg = <0xac 0x4>;
>
> I'm still trying to get confirmation that this is a good choice.
>
I'm recommended that you use 0xa0 from SDAM2, "preferably in the second
PMM8540", instead.
Can you please give this a try, Eric?
Regards,
Bjorn
On Tue, Aug 08, 2023 at 02:36:46PM -0700, Bjorn Andersson wrote:
> On Fri, Jul 21, 2023 at 08:59:30PM -0700, Bjorn Andersson wrote:
> > On Tue, Jul 18, 2023 at 10:46:10AM -0400, Eric Chanudet wrote:
> > > diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> > [..]
> > > +&pmm8540a_sdam_7 {
> > > + status = "okay";
> > > +
> > > + rtc_offset: rtc-offset@ac {
> > > + reg = <0xac 0x4>;
> >
> > I'm still trying to get confirmation that this is a good choice.
> >
>
> I'm recommended that you use 0xa0 from SDAM2, "preferably in the second
> PMM8540", instead.
>
> Can you please give this a try, Eric?
That worked, the offset was saved and read back upon rebooting from the
system. I did get a defer on some tests waiting for the second pmic,
which I presume is not surprising:
[ 0.257064] spmi spmi-0: PMIC arbiter version v5 (0x50020000)
[ 8.340386] platform c440000.spmi:pmic@0:rtc@6000: error -EPROBE_DEFER: wait for supplier /soc@0/spmi@c440000/pmic@4/nvram@b110/rtc-offset@a0
[ 8.393201] platform c440000.spmi:pmic@0:rtc@6000: error -EPROBE_DEFER: wait for supplier /soc@0/spmi@c440000/pmic@4/nvram@b110/rtc-offset@a0
[ 8.465407] rtc-pm8xxx c440000.spmi:pmic@0:rtc@6000: registered as rtc0
[ 8.479612] rtc-pm8xxx c440000.spmi:pmic@0:rtc@6000: setting system clock to 2023-08-09T19:16:08 UTC (1691608568)
Here is the v3 with the changes:
https://lore.kernel.org/linux-arm-msm/[email protected]
Thank you again for the feedback.
--
Eric Chanudet