Hi,
This series first adds device nodes for USB0_PHY_CTRL and USB1_PHY_CTRL
in the wkup_conf node and fixus up the USB nodes to use the newly
added nodes.
Then it adds USB support for AM62P SoC and AM62P5-SK board.
In v4, we drop the 2 new patches that were added in v3 to add the
missing PHY2 register space to the USB controller wrapper node.
Changelog in each patch.
cheers,
-roger
Roger Quadros (3):
dt-bindings: mfd: syscon: Add ti,am62-usb-phy-ctrl compatible
arm64: dts: ti: k3-am62/a: use sub-node for USB_PHY_CTRL registers
arm64: dts: ti: k3-am62p: add the USB sub-system
.../devicetree/bindings/mfd/syscon.yaml | 1 +
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 +-
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 +++
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 +-
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 +++
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 +++++++++++++
arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++
8 files changed, 148 insertions(+), 4 deletions(-)
base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
--
2.34.1
Exposing the entire CTRL_MMR space to syscon is not a good idea.
Add sub-nodes for USB0_PHY_CTRL and USB1_PHY_CTRL and use them
in the USB0/USB1 nodes.
Signed-off-by: Roger Quadros <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
---
Notes:
Changelog:
v4 - no change. Added Andrew's Reviewed-by
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- moved am62p changes to next patch
- use new compatible for USB PHY CTRL node
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 4 ++--
arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 10 ++++++++++
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 4 ++--
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 10 ++++++++++
4 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 464b7565d085..9432ed344d52 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -625,7 +625,7 @@ usbss0: dwc3-usb@f900000 {
reg = <0x00 0x0f900000 0x00 0x800>;
clocks = <&k3_clks 161 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+ ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -648,7 +648,7 @@ usbss1: dwc3-usb@f910000 {
reg = <0x00 0x0f910000 0x00 0x800>;
clocks = <&k3_clks 162 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+ ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
index fef76f52a52e..817700b2eacf 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi
@@ -19,6 +19,16 @@ chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
+
+ usb0_phy_ctrl: syscon@4008 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4008 0x4>;
+ };
+
+ usb1_phy_ctrl: syscon@4018 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4018 0x4>;
+ };
};
wkup_uart0: serial@2b300000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index f0b8c9ab1459..8311c7c44cd3 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -566,7 +566,7 @@ usbss0: dwc3-usb@f900000 {
reg = <0x00 0x0f900000 0x00 0x800>;
clocks = <&k3_clks 161 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
+ ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
@@ -589,7 +589,7 @@ usbss1: dwc3-usb@f910000 {
reg = <0x00 0x0f910000 0x00 0x800>;
clocks = <&k3_clks 162 3>;
clock-names = "ref";
- ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
+ ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
#address-cells = <2>;
#size-cells = <2>;
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index 4e8279fa01e1..4a375f5e0c19 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -17,6 +17,16 @@ chipid: chipid@14 {
compatible = "ti,am654-chipid";
reg = <0x14 0x4>;
};
+
+ usb0_phy_ctrl: syscon@4008 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4008 0x4>;
+ };
+
+ usb1_phy_ctrl: syscon@4018 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4018 0x4>;
+ };
};
wkup_uart0: serial@2b300000 {
--
2.34.1
There are two USB instances available on the am62p5 starter kit. Include
and enable them for use on the board.
Signed-off-by: Vignesh Raghavendra <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
---
Notes:
Changelog:
v4 - no change
v3 - no change
https://lore.kernel.org/all/[email protected]/
v2:
- added USB PHY CTRL node changes here
- changed USB wrapper node names to usb@
- changed Type-C chip node name to usb-power-control@
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++
arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++
3 files changed, 123 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 4c51bae06b57..17d28390d587 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 {
status = "disabled";
};
+ usbss0: usb@f900000 {
+ compatible = "ti,am62-usb";
+ reg = <0x00 0x0f900000 0x00 0x800>;
+ clocks = <&k3_clks 161 3>;
+ clock-names = "ref";
+ ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
+ ranges;
+ status = "disabled";
+
+ usb0: usb@31000000 {
+ compatible = "snps,dwc3";
+ reg = <0x00 0x31000000 0x00 0x50000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+ <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+ interrupt-names = "host", "peripheral";
+ maximum-speed = "high-speed";
+ dr_mode = "otg";
+ };
+ };
+
+ usbss1: usb@f910000 {
+ compatible = "ti,am62-usb";
+ reg = <0x00 0x0f910000 0x00 0x800>;
+ clocks = <&k3_clks 162 3>;
+ clock-names = "ref";
+ ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+ ranges;
+ status = "disabled";
+
+ usb1: usb@31100000 {
+ compatible = "snps,dwc3";
+ reg = <0x00 0x31100000 0x00 0x50000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+ <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
+ interrupt-names = "host", "peripheral";
+ maximum-speed = "high-speed";
+ dr_mode = "otg";
+ };
+ };
+
fss: bus@fc00000 {
compatible = "simple-bus";
reg = <0x00 0x0fc00000 0x00 0x70000>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
index 19f42b39394e..00dd38b02a52 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
@@ -18,6 +18,16 @@ chipid: chipid@14 {
reg = <0x14 0x4>;
bootph-all;
};
+
+ usb0_phy_ctrl: syscon@4008 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4008 0x4>;
+ };
+
+ usb1_phy_ctrl: syscon@4018 {
+ compatible = "ti,am62-usb-phy-ctrl", "syscon";
+ reg = <0x4018 0x4>;
+ };
};
wkup_uart0: serial@2b300000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 1773c05f752c..80be56c0a4e0 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -27,6 +27,8 @@ aliases {
spi0 = &ospi0;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
+ usb0 = &usb0;
+ usb1 = &usb1;
};
chosen {
@@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
bootph-all;
};
+ main_usb1_pins_default: main-usb1-default-pins {
+ pinctrl-single,pins = <
+ AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
+ >;
+ };
+
main_wlirq_pins_default: main-wlirq-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */
@@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
};
};
+&main_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
+ typec_pd0: usb-power-controller@3f {
+ compatible = "ti,tps6598x";
+ reg = <0x3f>;
+
+ connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ self-powered;
+ data-role = "dual";
+ power-role = "sink";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ usb_con_hs: endpoint {
+ remote-endpoint = <&usb0_hs_ep>;
+ };
+ };
+ };
+ };
+ };
+};
+
&main_i2c1 {
status = "okay";
pinctrl-names = "default";
@@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 {
};
};
+&usbss0 {
+ status = "okay";
+ ti,vbus-divider;
+};
+
+&usbss1 {
+ status = "okay";
+ ti,vbus-divider;
+};
+
+&usb0 {
+ usb-role-switch;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ usb0_hs_ep: endpoint {
+ remote-endpoint = <&usb_con_hs>;
+ };
+ };
+};
+
+&usb1 {
+ dr_mode = "host";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usb1_pins_default>;
+};
+
&mcasp1 {
status = "okay";
#sound-dai-cells = <0>;
--
2.34.1
Add the compatible for TI AM62 USB PHY Control register. This
register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It
is used to indicate the USB PHY PLL reference clock rate and
core voltage level to the USB controller.
[1] - https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Notes:
Changelog:
v4 - no change. Added Rob's Acked-by
v3 - add compatibles in alphabetical order
https://lore.kernel.org/all/[email protected]/
v2 - New patch
Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 084b5c2a2a3c..9437705af92f 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -72,6 +72,7 @@ properties:
- rockchip,rk3588-qos
- rockchip,rv1126-qos
- starfive,jh7100-sysmain
+ - ti,am62-usb-phy-ctrl
- ti,am654-dss-oldi-io-ctrl
- const: syscon
--
2.34.1
On 2/5/24 7:59 AM, Roger Quadros wrote:
> There are two USB instances available on the am62p5 starter kit. Include
> and enable them for use on the board.
>
> Signed-off-by: Vignesh Raghavendra <[email protected]>
> Signed-off-by: Roger Quadros <[email protected]>
> ---
>
> Notes:
> Changelog:
>
> v4 - no change
>
> v3 - no change
> https://lore.kernel.org/all/[email protected]/
>
> v2:
> - added USB PHY CTRL node changes here
> - changed USB wrapper node names to usb@
> - changed Type-C chip node name to usb-power-control@
>
> arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++
> arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++
> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++
> 3 files changed, 123 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> index 4c51bae06b57..17d28390d587 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> @@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 {
> status = "disabled";
> };
>
> + usbss0: usb@f900000 {
> + compatible = "ti,am62-usb";
> + reg = <0x00 0x0f900000 0x00 0x800>;
> + clocks = <&k3_clks 161 3>;
> + clock-names = "ref";
> + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
> + ranges;
> + status = "disabled";
> +
> + usb0: usb@31000000 {
> + compatible = "snps,dwc3";
> + reg = <0x00 0x31000000 0x00 0x50000>;
> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
> + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
> + interrupt-names = "host", "peripheral";
> + maximum-speed = "high-speed";
> + dr_mode = "otg";
> + };
> + };
> +
> + usbss1: usb@f910000 {
> + compatible = "ti,am62-usb";
> + reg = <0x00 0x0f910000 0x00 0x800>;
> + clocks = <&k3_clks 162 3>;
> + clock-names = "ref";
> + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
> + ranges;
> + status = "disabled";
> +
> + usb1: usb@31100000 {
> + compatible = "snps,dwc3";
> + reg = <0x00 0x31100000 0x00 0x50000>;
> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
> + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
> + interrupt-names = "host", "peripheral";
> + maximum-speed = "high-speed";
> + dr_mode = "otg";
> + };
> + };
> +
> fss: bus@fc00000 {
> compatible = "simple-bus";
> reg = <0x00 0x0fc00000 0x00 0x70000>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
> index 19f42b39394e..00dd38b02a52 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
> @@ -18,6 +18,16 @@ chipid: chipid@14 {
> reg = <0x14 0x4>;
> bootph-all;
> };
> +
> + usb0_phy_ctrl: syscon@4008 {
> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
> + reg = <0x4008 0x4>;
> + };
> +
> + usb1_phy_ctrl: syscon@4018 {
> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
> + reg = <0x4018 0x4>;
> + };
> };
>
> wkup_uart0: serial@2b300000 {
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> index 1773c05f752c..80be56c0a4e0 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> @@ -27,6 +27,8 @@ aliases {
> spi0 = &ospi0;
> ethernet0 = &cpsw_port1;
> ethernet1 = &cpsw_port2;
> + usb0 = &usb0;
> + usb1 = &usb1;
> };
>
> chosen {
> @@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
> bootph-all;
> };
>
> + main_usb1_pins_default: main-usb1-default-pins {
> + pinctrl-single,pins = <
> + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
> + >;
> + };
> +
> main_wlirq_pins_default: main-wlirq-default-pins {
> pinctrl-single,pins = <
> AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */
> @@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
> };
> };
>
> +&main_i2c0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_i2c0_pins_default>;
> + clock-frequency = <400000>;
> +
> + typec_pd0: usb-power-controller@3f {
> + compatible = "ti,tps6598x";
> + reg = <0x3f>;
> +
> + connector {
> + compatible = "usb-c-connector";
> + label = "USB-C";
> + self-powered;
> + data-role = "dual";
> + power-role = "sink";
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + usb_con_hs: endpoint {
> + remote-endpoint = <&usb0_hs_ep>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> &main_i2c1 {
> status = "okay";
> pinctrl-names = "default";
> @@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 {
> };
> };
>
> +&usbss0 {
> + status = "okay";
> + ti,vbus-divider;
> +};
> +
> +&usbss1 {
> + status = "okay";
> + ti,vbus-divider;
> +};
> +
> +&usb0 {
> + usb-role-switch;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + usb0_hs_ep: endpoint {
> + remote-endpoint = <&usb_con_hs>;
> + };
> + };
> +};
> +
> +&usb1 {
> + dr_mode = "host";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_usb1_pins_default>;
I'm not super familiar with USB, but I see this pinmux for the
"DRVVBUS" pin is usually added the the parent USB subsystem node (usbss).
Does this pin belong to the subsystem or the specific USB instance?
Andrew
> +};
> +
> &mcasp1 {
> status = "okay";
> #sound-dai-cells = <0>;
On 05/02/2024 19:34, Andrew Davis wrote:
> On 2/5/24 7:59 AM, Roger Quadros wrote:
>> There are two USB instances available on the am62p5 starter kit. Include
>> and enable them for use on the board.
>>
>> Signed-off-by: Vignesh Raghavendra <[email protected]>
>> Signed-off-by: Roger Quadros <[email protected]>
>> ---
>>
>> Notes:
>> Changelog:
>> v4 - no change
>> v3 - no change
>> https://lore.kernel.org/all/[email protected]/
>> v2:
>> - added USB PHY CTRL node changes here
>> - changed USB wrapper node names to usb@
>> - changed Type-C chip node name to usb-power-control@
>>
>> arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++
>> arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++
>> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++
>> 3 files changed, 123 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> index 4c51bae06b57..17d28390d587 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> @@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 {
>> status = "disabled";
>> };
>> + usbss0: usb@f900000 {
>> + compatible = "ti,am62-usb";
>> + reg = <0x00 0x0f900000 0x00 0x800>;
>> + clocks = <&k3_clks 161 3>;
>> + clock-names = "ref";
>> + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
>> + ranges;
>> + status = "disabled";
>> +
>> + usb0: usb@31000000 {
>> + compatible = "snps,dwc3";
>> + reg = <0x00 0x31000000 0x00 0x50000>;
>> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
>> + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
>> + interrupt-names = "host", "peripheral";
>> + maximum-speed = "high-speed";
>> + dr_mode = "otg";
>> + };
>> + };
>> +
>> + usbss1: usb@f910000 {
>> + compatible = "ti,am62-usb";
>> + reg = <0x00 0x0f910000 0x00 0x800>;
>> + clocks = <&k3_clks 162 3>;
>> + clock-names = "ref";
>> + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
>> + ranges;
>> + status = "disabled";
>> +
>> + usb1: usb@31100000 {
>> + compatible = "snps,dwc3";
>> + reg = <0x00 0x31100000 0x00 0x50000>;
>> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
>> + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
>> + interrupt-names = "host", "peripheral";
>> + maximum-speed = "high-speed";
>> + dr_mode = "otg";
>> + };
>> + };
>> +
>> fss: bus@fc00000 {
>> compatible = "simple-bus";
>> reg = <0x00 0x0fc00000 0x00 0x70000>;
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>> index 19f42b39394e..00dd38b02a52 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>> @@ -18,6 +18,16 @@ chipid: chipid@14 {
>> reg = <0x14 0x4>;
>> bootph-all;
>> };
>> +
>> + usb0_phy_ctrl: syscon@4008 {
>> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
>> + reg = <0x4008 0x4>;
>> + };
>> +
>> + usb1_phy_ctrl: syscon@4018 {
>> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
>> + reg = <0x4018 0x4>;
>> + };
>> };
>> wkup_uart0: serial@2b300000 {
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> index 1773c05f752c..80be56c0a4e0 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> @@ -27,6 +27,8 @@ aliases {
>> spi0 = &ospi0;
>> ethernet0 = &cpsw_port1;
>> ethernet1 = &cpsw_port2;
>> + usb0 = &usb0;
>> + usb1 = &usb1;
>> };
>> chosen {
>> @@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
>> bootph-all;
>> };
>> + main_usb1_pins_default: main-usb1-default-pins {
>> + pinctrl-single,pins = <
>> + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
>> + >;
>> + };
>> +
>> main_wlirq_pins_default: main-wlirq-default-pins {
>> pinctrl-single,pins = <
>> AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */
>> @@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
>> };
>> };
>> +&main_i2c0 {
>> + status = "okay";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&main_i2c0_pins_default>;
>> + clock-frequency = <400000>;
>> +
>> + typec_pd0: usb-power-controller@3f {
>> + compatible = "ti,tps6598x";
>> + reg = <0x3f>;
>> +
>> + connector {
>> + compatible = "usb-c-connector";
>> + label = "USB-C";
>> + self-powered;
>> + data-role = "dual";
>> + power-role = "sink";
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + port@0 {
>> + reg = <0>;
>> + usb_con_hs: endpoint {
>> + remote-endpoint = <&usb0_hs_ep>;
>> + };
>> + };
>> + };
>> + };
>> + };
>> +};
>> +
>> &main_i2c1 {
>> status = "okay";
>> pinctrl-names = "default";
>> @@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 {
>> };
>> };
>> +&usbss0 {
>> + status = "okay";
>> + ti,vbus-divider;
>> +};
>> +
>> +&usbss1 {
>> + status = "okay";
>> + ti,vbus-divider;
>> +};
>> +
>> +&usb0 {
>> + usb-role-switch;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + usb0_hs_ep: endpoint {
>> + remote-endpoint = <&usb_con_hs>;
>> + };
>> + };
>> +};
>> +
>> +&usb1 {
>> + dr_mode = "host";
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&main_usb1_pins_default>;
>
> I'm not super familiar with USB, but I see this pinmux for the
> "DRVVBUS" pin is usually added the the parent USB subsystem node (usbss).
> Does this pin belong to the subsystem or the specific USB instance?
>
There is only 1 USB instance per USB sub-system.
The "DRVVBUS" pin is a control signal to enable the VBUS regulator
while in host mode.
Just probing the usbss1 driver has no use of "DRVVBUS".
I think usb1 is the right place as it is used there.
> Andrew
>
>> +};
>> +
>> &mcasp1 {
>> status = "okay";
>> #sound-dai-cells = <0>;
--
cheers,
-roger
On 2/6/24 6:30 AM, Roger Quadros wrote:
>
>
> On 05/02/2024 19:34, Andrew Davis wrote:
>> On 2/5/24 7:59 AM, Roger Quadros wrote:
>>> There are two USB instances available on the am62p5 starter kit. Include
>>> and enable them for use on the board.
>>>
>>> Signed-off-by: Vignesh Raghavendra <[email protected]>
>>> Signed-off-by: Roger Quadros <[email protected]>
>>> ---
>>>
>>> Notes:
>>> Changelog:
>>> v4 - no change
>>> v3 - no change
>>> https://lore.kernel.org/all/[email protected]/
>>> v2:
>>> - added USB PHY CTRL node changes here
>>> - changed USB wrapper node names to usb@
>>> - changed Type-C chip node name to usb-power-control@
>>>
>>> arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++
>>> arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++
>>> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++
>>> 3 files changed, 123 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>>> index 4c51bae06b57..17d28390d587 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>>> @@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 {
>>> status = "disabled";
>>> };
>>> + usbss0: usb@f900000 {
>>> + compatible = "ti,am62-usb";
>>> + reg = <0x00 0x0f900000 0x00 0x800>;
>>> + clocks = <&k3_clks 161 3>;
>>> + clock-names = "ref";
>>> + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
>>> + ranges;
>>> + status = "disabled";
>>> +
>>> + usb0: usb@31000000 {
>>> + compatible = "snps,dwc3";
>>> + reg = <0x00 0x31000000 0x00 0x50000>;
>>> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
>>> + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
>>> + interrupt-names = "host", "peripheral";
>>> + maximum-speed = "high-speed";
>>> + dr_mode = "otg";
>>> + };
>>> + };
>>> +
>>> + usbss1: usb@f910000 {
>>> + compatible = "ti,am62-usb";
>>> + reg = <0x00 0x0f910000 0x00 0x800>;
>>> + clocks = <&k3_clks 162 3>;
>>> + clock-names = "ref";
>>> + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>>> + #address-cells = <2>;
>>> + #size-cells = <2>;
>>> + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
>>> + ranges;
>>> + status = "disabled";
>>> +
>>> + usb1: usb@31100000 {
>>> + compatible = "snps,dwc3";
>>> + reg = <0x00 0x31100000 0x00 0x50000>;
>>> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
>>> + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
>>> + interrupt-names = "host", "peripheral";
>>> + maximum-speed = "high-speed";
>>> + dr_mode = "otg";
>>> + };
>>> + };
>>> +
>>> fss: bus@fc00000 {
>>> compatible = "simple-bus";
>>> reg = <0x00 0x0fc00000 0x00 0x70000>;
>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>>> index 19f42b39394e..00dd38b02a52 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>>> @@ -18,6 +18,16 @@ chipid: chipid@14 {
>>> reg = <0x14 0x4>;
>>> bootph-all;
>>> };
>>> +
>>> + usb0_phy_ctrl: syscon@4008 {
>>> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
>>> + reg = <0x4008 0x4>;
>>> + };
>>> +
>>> + usb1_phy_ctrl: syscon@4018 {
>>> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
>>> + reg = <0x4018 0x4>;
>>> + };
>>> };
>>> wkup_uart0: serial@2b300000 {
>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>>> index 1773c05f752c..80be56c0a4e0 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>>> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>>> @@ -27,6 +27,8 @@ aliases {
>>> spi0 = &ospi0;
>>> ethernet0 = &cpsw_port1;
>>> ethernet1 = &cpsw_port2;
>>> + usb0 = &usb0;
>>> + usb1 = &usb1;
>>> };
>>> chosen {
>>> @@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
>>> bootph-all;
>>> };
>>> + main_usb1_pins_default: main-usb1-default-pins {
>>> + pinctrl-single,pins = <
>>> + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
>>> + >;
>>> + };
>>> +
>>> main_wlirq_pins_default: main-wlirq-default-pins {
>>> pinctrl-single,pins = <
>>> AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */
>>> @@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
>>> };
>>> };
>>> +&main_i2c0 {
>>> + status = "okay";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&main_i2c0_pins_default>;
>>> + clock-frequency = <400000>;
>>> +
>>> + typec_pd0: usb-power-controller@3f {
>>> + compatible = "ti,tps6598x";
>>> + reg = <0x3f>;
>>> +
>>> + connector {
>>> + compatible = "usb-c-connector";
>>> + label = "USB-C";
>>> + self-powered;
>>> + data-role = "dual";
>>> + power-role = "sink";
>>> + ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + port@0 {
>>> + reg = <0>;
>>> + usb_con_hs: endpoint {
>>> + remote-endpoint = <&usb0_hs_ep>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> + };
>>> +};
>>> +
>>> &main_i2c1 {
>>> status = "okay";
>>> pinctrl-names = "default";
>>> @@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 {
>>> };
>>> };
>>> +&usbss0 {
>>> + status = "okay";
>>> + ti,vbus-divider;
>>> +};
>>> +
>>> +&usbss1 {
>>> + status = "okay";
>>> + ti,vbus-divider;
>>> +};
>>> +
>>> +&usb0 {
>>> + usb-role-switch;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@0 {
>>> + reg = <0>;
>>> + usb0_hs_ep: endpoint {
>>> + remote-endpoint = <&usb_con_hs>;
>>> + };
>>> + };
>>> +};
>>> +
>>> +&usb1 {
>>> + dr_mode = "host";
>>> + pinctrl-names = "default";
>>> + pinctrl-0 = <&main_usb1_pins_default>;
>>
>> I'm not super familiar with USB, but I see this pinmux for the
>> "DRVVBUS" pin is usually added the the parent USB subsystem node (usbss).
>> Does this pin belong to the subsystem or the specific USB instance?
>>
> There is only 1 USB instance per USB sub-system.
> The "DRVVBUS" pin is a control signal to enable the VBUS regulator
> while in host mode.
>
> Just probing the usbss1 driver has no use of "DRVVBUS".
> I think usb1 is the right place as it is used there.
>
Seems reasonable, so if there ever was more than 1 instance
per sub-system, each instance would need its own pin?
We should move these pinctrl to the instance node in the other
dts files at some point then.
Reviewed-by: Andrew Davis <[email protected]>
>> Andrew
>>
>>> +};
>>> +
>>> &mcasp1 {
>>> status = "okay";
>>> #sound-dai-cells = <0>;
>
On 06/02/2024 19:34, Andrew Davis wrote:
> On 2/6/24 6:30 AM, Roger Quadros wrote:
>>
>>
>> On 05/02/2024 19:34, Andrew Davis wrote:
>>> On 2/5/24 7:59 AM, Roger Quadros wrote:
>>>> There are two USB instances available on the am62p5 starter kit. Include
>>>> and enable them for use on the board.
>>>>
>>>> Signed-off-by: Vignesh Raghavendra <[email protected]>
>>>> Signed-off-by: Roger Quadros <[email protected]>
>>>> ---
>>>>
>>>> Notes:
>>>> Changelog:
>>>> v4 - no change
>>>> v3 - no change
>>>> https://lore.kernel.org/all/[email protected]/
>>>> v2:
>>>> - added USB PHY CTRL node changes here
>>>> - changed USB wrapper node names to usb@
>>>> - changed Type-C chip node name to usb-power-control@
>>>>
>>>> arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 46 ++++++++++++++
>>>> arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi | 10 +++
>>>> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 67 +++++++++++++++++++++
>>>> 3 files changed, 123 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>>>> index 4c51bae06b57..17d28390d587 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>>>> @@ -560,6 +560,52 @@ sdhci2: mmc@fa20000 {
>>>> status = "disabled";
>>>> };
>>>> + usbss0: usb@f900000 {
>>>> + compatible = "ti,am62-usb";
>>>> + reg = <0x00 0x0f900000 0x00 0x800>;
>>>> + clocks = <&k3_clks 161 3>;
>>>> + clock-names = "ref";
>>>> + ti,syscon-phy-pll-refclk = <&usb0_phy_ctrl 0x0>;
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> + power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
>>>> + ranges;
>>>> + status = "disabled";
>>>> +
>>>> + usb0: usb@31000000 {
>>>> + compatible = "snps,dwc3";
>>>> + reg = <0x00 0x31000000 0x00 0x50000>;
>>>> + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
>>>> + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
>>>> + interrupt-names = "host", "peripheral";
>>>> + maximum-speed = "high-speed";
>>>> + dr_mode = "otg";
>>>> + };
>>>> + };
>>>> +
>>>> + usbss1: usb@f910000 {
>>>> + compatible = "ti,am62-usb";
>>>> + reg = <0x00 0x0f910000 0x00 0x800>;
>>>> + clocks = <&k3_clks 162 3>;
>>>> + clock-names = "ref";
>>>> + ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
>>>> + #address-cells = <2>;
>>>> + #size-cells = <2>;
>>>> + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
>>>> + ranges;
>>>> + status = "disabled";
>>>> +
>>>> + usb1: usb@31100000 {
>>>> + compatible = "snps,dwc3";
>>>> + reg = <0x00 0x31100000 0x00 0x50000>;
>>>> + interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
>>>> + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
>>>> + interrupt-names = "host", "peripheral";
>>>> + maximum-speed = "high-speed";
>>>> + dr_mode = "otg";
>>>> + };
>>>> + };
>>>> +
>>>> fss: bus@fc00000 {
>>>> compatible = "simple-bus";
>>>> reg = <0x00 0x0fc00000 0x00 0x70000>;
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>>>> index 19f42b39394e..00dd38b02a52 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-wakeup.dtsi
>>>> @@ -18,6 +18,16 @@ chipid: chipid@14 {
>>>> reg = <0x14 0x4>;
>>>> bootph-all;
>>>> };
>>>> +
>>>> + usb0_phy_ctrl: syscon@4008 {
>>>> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
>>>> + reg = <0x4008 0x4>;
>>>> + };
>>>> +
>>>> + usb1_phy_ctrl: syscon@4018 {
>>>> + compatible = "ti,am62-usb-phy-ctrl", "syscon";
>>>> + reg = <0x4018 0x4>;
>>>> + };
>>>> };
>>>> wkup_uart0: serial@2b300000 {
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>>>> index 1773c05f752c..80be56c0a4e0 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>>>> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>>>> @@ -27,6 +27,8 @@ aliases {
>>>> spi0 = &ospi0;
>>>> ethernet0 = &cpsw_port1;
>>>> ethernet1 = &cpsw_port2;
>>>> + usb0 = &usb0;
>>>> + usb1 = &usb1;
>>>> };
>>>> chosen {
>>>> @@ -297,6 +299,12 @@ AM62PX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (G20) MCASP0_ACLKR.UART1_TXD */
>>>> bootph-all;
>>>> };
>>>> + main_usb1_pins_default: main-usb1-default-pins {
>>>> + pinctrl-single,pins = <
>>>> + AM62PX_IOPAD(0x0258, PIN_INPUT, 0) /* (G21) USB1_DRVVBUS */
>>>> + >;
>>>> + };
>>>> +
>>>> main_wlirq_pins_default: main-wlirq-default-pins {
>>>> pinctrl-single,pins = <
>>>> AM62PX_IOPAD(0x0128, PIN_INPUT, 7) /* (K25) MMC2_SDWP.GPIO0_72 */
>>>> @@ -340,6 +348,36 @@ AM62PX_IOPAD(0x0124, PIN_INPUT, 7) /* (J25) MMC2_SDCD.GPIO0_71 */
>>>> };
>>>> };
>>>> +&main_i2c0 {
>>>> + status = "okay";
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&main_i2c0_pins_default>;
>>>> + clock-frequency = <400000>;
>>>> +
>>>> + typec_pd0: usb-power-controller@3f {
>>>> + compatible = "ti,tps6598x";
>>>> + reg = <0x3f>;
>>>> +
>>>> + connector {
>>>> + compatible = "usb-c-connector";
>>>> + label = "USB-C";
>>>> + self-powered;
>>>> + data-role = "dual";
>>>> + power-role = "sink";
>>>> + ports {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + port@0 {
>>>> + reg = <0>;
>>>> + usb_con_hs: endpoint {
>>>> + remote-endpoint = <&usb0_hs_ep>;
>>>> + };
>>>> + };
>>>> + };
>>>> + };
>>>> + };
>>>> +};
>>>> +
>>>> &main_i2c1 {
>>>> status = "okay";
>>>> pinctrl-names = "default";
>>>> @@ -460,6 +498,35 @@ cpsw3g_phy1: ethernet-phy@1 {
>>>> };
>>>> };
>>>> +&usbss0 {
>>>> + status = "okay";
>>>> + ti,vbus-divider;
>>>> +};
>>>> +
>>>> +&usbss1 {
>>>> + status = "okay";
>>>> + ti,vbus-divider;
>>>> +};
>>>> +
>>>> +&usb0 {
>>>> + usb-role-switch;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> +
>>>> + port@0 {
>>>> + reg = <0>;
>>>> + usb0_hs_ep: endpoint {
>>>> + remote-endpoint = <&usb_con_hs>;
>>>> + };
>>>> + };
>>>> +};
>>>> +
>>>> +&usb1 {
>>>> + dr_mode = "host";
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&main_usb1_pins_default>;
>>>
>>> I'm not super familiar with USB, but I see this pinmux for the
>>> "DRVVBUS" pin is usually added the the parent USB subsystem node (usbss).
>>> Does this pin belong to the subsystem or the specific USB instance?
>>>
>> There is only 1 USB instance per USB sub-system.
>> The "DRVVBUS" pin is a control signal to enable the VBUS regulator
>> while in host mode.
>>
>> Just probing the usbss1 driver has no use of "DRVVBUS".
>> I think usb1 is the right place as it is used there.
>>
>
> Seems reasonable, so if there ever was more than 1 instance
> per sub-system, each instance would need its own pin?
Yes.
>
> We should move these pinctrl to the instance node in the other
> dts files at some point then.
>
> Reviewed-by: Andrew Davis <[email protected]>
Thanks!
>
>>> Andrew
>>>
>>>> +};
>>>> +
>>>> &mcasp1 {
>>>> status = "okay";
>>>> #sound-dai-cells = <0>;
>>
--
cheers,
-roger
Hi Roger,
On 05/02/24 19:29, Roger Quadros wrote:
> Add the compatible for TI AM62 USB PHY Control register. This
> register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It
> is used to indicate the USB PHY PLL reference clock rate and
> core voltage level to the USB controller.
>
> [1] - https://www.ti.com/lit/pdf/spruiv7
>
> Signed-off-by: Roger Quadros <[email protected]>
> Acked-by: Rob Herring <[email protected]>
> ---
>
> Notes:
> Changelog:
>
> v4 - no change. Added Rob's Acked-by
>
> v3 - add compatibles in alphabetical order
> https://lore.kernel.org/all/[email protected]/
>
> v2 - New patch
>
> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
You don't have right maintainer in CC for this file.
> index 084b5c2a2a3c..9437705af92f 100644
> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
> @@ -72,6 +72,7 @@ properties:
> - rockchip,rk3588-qos
> - rockchip,rv1126-qos
> - starfive,jh7100-sysmain
> + - ti,am62-usb-phy-ctrl
> - ti,am654-dss-oldi-io-ctrl
>
> - const: syscon
--
Regards
Vignesh
Hi Vignesh,
On 22/02/2024 10:51, Vignesh Raghavendra wrote:
> Hi Roger,
>
> On 05/02/24 19:29, Roger Quadros wrote:
>> Add the compatible for TI AM62 USB PHY Control register. This
>> register is found in the TI AM62 WKUP_CTRL_MMR0 space [1]. It
>> is used to indicate the USB PHY PLL reference clock rate and
>> core voltage level to the USB controller.
>>
>> [1] - https://www.ti.com/lit/pdf/spruiv7
>>
>> Signed-off-by: Roger Quadros <[email protected]>
>> Acked-by: Rob Herring <[email protected]>
>> ---
>>
>> Notes:
>> Changelog:
>>
>> v4 - no change. Added Rob's Acked-by
>>
>> v3 - add compatibles in alphabetical order
>> https://lore.kernel.org/all/[email protected]/
>>
>> v2 - New patch
>>
>> Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
>
> You don't have right maintainer in CC for this file.
I'll resend this series with Acks and updated CC list.
>
>> index 084b5c2a2a3c..9437705af92f 100644
>> --- a/Documentation/devicetree/bindings/mfd/syscon.yaml
>> +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
>> @@ -72,6 +72,7 @@ properties:
>> - rockchip,rk3588-qos
>> - rockchip,rv1126-qos
>> - starfive,jh7100-sysmain
>> + - ti,am62-usb-phy-ctrl
>> - ti,am654-dss-oldi-io-ctrl
>>
>> - const: syscon
>
--
cheers,
-roger