2020-01-06 20:02:27

by Horia Geanta

Subject: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano

Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
which is very similar to the one used in i.mx8mq, i.mx8mm.

Since the clocks are identical for all members of i.MX 8M family,
simplify the SoC <--> clock array mapping table.

Signed-off-by: Horia Geantă <[email protected]>
---
drivers/crypto/caam/ctrl.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 6659c8d9672e..88a58a8fc533 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -99,11 +99,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,

if (ctrlpriv->virt_en == 1 ||
/*
- * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
+ * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1
* and the following steps should be performed regardless
*/
of_machine_is_compatible("fsl,imx8mq") ||
- of_machine_is_compatible("fsl,imx8mm")) {
+ of_machine_is_compatible("fsl,imx8mm") ||
+ of_machine_is_compatible("fsl,imx8mn")) {
clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);

while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
@@ -509,8 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
{ .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
{ .soc_id = "i.MX6*", .data = &caam_imx6_data },
{ .soc_id = "i.MX7*", .data = &caam_imx7_data },
- { .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
- { .soc_id = "i.MX8MM", .data = &caam_imx7_data },
+ { .soc_id = "i.MX8M*", .data = &caam_imx7_data },
{ .family = "Freescale i.MX" },
{ /* sentinel */ }
};
--
2.17.1

2020-01-06 20:03:02

by Horia Geanta

Subject: [PATCH 2/2] arm64: dts: imx8mn: add crypto node

Add node for CAAM - Cryptographic Acceleration and Assurance Module.

Signed-off-by: Horia Geantă <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 30 +++++++++++++++++++++++
1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index cce65b9a861f..c3fec19f4f05 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -537,6 +537,36 @@
status = "disabled";
};

+ crypto: crypto@30900000 {
+ compatible = "fsl,sec-v4.0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30900000 0x40000>;
+ ranges = <0 0x30900000 0x40000>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_AHB>,
+ <&clk IMX8MN_CLK_IPG_ROOT>;
+ clock-names = "aclk", "ipg";
+
+ sec_jr0: jr0@1000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x1000 0x1000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr1: jr1@2000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x2000 0x1000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr2: jr2@3000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x3000 0x1000>;
+ interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
i2c1: i2c@30a20000 {
compatible = "fsl,imx8mn-i2c", "fsl,imx21-i2c";
#address-cells = <1>;
--
2.17.1

2020-01-07 13:41:07

by Iuliana Prodan

Subject: Re: [PATCH 1/2] crypto: caam - add support for i.MX8M Nano

On 1/6/2020 10:02 PM, Horia Geant? wrote:
> Add support for the crypto engine used in i.mx8mn (i.MX 8M "Nano"),
> which is very similar to the one used in i.mx8mq, i.mx8mm.
>
> Since the clocks are identical for all members of i.MX 8M family,
> simplify the SoC <--> clock array mapping table.
>
> Signed-off-by: Horia Geant? <[email protected]>

For the series:

Tested-by: Iuliana Prodan <[email protected]>
Reviewed-by: Iuliana Prodan <[email protected]>

> ---
> drivers/crypto/caam/ctrl.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
> index 6659c8d9672e..88a58a8fc533 100644
> --- a/drivers/crypto/caam/ctrl.c
> +++ b/drivers/crypto/caam/ctrl.c
> @@ -99,11 +99,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
>
> if (ctrlpriv->virt_en == 1 ||
> /*
> - * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
> + * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1
> * and the following steps should be performed regardless
> */
> of_machine_is_compatible("fsl,imx8mq") ||
> - of_machine_is_compatible("fsl,imx8mm")) {
> + of_machine_is_compatible("fsl,imx8mm") ||
> + of_machine_is_compatible("fsl,imx8mn")) {
> clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
>
> while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
> @@ -509,8 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
> { .soc_id = "i.MX6UL", .data = &caam_imx6ul_data },
> { .soc_id = "i.MX6*", .data = &caam_imx6_data },
> { .soc_id = "i.MX7*", .data = &caam_imx7_data },
> - { .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
> - { .soc_id = "i.MX8MM", .data = &caam_imx7_data },
> + { .soc_id = "i.MX8M*", .data = &caam_imx7_data },
> { .family = "Freescale i.MX" },
> { /* sentinel */ }
> };
>

2020-01-09 11:44:21

by Shawn Guo

Subject: Re: [PATCH 2/2] arm64: dts: imx8mn: add crypto node

On Mon, Jan 06, 2020 at 10:01:54PM +0200, Horia Geantă wrote:
> Add node for CAAM - Cryptographic Acceleration and Assurance Module.
>
> Signed-off-by: Horia Geantă <[email protected]>

Applied, thanks.