Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
---
drivers/net/wireless/ath/ath9k/hw.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 6d3e314..abaa2f0 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -432,7 +432,7 @@ struct ath9k_hw_version {
* Using de Bruijin sequence to to look up 1's index in a 32 bit number
* debruijn32 = 0000 0111 0111 1100 1011 0101 0011 0001
*/
-#define debruijn32 0x077CB531UL
+#define debruijn32 0x077CB531U
struct ath_gen_timer_configuration {
u32 next_addr;
--
1.5.5.1
On Fri, Nov 13, 2009 at 10:44:38PM +0530, Luis Rodriguez wrote:
> On Fri, Nov 13, 2009 at 01:02:40AM -0800, Vasanth Thiagarajan wrote:
> > The bit value of AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB is wrong, it should
> > be 0x400 and the number of bits to be right shifted is 10. Having this
> > wrong value in 0x4054 sometimes affects bt quality on btcoex environment.
> >
> > Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
>
> These both seem small enough and reasonable for stable fixes no?
yeah, I'll resend them CC'ing stable.
> Although I didn't get the impact of the first one..
debruijn32 (0x077CB531UL) is used to find the index of the geric timer
which generated the interrupt. On a 64-bit environment, 0x077CB531UL
will result in indexing more than 32 in gen_timer_index[] which has
memory allocated only for 32 u32.
Vasanth
On Fri, Nov 13, 2009 at 01:02:40AM -0800, Vasanth Thiagarajan wrote:
> The bit value of AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB is wrong, it should
> be 0x400 and the number of bits to be right shifted is 10. Having this
> wrong value in 0x4054 sometimes affects bt quality on btcoex environment.
>
> Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
These both seem small enough and reasonable for stable fixes no?
Although I didn't get the impact of the first one..
Luis
On Sun, Nov 15, 2009 at 11:20:07PM -0800, Vasanth Thiagarajan wrote:
> On Fri, Nov 13, 2009 at 10:44:38PM +0530, Luis Rodriguez wrote:
> > On Fri, Nov 13, 2009 at 01:02:40AM -0800, Vasanth Thiagarajan wrote:
> > > The bit value of AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB is wrong, it should
> > > be 0x400 and the number of bits to be right shifted is 10. Having this
> > > wrong value in 0x4054 sometimes affects bt quality on btcoex environment.
> > >
> > > Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
> >
> > These both seem small enough and reasonable for stable fixes no?
>
> yeah, I'll resend them CC'ing stable.
>
> > Although I didn't get the impact of the first one..
>
> debruijn32 (0x077CB531UL) is used to find the index of the geric timer
> which generated the interrupt. On a 64-bit environment, 0x077CB531UL
> will result in indexing more than 32 in gen_timer_index[] which has
> memory allocated only for 32 u32.
Can this be added to the commit log?
Luis
The bit value of AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB is wrong, it should
be 0x400 and the number of bits to be right shifted is 10. Having this
wrong value in 0x4054 sometimes affects bt quality on btcoex environment.
Signed-off-by: Vasanthakumar Thiagarajan <[email protected]>
---
drivers/net/wireless/ath/ath9k/reg.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 061e12c..49ec25f 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -971,10 +971,10 @@ enum {
#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_S 4
#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF 0x00000080
#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF_S 7
+#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB 0x00000400
+#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S 10
#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB 0x00001000
#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB_S 12
-#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB 0x00001000
-#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S 1
#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB 0x00008000
#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB_S 15
#define AR_GPIO_RTC_RESET_OVERRIDE_ENABLE 0x00010000
--
1.5.5.1