LinuxLists.cc - [PATCH 0/2] ath10k: Add support for QCA9887

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Subject: [PATCH 1/2] ath10k: add QCA9887 chipset support

Add the hardware name, revision, firmware names and update the pci_id
table.

QA9887 HW1.0 is supposed to be similar to QCA988X HW2.0 . Details about
he firmware interface are currently unknown.

Signed-off-by: Sven Eckelmann <[email protected]>
---
drivers/net/wireless/ath/ath10k/core.c | 20 ++++++++++++++++++++
drivers/net/wireless/ath/ath10k/hw.h | 10 ++++++++++
drivers/net/wireless/ath/ath10k/pci.c | 20 ++++++++++++++++++--
drivers/net/wireless/ath/ath10k/targaddrs.h | 3 +++
4 files changed, 51 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
index 49af624..0f4a4f6 100644
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -69,6 +69,25 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
},
},
{
+ .id = QCA9887_HW_1_0_VERSION,
+ .dev_id = QCA9887_1_0_DEVICE_ID,
+ .name = "qca9887 hw1.0",
+ .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
+ .uart_pin = 7,
+ .has_shifted_cc_wraparound = true,
+ .otp_exe_param = 0,
+ .channel_counters_freq_hz = 88000,
+ .max_probe_resp_desc_thres = 0,
+ .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
+ .cal_data_len = 2116,
+ .fw = {
+ .dir = QCA9887_HW_1_0_FW_DIR,
+ .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
+ .board_size = QCA9887_BOARD_DATA_SZ,
+ .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
+ },
+ },
+ {
.id = QCA6174_HW_2_1_VERSION,
.dev_id = QCA6164_2_1_DEVICE_ID,
.name = "qca6164 hw2.1",
@@ -2062,6 +2081,7 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,

switch (hw_rev) {
case ATH10K_HW_QCA988X:
+ case ATH10K_HW_QCA9887:
ar->regs = &qca988x_regs;
ar->hw_values = &qca988x_values;
break;
diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
index aedd898..9108831 100644
--- a/drivers/net/wireless/ath/ath10k/hw.h
+++ b/drivers/net/wireless/ath/ath10k/hw.h
@@ -27,6 +27,7 @@
#define QCA6174_2_1_DEVICE_ID (0x003e)
#define QCA99X0_2_0_DEVICE_ID (0x0040)
#define QCA9377_1_0_DEVICE_ID (0x0042)
+#define QCA9887_1_0_DEVICE_ID (0x0050)

/* QCA988X 1.0 definitions (unsupported) */
#define QCA988X_HW_1_0_CHIP_ID_REV 0x0
@@ -38,6 +39,13 @@
#define QCA988X_HW_2_0_BOARD_DATA_FILE "board.bin"
#define QCA988X_HW_2_0_PATCH_LOAD_ADDR 0x1234

+/* QCA9887 1.0 definitions */
+#define QCA9887_HW_1_0_VERSION 0x4100016d
+#define QCA9887_HW_1_0_CHIP_ID_REV 0
+#define QCA9887_HW_1_0_FW_DIR ATH10K_FW_DIR "/QCA9887/hw1.0"
+#define QCA9887_HW_1_0_BOARD_DATA_FILE "board.bin"
+#define QCA9887_HW_1_0_PATCH_LOAD_ADDR 0x1234
+
/* QCA6174 target BMI version signatures */
#define QCA6174_HW_1_0_VERSION 0x05000000
#define QCA6174_HW_1_1_VERSION 0x05000001
@@ -195,6 +203,7 @@ enum ath10k_hw_rev {
ATH10K_HW_QCA99X0,
ATH10K_HW_QCA9377,
ATH10K_HW_QCA4019,
+ ATH10K_HW_QCA9887,
};

struct ath10k_hw_regs {
@@ -247,6 +256,7 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
u32 cc, u32 rcc, u32 cc_prev, u32 rcc_prev);

#define QCA_REV_988X(ar) ((ar)->hw_rev == ATH10K_HW_QCA988X)
+#define QCA_REV_9887(ar) ((ar)->hw_rev == ATH10K_HW_QCA9887)
#define QCA_REV_6174(ar) ((ar)->hw_rev == ATH10K_HW_QCA6174)
#define QCA_REV_99X0(ar) ((ar)->hw_rev == ATH10K_HW_QCA99X0)
#define QCA_REV_9377(ar) ((ar)->hw_rev == ATH10K_HW_QCA9377)
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index 8133d7b..b799f46 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -57,6 +57,7 @@ static const struct pci_device_id ath10k_pci_id_table[] = {
{ PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
{ PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */
{ PCI_VDEVICE(ATHEROS, QCA9377_1_0_DEVICE_ID) }, /* PCI-E QCA9377 V1 */
+ { PCI_VDEVICE(ATHEROS, QCA9887_1_0_DEVICE_ID) }, /* PCI-E QCA9887 */
{0}
};

@@ -83,6 +84,8 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {

{ QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_0_CHIP_ID_REV },
{ QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_1_CHIP_ID_REV },
+
+ { QCA9887_1_0_DEVICE_ID, QCA9887_HW_1_0_CHIP_ID_REV },
};

static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
@@ -837,6 +840,7 @@ static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)

switch (ar->hw_rev) {
case ATH10K_HW_QCA988X:
+ case ATH10K_HW_QCA9887:
case ATH10K_HW_QCA6174:
case ATH10K_HW_QCA9377:
val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
@@ -1560,6 +1564,7 @@ static void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar)

switch (ar->hw_rev) {
case ATH10K_HW_QCA988X:
+ case ATH10K_HW_QCA9887:
case ATH10K_HW_QCA6174:
case ATH10K_HW_QCA9377:
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
@@ -1583,6 +1588,7 @@ static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar)

switch (ar->hw_rev) {
case ATH10K_HW_QCA988X:
+ case ATH10K_HW_QCA9887:
case ATH10K_HW_QCA6174:
case ATH10K_HW_QCA9377:
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
@@ -1932,6 +1938,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
switch (ar_pci->pdev->device) {
case QCA988X_2_0_DEVICE_ID:
case QCA99X0_2_0_DEVICE_ID:
+ case QCA9887_1_0_DEVICE_ID:
return 1;
case QCA6164_2_1_DEVICE_ID:
case QCA6174_2_1_DEVICE_ID:
@@ -2295,7 +2302,7 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)

static int ath10k_pci_safe_chip_reset(struct ath10k *ar)
{
- if (QCA_REV_988X(ar) || QCA_REV_6174(ar)) {
+ if (QCA_REV_988X(ar) || QCA_REV_9887(ar) || QCA_REV_6174(ar)) {
return ath10k_pci_warm_reset(ar);
} else if (QCA_REV_99X0(ar)) {
ath10k_pci_irq_disable(ar);
@@ -2437,7 +2444,7 @@ static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar)

static int ath10k_pci_chip_reset(struct ath10k *ar)
{
- if (QCA_REV_988X(ar))
+ if (QCA_REV_988X(ar) || QCA_REV_9887(ar))
return ath10k_pci_qca988x_chip_reset(ar);
else if (QCA_REV_6174(ar))
return ath10k_pci_qca6174_chip_reset(ar);
@@ -2982,6 +2989,10 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
hw_rev = ATH10K_HW_QCA988X;
pci_ps = false;
break;
+ case QCA9887_1_0_DEVICE_ID:
+ hw_rev = ATH10K_HW_QCA9887;
+ pci_ps = false;
+ break;
case QCA6164_2_1_DEVICE_ID:
case QCA6174_2_1_DEVICE_ID:
hw_rev = ATH10K_HW_QCA6174;
@@ -3180,6 +3191,11 @@ MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" ATH10K_FW_API5_FILE);
MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" QCA988X_HW_2_0_BOARD_DATA_FILE);
MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" ATH10K_BOARD_API2_FILE);

+/* QCA9887 1.0 firmware files */
+MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" ATH10K_FW_API5_FILE);
+MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" QCA9887_HW_1_0_BOARD_DATA_FILE);
+MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" ATH10K_BOARD_API2_FILE);
+
/* QCA6174 2.1 firmware files */
MODULE_FIRMWARE(QCA6174_HW_2_1_FW_DIR "/" ATH10K_FW_API4_FILE);
MODULE_FIRMWARE(QCA6174_HW_2_1_FW_DIR "/" ATH10K_FW_API5_FILE);
diff --git a/drivers/net/wireless/ath/ath10k/targaddrs.h b/drivers/net/wireless/ath/ath10k/targaddrs.h
index 8e24099..aaf53a8 100644
--- a/drivers/net/wireless/ath/ath10k/targaddrs.h
+++ b/drivers/net/wireless/ath/ath10k/targaddrs.h
@@ -447,6 +447,9 @@ Fw Mode/SubMode Mask
#define QCA988X_BOARD_DATA_SZ 7168
#define QCA988X_BOARD_EXT_DATA_SZ 0

+#define QCA9887_BOARD_DATA_SZ 7168
+#define QCA9887_BOARD_EXT_DATA_SZ 0
+
#define QCA6174_BOARD_DATA_SZ 8192
#define QCA6174_BOARD_EXT_DATA_SZ 0

--
2.8.1

2016-05-27 08:46:56

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Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

On Thursday 26 May 2016 17:32:30 Valo, Kalle wrote:
> Sven Eckelmann <[email protected]> writes:
>
> > the QCA9887 chip is similar to the QCA988x chips. But it requires a special
> > firmware and uses a different calibration data source. Unfortunately, no
> > working firmware currently exists. But it is possible to create a semi working
> > one by binary patching the current version.
>
> So what works and what doesn't?

We currently stopped everything related to QCA9887 and so I cannot give you an
exhaustive list. But right now basic AP functionality seems to work. The
signal level, coverage and performance was rather bad. I cannot give you
numbers anymore because the two actual tests with QCA9887 were done 1 year ago
and 1/2 year ago (you know why ;) ).

But maybe I should add that the results with the original AP147 firmware also
wasn't better.

The hardware also doesn't seem to be able to produce spectral frame results.
It is unknown whether it uses an incompatible format or whether the
firmware/hardware is just not capable to produce spectral results.

[...]
> I can upload a new version. So I need to add these flags:
>
> ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX
> ATH10K_FW_FEATURE_NO_P2P
> ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT
>
> Anything else?

At least I didn't find more. Possible that more are needed - I would guess
that the question to the QCA firmware team is still pending.

[...]
> Should we add a warning message to ath10k that the QCA9887 support is
> experimental? That way users don't need to wonder why there are so many
> problems.

Yes, this would be a good idea. I personally wouldn't know where you want
to have this warning added. So maybe you just add it? Thanks

> There were some conflicts in patch 1. I fixed those now and pushed the
> patches to the pending branch for further testing:
>
> https://git.kernel.org/cgit/linux/kernel/git/kvalo/ath.git/log/?h=master-pending
>
> Unfortunately I don't have QCA9887 myself so I can't test these myself.
> I hope I didn't break anything.

Ah, yes. The new patches "clean up growing hw checks during safe and full reset"
and some QCA9884 stuff seems to have created some conflicts. I have redone my
patches on top of them and compared with your solution. We came up with the
exact same conflict resolution. So you can at least say that I would also
have broken it ;)

I have just created a compat-wireless based on your branch which I've tested
it with my QCA9887 test card. No new problems were detected.

Kind regards,
Sven

Attachments:

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2016-05-30 11:12:30

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Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

On Friday 27 May 2016 12:44:52 Valo, Kalle wrote:
[...]
> > But maybe I should add that the results with the original AP147 firmware also
> > wasn't better.
>
> That doesn't sound good. Maybe a calibration issue?

Maybe but I don't have a different card to compare it to.

[...]
> I pushed a new firmware image firmware-5.bin_10.2.3.31.7-2 with those
> enabled:
>
> https://github.com/kvalo/ath10k-firmware/tree/master/QCA9887

Thanks for the updated firmware file. I have done some basic tests and seems
to work fine. Bindiff also looks fine

Kind regards,
Sven

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2016-05-20 14:41:31

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Subject: [PATCH 2/2] ath10k: Add board data download from target

The QCA9887 stores its calibration data (board.bin) inside the EEPROM of
the target. This has to be downloaded manually to allow the device to
initialize correctly.

Signed-off-by: Sven Eckelmann <[email protected]>
---
drivers/net/wireless/ath/ath10k/core.c | 41 +++++++++-
drivers/net/wireless/ath/ath10k/core.h | 3 +
drivers/net/wireless/ath/ath10k/hif.h | 14 ++++
drivers/net/wireless/ath/ath10k/hw.h | 22 ++++++
drivers/net/wireless/ath/ath10k/pci.c | 139 +++++++++++++++++++++++++++++++++
5 files changed, 218 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
index 0f4a4f6..a70759a 100644
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/of.h>
+#include <asm/byteorder.h>

#include "core.h"
#include "mac.h"
@@ -550,6 +551,34 @@ out:
return ret;
}

+static int ath10k_download_cal_eeprom(struct ath10k *ar)
+{
+ size_t data_len;
+ void *data = NULL;
+ int ret;
+
+ ret = ath10k_hif_fetch_target_board_data(ar, &data, &data_len);
+ if (ret) {
+ ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
+ ret);
+ goto out_free;
+ }
+
+ ret = ath10k_download_board_data(ar, data, data_len);
+ if (ret) {
+ ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
+ ret);
+ goto out_free;
+ }
+
+ ret = 0;
+
+out_free:
+ kfree(data);
+
+ return ret;
+}
+
static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
{
u32 result, address;
@@ -1312,7 +1341,17 @@ static int ath10k_download_cal_data(struct ath10k *ar)
}

ath10k_dbg(ar, ATH10K_DBG_BOOT,
- "boot did not find DT entry, try OTP next: %d\n",
+ "boot did not find DT entry, try target EEPROM next: %d\n",
+ ret);
+
+ ret = ath10k_download_cal_eeprom(ar);
+ if (ret == 0) {
+ ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
+ goto done;
+ }
+
+ ath10k_dbg(ar, ATH10K_DBG_BOOT,
+ "boot did not find target EEPROM entry, try OTP next: %d\n",
ret);

ret = ath10k_download_and_run_otp(ar);
diff --git a/drivers/net/wireless/ath/ath10k/core.h b/drivers/net/wireless/ath/ath10k/core.h
index 1852e0e..86d7642 100644
--- a/drivers/net/wireless/ath/ath10k/core.h
+++ b/drivers/net/wireless/ath/ath10k/core.h
@@ -571,6 +571,7 @@ enum ath10k_cal_mode {
ATH10K_CAL_MODE_DT,
ATH10K_PRE_CAL_MODE_FILE,
ATH10K_PRE_CAL_MODE_DT,
+ ATH10K_CAL_MODE_EEPROM,
};

enum ath10k_crypt_mode {
@@ -593,6 +594,8 @@ static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
return "pre-cal-file";
case ATH10K_PRE_CAL_MODE_DT:
return "pre-cal-dt";
+ case ATH10K_CAL_MODE_EEPROM:
+ return "eeprom";
}

return "unknown";
diff --git a/drivers/net/wireless/ath/ath10k/hif.h b/drivers/net/wireless/ath/ath10k/hif.h
index 89e7076..c18b8c8 100644
--- a/drivers/net/wireless/ath/ath10k/hif.h
+++ b/drivers/net/wireless/ath/ath10k/hif.h
@@ -87,6 +87,10 @@ struct ath10k_hif_ops {

int (*suspend)(struct ath10k *ar);
int (*resume)(struct ath10k *ar);
+
+ /* fetch board data from target eeprom */
+ int (*fetch_target_board_data)(struct ath10k *ar, void **data,
+ size_t *data_len);
};

static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
@@ -202,4 +206,14 @@ static inline void ath10k_hif_write32(struct ath10k *ar,
ar->hif.ops->write32(ar, address, data);
}

+static inline int ath10k_hif_fetch_target_board_data(struct ath10k *ar,
+ void **data,
+ size_t *data_len)
+{
+ if (!ar->hif.ops->fetch_target_board_data)
+ return -EOPNOTSUPP;
+
+ return ar->hif.ops->fetch_target_board_data(ar, data, data_len);
+}
+
#endif /* _HIF_H_ */
diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
index 9108831..53ca40e 100644
--- a/drivers/net/wireless/ath/ath10k/hw.h
+++ b/drivers/net/wireless/ath/ath10k/hw.h
@@ -557,7 +557,10 @@ enum ath10k_hw_4addr_pad {
#define WLAN_SYSTEM_SLEEP_DISABLE_MASK 0x00000001

#define WLAN_GPIO_PIN0_ADDRESS 0x00000028
+#define WLAN_GPIO_PIN0_CONFIG_LSB 11
#define WLAN_GPIO_PIN0_CONFIG_MASK 0x00007800
+#define WLAN_GPIO_PIN0_PAD_PULL_LSB 5
+#define WLAN_GPIO_PIN0_PAD_PULL_MASK 0x00000060
#define WLAN_GPIO_PIN1_ADDRESS 0x0000002c
#define WLAN_GPIO_PIN1_CONFIG_MASK 0x00007800
#define WLAN_GPIO_PIN10_ADDRESS 0x00000050
@@ -570,6 +573,8 @@ enum ath10k_hw_4addr_pad {
#define CLOCK_GPIO_BT_CLK_OUT_EN_MASK 0

#define SI_CONFIG_OFFSET 0x00000000
+#define SI_CONFIG_ERR_INT_LSB 19
+#define SI_CONFIG_ERR_INT_MASK 0x00080000
#define SI_CONFIG_BIDIR_OD_DATA_LSB 18
#define SI_CONFIG_BIDIR_OD_DATA_MASK 0x00040000
#define SI_CONFIG_I2C_LSB 16
@@ -583,7 +588,9 @@ enum ath10k_hw_4addr_pad {
#define SI_CONFIG_DIVIDER_LSB 0
#define SI_CONFIG_DIVIDER_MASK 0x0000000f
#define SI_CS_OFFSET 0x00000004
+#define SI_CS_DONE_ERR_LSB 10
#define SI_CS_DONE_ERR_MASK 0x00000400
+#define SI_CS_DONE_INT_LSB 9
#define SI_CS_DONE_INT_MASK 0x00000200
#define SI_CS_START_LSB 8
#define SI_CS_START_MASK 0x00000100
@@ -634,7 +641,10 @@ enum ath10k_hw_4addr_pad {
#define GPIO_BASE_ADDRESS WLAN_GPIO_BASE_ADDRESS
#define GPIO_PIN0_OFFSET WLAN_GPIO_PIN0_ADDRESS
#define GPIO_PIN1_OFFSET WLAN_GPIO_PIN1_ADDRESS
+#define GPIO_PIN0_CONFIG_LSB WLAN_GPIO_PIN0_CONFIG_LSB
#define GPIO_PIN0_CONFIG_MASK WLAN_GPIO_PIN0_CONFIG_MASK
+#define GPIO_PIN0_PAD_PULL_LSB WLAN_GPIO_PIN0_PAD_PULL_LSB
+#define GPIO_PIN0_PAD_PULL_MASK WLAN_GPIO_PIN0_PAD_PULL_MASK
#define GPIO_PIN1_CONFIG_MASK WLAN_GPIO_PIN1_CONFIG_MASK
#define SI_BASE_ADDRESS WLAN_SI_BASE_ADDRESS
#define SCRATCH_BASE_ADDRESS SOC_CORE_BASE_ADDRESS
@@ -689,6 +699,18 @@ enum ath10k_hw_4addr_pad {
#define WINDOW_READ_ADDR_ADDRESS MISSING
#define WINDOW_WRITE_ADDR_ADDRESS MISSING

+#define QCA9887_1_0_I2C_SDA_GPIO_PIN 5
+#define QCA9887_1_0_I2C_SDA_PIN_CONFIG 3
+#define QCA9887_1_0_SI_CLK_GPIO_PIN 17
+#define QCA9887_1_0_SI_CLK_PIN_CONFIG 3
+#define QCA9887_1_0_GPIO_ENABLE_W1TS_LOW_ADDRESS 0x00000010
+
+#define QCA9887_EEPROM_SELECT_READ 0xa10000a0
+#define QCA9887_EEPROM_ADDR_HI_MASK 0x0000ff00
+#define QCA9887_EEPROM_ADDR_HI_LSB 8
+#define QCA9887_EEPROM_ADDR_LO_MASK 0x00ff0000
+#define QCA9887_EEPROM_ADDR_LO_LSB 16
+
#define RTC_STATE_V_GET(x) (((x) & RTC_STATE_V_MASK) >> RTC_STATE_V_LSB)

#endif /* _HW_H_ */
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index b799f46..c156705 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2566,6 +2566,144 @@ static int ath10k_pci_hif_resume(struct ath10k *ar)
}
#endif

+static bool ath10k_pci_validate_cal(void *data, size_t size)
+{
+ __le16 *cal_words = data;
+ u16 checksum = 0;
+ size_t i;
+
+ if (size % 2 != 0)
+ return false;
+
+ for (i = 0; i < size / 2; i++)
+ checksum ^= le16_to_cpu(cal_words[i]);
+
+ return checksum == 0xffff;
+}
+
+static void ath10k_pci_enable_eeprom(struct ath10k *ar)
+{
+ /* Enable SI clock */
+ ath10k_pci_soc_write32(ar, CLOCK_CONTROL_OFFSET, 0x0);
+
+ /* Configure GPIOs for I2C operation */
+ ath10k_pci_write32(ar,
+ GPIO_BASE_ADDRESS + GPIO_PIN0_OFFSET +
+ 4 * QCA9887_1_0_I2C_SDA_GPIO_PIN,
+ SM(QCA9887_1_0_I2C_SDA_PIN_CONFIG,
+ GPIO_PIN0_CONFIG) |
+ SM(1, GPIO_PIN0_PAD_PULL));
+
+ ath10k_pci_write32(ar,
+ GPIO_BASE_ADDRESS + GPIO_PIN0_OFFSET +
+ 4 * QCA9887_1_0_SI_CLK_GPIO_PIN,
+ SM(QCA9887_1_0_SI_CLK_PIN_CONFIG, GPIO_PIN0_CONFIG) |
+ SM(1, GPIO_PIN0_PAD_PULL));
+
+ ath10k_pci_write32(ar,
+ GPIO_BASE_ADDRESS +
+ QCA9887_1_0_GPIO_ENABLE_W1TS_LOW_ADDRESS,
+ 1u << QCA9887_1_0_SI_CLK_GPIO_PIN);
+
+ /* In Swift ASIC - EEPROM clock will be (110MHz/512) = 214KHz */
+ ath10k_pci_write32(ar,
+ SI_BASE_ADDRESS + SI_CONFIG_OFFSET,
+ SM(1, SI_CONFIG_ERR_INT) |
+ SM(1, SI_CONFIG_BIDIR_OD_DATA) |
+ SM(1, SI_CONFIG_I2C) |
+ SM(1, SI_CONFIG_POS_SAMPLE) |
+ SM(1, SI_CONFIG_INACTIVE_DATA) |
+ SM(1, SI_CONFIG_INACTIVE_CLK) |
+ SM(8, SI_CONFIG_DIVIDER));
+}
+
+static int ath10k_pci_read_eeprom(struct ath10k *ar, u16 addr, u8 *out)
+{
+ u32 reg;
+ int wait_limit;
+
+ /* set device select byte and for the read operation */
+ reg = QCA9887_EEPROM_SELECT_READ |
+ SM(addr, QCA9887_EEPROM_ADDR_LO) |
+ SM(addr >> 8, QCA9887_EEPROM_ADDR_HI);
+ ath10k_pci_write32(ar, SI_BASE_ADDRESS + SI_TX_DATA0_OFFSET, reg);
+
+ /* write transmit data, transfer length, and START bit */
+ ath10k_pci_write32(ar, SI_BASE_ADDRESS + SI_CS_OFFSET,
+ SM(1, SI_CS_START) | SM(1, SI_CS_RX_CNT) |
+ SM(4, SI_CS_TX_CNT));
+
+ /* wait max 1 sec */
+ wait_limit = 100000;
+
+ /* wait for SI_CS_DONE_INT */
+ do {
+ reg = ath10k_pci_read32(ar, SI_BASE_ADDRESS + SI_CS_OFFSET);
+ if (MS(reg, SI_CS_DONE_INT))
+ break;
+
+ wait_limit--;
+ udelay(10);
+ } while (wait_limit > 0);
+
+ if (!MS(reg, SI_CS_DONE_INT)) {
+ ath10k_err(ar, "timeout while reading device EEPROM at %04x\n",
+ addr);
+ return -ETIMEDOUT;
+ }
+
+ /* clear SI_CS_DONE_INT */
+ ath10k_pci_write32(ar, SI_BASE_ADDRESS + SI_CS_OFFSET, reg);
+
+ if (MS(reg, SI_CS_DONE_ERR)) {
+ ath10k_err(ar, "failed to read device EEPROM at %04x\n", addr);
+ return -EIO;
+ }
+
+ /* extract receive data */
+ reg = ath10k_pci_read32(ar, SI_BASE_ADDRESS + SI_RX_DATA0_OFFSET);
+ *out = reg;
+
+ return 0;
+}
+
+static int ath10k_pci_fetch_target_board_data(struct ath10k *ar, void **data,
+ size_t *data_len)
+{
+ u8 *caldata = NULL;
+ size_t calsize, i;
+ int ret;
+
+ if (!QCA_REV_9887(ar))
+ return -EOPNOTSUPP;
+
+ calsize = ar->hw_params.cal_data_len;
+ caldata = kmalloc(calsize, GFP_KERNEL);
+ if (!caldata)
+ return -ENOMEM;
+
+ ath10k_pci_enable_eeprom(ar);
+
+ for (i = 0; i < calsize; i++) {
+ ret = ath10k_pci_read_eeprom(ar, i, &caldata[i]);
+ if (ret)
+ goto err_free;
+ }
+
+ if (!ath10k_pci_validate_cal(caldata, calsize))
+ goto err_free;
+
+ *data = caldata;
+ *data_len = calsize;
+
+ return 0;
+
+err_free:
+ kfree(data);
+
+ return -EINVAL;
+}
+
static const struct ath10k_hif_ops ath10k_pci_hif_ops = {
.tx_sg = ath10k_pci_hif_tx_sg,
.diag_read = ath10k_pci_hif_diag_read,
@@ -2585,6 +2723,7 @@ static const struct ath10k_hif_ops ath10k_pci_hif_ops = {
.suspend = ath10k_pci_hif_suspend,
.resume = ath10k_pci_hif_resume,
#endif
+ .fetch_target_board_data = ath10k_pci_fetch_target_board_data,
};

/*
--
2.8.1

2016-05-23 06:52:10

[permalink] [raw]

Subject: Re: [PATCH 1/2] ath10k: add QCA9887 chipset support

On Mon, May 23, 2016 at 11:52:11AM +0530, Mohammed Shafi Shajakhan wrote:
> Hi Sven,
>
> On Fri, May 20, 2016 at 04:41:11PM +0200, Sven Eckelmann wrote:
> > Add the hardware name, revision, firmware names and update the pci_id
> > table.
> >
> > QA9887 HW1.0 is supposed to be similar to QCA988X HW2.0 . Details about
> > he firmware interface are currently unknown.
> >
> > Signed-off-by: Sven Eckelmann <[email protected]>
> > ---
> > drivers/net/wireless/ath/ath10k/core.c | 20 ++++++++++++++++++++
> > drivers/net/wireless/ath/ath10k/hw.h | 10 ++++++++++
> > drivers/net/wireless/ath/ath10k/pci.c | 20 ++++++++++++++++++--
> > drivers/net/wireless/ath/ath10k/targaddrs.h | 3 +++
> > 4 files changed, 51 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
> > index 49af624..0f4a4f6 100644
> > --- a/drivers/net/wireless/ath/ath10k/core.c
> > +++ b/drivers/net/wireless/ath/ath10k/core.c
> > @@ -69,6 +69,25 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
> > },
> > },
> > {
> > + .id = QCA9887_HW_1_0_VERSION,
> > + .dev_id = QCA9887_1_0_DEVICE_ID,
> > + .name = "qca9887 hw1.0",
> > + .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
> > + .uart_pin = 7,
> > + .has_shifted_cc_wraparound = true,
> > + .otp_exe_param = 0,
> > + .channel_counters_freq_hz = 88000,
> > + .max_probe_resp_desc_thres = 0,
> > + .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
> > + .cal_data_len = 2116,
>
> [shafi] i think we can re-use QCA988X_CAL_DATA_LEN instead of a new h/w param

sorry ignore this comment, i was looking into some old code, this change looks
fine to me

>
> > + .fw = {
> > + .dir = QCA9887_HW_1_0_FW_DIR,
> > + .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
> > + .board_size = QCA9887_BOARD_DATA_SZ,
> > + .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
> > + },
> > + },
> > + {
> > .id = QCA6174_HW_2_1_VERSION,
> > .dev_id = QCA6164_2_1_DEVICE_ID,
> > .name = "qca6164 hw2.1",
> > @@ -2062,6 +2081,7 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
> >
> > switch (hw_rev) {
> > case ATH10K_HW_QCA988X:
> > + case ATH10K_HW_QCA9887:
> > ar->regs = &qca988x_regs;
> > ar->hw_values = &qca988x_values;
> > break;
> > diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
> > index aedd898..9108831 100644
> > --- a/drivers/net/wireless/ath/ath10k/hw.h
> > +++ b/drivers/net/wireless/ath/ath10k/hw.h
> > @@ -27,6 +27,7 @@
> > #define QCA6174_2_1_DEVICE_ID (0x003e)
> > #define QCA99X0_2_0_DEVICE_ID (0x0040)
> > #define QCA9377_1_0_DEVICE_ID (0x0042)
> > +#define QCA9887_1_0_DEVICE_ID (0x0050)
> >
> > /* QCA988X 1.0 definitions (unsupported) */
> > #define QCA988X_HW_1_0_CHIP_ID_REV 0x0
> > @@ -38,6 +39,13 @@
> > #define QCA988X_HW_2_0_BOARD_DATA_FILE "board.bin"
> > #define QCA988X_HW_2_0_PATCH_LOAD_ADDR 0x1234
> >
> > +/* QCA9887 1.0 definitions */
> > +#define QCA9887_HW_1_0_VERSION 0x4100016d
> > +#define QCA9887_HW_1_0_CHIP_ID_REV 0
> > +#define QCA9887_HW_1_0_FW_DIR ATH10K_FW_DIR "/QCA9887/hw1.0"
> > +#define QCA9887_HW_1_0_BOARD_DATA_FILE "board.bin"
> > +#define QCA9887_HW_1_0_PATCH_LOAD_ADDR 0x1234
> > +
> > /* QCA6174 target BMI version signatures */
> > #define QCA6174_HW_1_0_VERSION 0x05000000
> > #define QCA6174_HW_1_1_VERSION 0x05000001
> > @@ -195,6 +203,7 @@ enum ath10k_hw_rev {
> > ATH10K_HW_QCA99X0,
> > ATH10K_HW_QCA9377,
> > ATH10K_HW_QCA4019,
> > + ATH10K_HW_QCA9887,
> > };
> >
> > struct ath10k_hw_regs {
> > @@ -247,6 +256,7 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
> > u32 cc, u32 rcc, u32 cc_prev, u32 rcc_prev);
> >
> > #define QCA_REV_988X(ar) ((ar)->hw_rev == ATH10K_HW_QCA988X)
> > +#define QCA_REV_9887(ar) ((ar)->hw_rev == ATH10K_HW_QCA9887)
> > #define QCA_REV_6174(ar) ((ar)->hw_rev == ATH10K_HW_QCA6174)
> > #define QCA_REV_99X0(ar) ((ar)->hw_rev == ATH10K_HW_QCA99X0)
> > #define QCA_REV_9377(ar) ((ar)->hw_rev == ATH10K_HW_QCA9377)
> > diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
> > index 8133d7b..b799f46 100644
> > --- a/drivers/net/wireless/ath/ath10k/pci.c
> > +++ b/drivers/net/wireless/ath/ath10k/pci.c
> > @@ -57,6 +57,7 @@ static const struct pci_device_id ath10k_pci_id_table[] = {
> > { PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
> > { PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */
> > { PCI_VDEVICE(ATHEROS, QCA9377_1_0_DEVICE_ID) }, /* PCI-E QCA9377 V1 */
> > + { PCI_VDEVICE(ATHEROS, QCA9887_1_0_DEVICE_ID) }, /* PCI-E QCA9887 */
> > {0}
> > };
> >
> > @@ -83,6 +84,8 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
> >
> > { QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_0_CHIP_ID_REV },
> > { QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_1_CHIP_ID_REV },
> > +
> > + { QCA9887_1_0_DEVICE_ID, QCA9887_HW_1_0_CHIP_ID_REV },
> > };
> >
> > static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
> > @@ -837,6 +840,7 @@ static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
> >
> > switch (ar->hw_rev) {
> > case ATH10K_HW_QCA988X:
> > + case ATH10K_HW_QCA9887:
> > case ATH10K_HW_QCA6174:
> > case ATH10K_HW_QCA9377:
> > val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
> > @@ -1560,6 +1564,7 @@ static void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar)
> >
> > switch (ar->hw_rev) {
> > case ATH10K_HW_QCA988X:
> > + case ATH10K_HW_QCA9887:
> > case ATH10K_HW_QCA6174:
> > case ATH10K_HW_QCA9377:
> > val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
> > @@ -1583,6 +1588,7 @@ static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar)
> >
> > switch (ar->hw_rev) {
> > case ATH10K_HW_QCA988X:
> > + case ATH10K_HW_QCA9887:
> > case ATH10K_HW_QCA6174:
> > case ATH10K_HW_QCA9377:
> > val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
> > @@ -1932,6 +1938,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
> > switch (ar_pci->pdev->device) {
> > case QCA988X_2_0_DEVICE_ID:
> > case QCA99X0_2_0_DEVICE_ID:
> > + case QCA9887_1_0_DEVICE_ID:
> > return 1;
> > case QCA6164_2_1_DEVICE_ID:
> > case QCA6174_2_1_DEVICE_ID:
> > @@ -2295,7 +2302,7 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
> >
> > static int ath10k_pci_safe_chip_reset(struct ath10k *ar)
> > {
> > - if (QCA_REV_988X(ar) || QCA_REV_6174(ar)) {
> > + if (QCA_REV_988X(ar) || QCA_REV_9887(ar) || QCA_REV_6174(ar)) {
> > return ath10k_pci_warm_reset(ar);
> > } else if (QCA_REV_99X0(ar)) {
> > ath10k_pci_irq_disable(ar);
> > @@ -2437,7 +2444,7 @@ static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar)
> >
> > static int ath10k_pci_chip_reset(struct ath10k *ar)
> > {
> > - if (QCA_REV_988X(ar))
> > + if (QCA_REV_988X(ar) || QCA_REV_9887(ar))
> > return ath10k_pci_qca988x_chip_reset(ar);
> > else if (QCA_REV_6174(ar))
> > return ath10k_pci_qca6174_chip_reset(ar);
> > @@ -2982,6 +2989,10 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
> > hw_rev = ATH10K_HW_QCA988X;
> > pci_ps = false;
> > break;
> > + case QCA9887_1_0_DEVICE_ID:
> > + hw_rev = ATH10K_HW_QCA9887;
> > + pci_ps = false;
> > + break;
> > case QCA6164_2_1_DEVICE_ID:
> > case QCA6174_2_1_DEVICE_ID:
> > hw_rev = ATH10K_HW_QCA6174;
> > @@ -3180,6 +3191,11 @@ MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" ATH10K_FW_API5_FILE);
> > MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" QCA988X_HW_2_0_BOARD_DATA_FILE);
> > MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" ATH10K_BOARD_API2_FILE);
> >
> > +/* QCA9887 1.0 firmware files */
> > +MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" ATH10K_FW_API5_FILE);
> > +MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" QCA9887_HW_1_0_BOARD_DATA_FILE);
> > +MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" ATH10K_BOARD_API2_FILE);
> > +
> > /* QCA6174 2.1 firmware files */
> > MODULE_FIRMWARE(QCA6174_HW_2_1_FW_DIR "/" ATH10K_FW_API4_FILE);
> > MODULE_FIRMWARE(QCA6174_HW_2_1_FW_DIR "/" ATH10K_FW_API5_FILE);
> > diff --git a/drivers/net/wireless/ath/ath10k/targaddrs.h b/drivers/net/wireless/ath/ath10k/targaddrs.h
> > index 8e24099..aaf53a8 100644
> > --- a/drivers/net/wireless/ath/ath10k/targaddrs.h
> > +++ b/drivers/net/wireless/ath/ath10k/targaddrs.h
> > @@ -447,6 +447,9 @@ Fw Mode/SubMode Mask
> > #define QCA988X_BOARD_DATA_SZ 7168
> > #define QCA988X_BOARD_EXT_DATA_SZ 0
> >
> > +#define QCA9887_BOARD_DATA_SZ 7168
> > +#define QCA9887_BOARD_EXT_DATA_SZ 0
> > +
> > #define QCA6174_BOARD_DATA_SZ 8192
> > #define QCA6174_BOARD_EXT_DATA_SZ 0
> >
> > --
> > 2.8.1
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
> > the body of a message to [email protected]
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> --
> To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html

2016-05-26 17:32:36

[permalink] [raw]

Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

Sven Eckelmann <[email protected]> writes:

> the QCA9887 chip is similar to the QCA988x chips. But it requires a special
> firmware and uses a different calibration data source. Unfortunately, no
> working firmware currently exists. But it is possible to create a semi working
> one by binary patching the current version.

So what works and what doesn't?

> # download new fw + set ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX+ATH10K_FW_FEATURE_NO_P2P
> curl -o firmware-5.bin https://raw.githubusercontent.com/kvalo/ath10k-firmware/master/QCA9887/firmware-5.bin_10.2.3.31.7-1
> echo -en '\x0c'|dd conv=notrunc bs=1 seek=231112 of=firmware-5.bin
> mkdir -p /lib/firmware/ath10k/QCA9887/hw1.0/
> mv firmware-5.bin /lib/firmware/ath10k/QCA9887/hw1.0/firmware-5.bin
>
> I am also guessing that ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT should
> also be set but this would require a ie_len of 2.

I can upload a new version. So I need to add these flags:

ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX
ATH10K_FW_FEATURE_NO_P2P
ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT

Anything else?

> The QCA9887 support should be considered really experimental because we don't
> have any information how the interface to firmware actually looks like. The
> workarounds mentioned above were just implemented because we saw the firmware
> crashing and then guessed the most plausible reason for it.

Should we add a warning message to ath10k that the QCA9887 support is
experimental? That way users don't need to wonder why there are so many
problems.

There were some conflicts in patch 1. I fixed those now and pushed the
patches to the pending branch for further testing:

https://git.kernel.org/cgit/linux/kernel/git/kvalo/ath.git/log/?h=master-pending

Unfortunately I don't have QCA9887 myself so I can't test these myself.
I hope I didn't break anything.

--
Kalle Valo

2016-05-27 12:44:58

[permalink] [raw]

Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

Sven Eckelmann <[email protected]> writes:

> On Thursday 26 May 2016 17:32:30 Valo, Kalle wrote:
>> Sven Eckelmann <[email protected]> writes:
>>
>> > the QCA9887 chip is similar to the QCA988x chips. But it requires a special
>> > firmware and uses a different calibration data source. Unfortunately, no
>> > working firmware currently exists. But it is possible to create a semi working
>> > one by binary patching the current version.
>>
>> So what works and what doesn't?
>
> We currently stopped everything related to QCA9887 and so I cannot give you an
> exhaustive list. But right now basic AP functionality seems to work. The
> signal level, coverage and performance was rather bad. I cannot give you
> numbers anymore because the two actual tests with QCA9887 were done 1 year ago
> and 1/2 year ago (you know why ;) ).
>
> But maybe I should add that the results with the original AP147 firmware also
> wasn't better.

That doesn't sound good. Maybe a calibration issue?

>> I can upload a new version. So I need to add these flags:
>>
>> ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX
>> ATH10K_FW_FEATURE_NO_P2P
>> ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT
>>
>> Anything else?
>
> At least I didn't find more.

I pushed a new firmware image firmware-5.bin_10.2.3.31.7-2 with those
enabled:

https://github.com/kvalo/ath10k-firmware/tree/master/QCA9887

>> Should we add a warning message to ath10k that the QCA9887 support is
>> experimental? That way users don't need to wonder why there are so many
>> problems.
>
> Yes, this would be a good idea. I personally wouldn't know where you want
> to have this warning added. So maybe you just add it? Thanks

Sure, I can add it.

>> There were some conflicts in patch 1. I fixed those now and pushed the
>> patches to the pending branch for further testing:
>>
>> https://git.kernel.org/cgit/linux/kernel/git/kvalo/ath.git/log/?h=master-pending
>>
>> Unfortunately I don't have QCA9887 myself so I can't test these myself.
>> I hope I didn't break anything.
>
> Ah, yes. The new patches "clean up growing hw checks during safe and full reset"
> and some QCA9884 stuff seems to have created some conflicts. I have redone my
> patches on top of them and compared with your solution. We came up with the
> exact same conflict resolution. So you can at least say that I would also
> have broken it ;)

Good, so I would not get the blame myself ;)

> I have just created a compat-wireless based on your branch which I've tested
> it with my QCA9887 test card. No new problems were detected.

Great, thanks for testing!

--
Kalle Valo

2016-05-23 06:22:55

[permalink] [raw]

Subject: Re: [PATCH 1/2] ath10k: add QCA9887 chipset support

Hi Sven,

On Fri, May 20, 2016 at 04:41:11PM +0200, Sven Eckelmann wrote:
> Add the hardware name, revision, firmware names and update the pci_id
> table.
>
> QA9887 HW1.0 is supposed to be similar to QCA988X HW2.0 . Details about
> he firmware interface are currently unknown.
>
> Signed-off-by: Sven Eckelmann <[email protected]>
> ---
> drivers/net/wireless/ath/ath10k/core.c | 20 ++++++++++++++++++++
> drivers/net/wireless/ath/ath10k/hw.h | 10 ++++++++++
> drivers/net/wireless/ath/ath10k/pci.c | 20 ++++++++++++++++++--
> drivers/net/wireless/ath/ath10k/targaddrs.h | 3 +++
> 4 files changed, 51 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
> index 49af624..0f4a4f6 100644
> --- a/drivers/net/wireless/ath/ath10k/core.c
> +++ b/drivers/net/wireless/ath/ath10k/core.c
> @@ -69,6 +69,25 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
> },
> },
> {
> + .id = QCA9887_HW_1_0_VERSION,
> + .dev_id = QCA9887_1_0_DEVICE_ID,
> + .name = "qca9887 hw1.0",
> + .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
> + .uart_pin = 7,
> + .has_shifted_cc_wraparound = true,
> + .otp_exe_param = 0,
> + .channel_counters_freq_hz = 88000,
> + .max_probe_resp_desc_thres = 0,
> + .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER,
> + .cal_data_len = 2116,

[shafi] i think we can re-use QCA988X_CAL_DATA_LEN instead of a new h/w param

> + .fw = {
> + .dir = QCA9887_HW_1_0_FW_DIR,
> + .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
> + .board_size = QCA9887_BOARD_DATA_SZ,
> + .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
> + },
> + },
> + {
> .id = QCA6174_HW_2_1_VERSION,
> .dev_id = QCA6164_2_1_DEVICE_ID,
> .name = "qca6164 hw2.1",
> @@ -2062,6 +2081,7 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
>
> switch (hw_rev) {
> case ATH10K_HW_QCA988X:
> + case ATH10K_HW_QCA9887:
> ar->regs = &qca988x_regs;
> ar->hw_values = &qca988x_values;
> break;
> diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
> index aedd898..9108831 100644
> --- a/drivers/net/wireless/ath/ath10k/hw.h
> +++ b/drivers/net/wireless/ath/ath10k/hw.h
> @@ -27,6 +27,7 @@
> #define QCA6174_2_1_DEVICE_ID (0x003e)
> #define QCA99X0_2_0_DEVICE_ID (0x0040)
> #define QCA9377_1_0_DEVICE_ID (0x0042)
> +#define QCA9887_1_0_DEVICE_ID (0x0050)
>
> /* QCA988X 1.0 definitions (unsupported) */
> #define QCA988X_HW_1_0_CHIP_ID_REV 0x0
> @@ -38,6 +39,13 @@
> #define QCA988X_HW_2_0_BOARD_DATA_FILE "board.bin"
> #define QCA988X_HW_2_0_PATCH_LOAD_ADDR 0x1234
>
> +/* QCA9887 1.0 definitions */
> +#define QCA9887_HW_1_0_VERSION 0x4100016d
> +#define QCA9887_HW_1_0_CHIP_ID_REV 0
> +#define QCA9887_HW_1_0_FW_DIR ATH10K_FW_DIR "/QCA9887/hw1.0"
> +#define QCA9887_HW_1_0_BOARD_DATA_FILE "board.bin"
> +#define QCA9887_HW_1_0_PATCH_LOAD_ADDR 0x1234
> +
> /* QCA6174 target BMI version signatures */
> #define QCA6174_HW_1_0_VERSION 0x05000000
> #define QCA6174_HW_1_1_VERSION 0x05000001
> @@ -195,6 +203,7 @@ enum ath10k_hw_rev {
> ATH10K_HW_QCA99X0,
> ATH10K_HW_QCA9377,
> ATH10K_HW_QCA4019,
> + ATH10K_HW_QCA9887,
> };
>
> struct ath10k_hw_regs {
> @@ -247,6 +256,7 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
> u32 cc, u32 rcc, u32 cc_prev, u32 rcc_prev);
>
> #define QCA_REV_988X(ar) ((ar)->hw_rev == ATH10K_HW_QCA988X)
> +#define QCA_REV_9887(ar) ((ar)->hw_rev == ATH10K_HW_QCA9887)
> #define QCA_REV_6174(ar) ((ar)->hw_rev == ATH10K_HW_QCA6174)
> #define QCA_REV_99X0(ar) ((ar)->hw_rev == ATH10K_HW_QCA99X0)
> #define QCA_REV_9377(ar) ((ar)->hw_rev == ATH10K_HW_QCA9377)
> diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
> index 8133d7b..b799f46 100644
> --- a/drivers/net/wireless/ath/ath10k/pci.c
> +++ b/drivers/net/wireless/ath/ath10k/pci.c
> @@ -57,6 +57,7 @@ static const struct pci_device_id ath10k_pci_id_table[] = {
> { PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
> { PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */
> { PCI_VDEVICE(ATHEROS, QCA9377_1_0_DEVICE_ID) }, /* PCI-E QCA9377 V1 */
> + { PCI_VDEVICE(ATHEROS, QCA9887_1_0_DEVICE_ID) }, /* PCI-E QCA9887 */
> {0}
> };
>
> @@ -83,6 +84,8 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
>
> { QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_0_CHIP_ID_REV },
> { QCA9377_1_0_DEVICE_ID, QCA9377_HW_1_1_CHIP_ID_REV },
> +
> + { QCA9887_1_0_DEVICE_ID, QCA9887_HW_1_0_CHIP_ID_REV },
> };
>
> static void ath10k_pci_buffer_cleanup(struct ath10k *ar);
> @@ -837,6 +840,7 @@ static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
>
> switch (ar->hw_rev) {
> case ATH10K_HW_QCA988X:
> + case ATH10K_HW_QCA9887:
> case ATH10K_HW_QCA6174:
> case ATH10K_HW_QCA9377:
> val = (ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
> @@ -1560,6 +1564,7 @@ static void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar)
>
> switch (ar->hw_rev) {
> case ATH10K_HW_QCA988X:
> + case ATH10K_HW_QCA9887:
> case ATH10K_HW_QCA6174:
> case ATH10K_HW_QCA9377:
> val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
> @@ -1583,6 +1588,7 @@ static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar)
>
> switch (ar->hw_rev) {
> case ATH10K_HW_QCA988X:
> + case ATH10K_HW_QCA9887:
> case ATH10K_HW_QCA6174:
> case ATH10K_HW_QCA9377:
> val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
> @@ -1932,6 +1938,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
> switch (ar_pci->pdev->device) {
> case QCA988X_2_0_DEVICE_ID:
> case QCA99X0_2_0_DEVICE_ID:
> + case QCA9887_1_0_DEVICE_ID:
> return 1;
> case QCA6164_2_1_DEVICE_ID:
> case QCA6174_2_1_DEVICE_ID:
> @@ -2295,7 +2302,7 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
>
> static int ath10k_pci_safe_chip_reset(struct ath10k *ar)
> {
> - if (QCA_REV_988X(ar) || QCA_REV_6174(ar)) {
> + if (QCA_REV_988X(ar) || QCA_REV_9887(ar) || QCA_REV_6174(ar)) {
> return ath10k_pci_warm_reset(ar);
> } else if (QCA_REV_99X0(ar)) {
> ath10k_pci_irq_disable(ar);
> @@ -2437,7 +2444,7 @@ static int ath10k_pci_qca99x0_chip_reset(struct ath10k *ar)
>
> static int ath10k_pci_chip_reset(struct ath10k *ar)
> {
> - if (QCA_REV_988X(ar))
> + if (QCA_REV_988X(ar) || QCA_REV_9887(ar))
> return ath10k_pci_qca988x_chip_reset(ar);
> else if (QCA_REV_6174(ar))
> return ath10k_pci_qca6174_chip_reset(ar);
> @@ -2982,6 +2989,10 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
> hw_rev = ATH10K_HW_QCA988X;
> pci_ps = false;
> break;
> + case QCA9887_1_0_DEVICE_ID:
> + hw_rev = ATH10K_HW_QCA9887;
> + pci_ps = false;
> + break;
> case QCA6164_2_1_DEVICE_ID:
> case QCA6174_2_1_DEVICE_ID:
> hw_rev = ATH10K_HW_QCA6174;
> @@ -3180,6 +3191,11 @@ MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" ATH10K_FW_API5_FILE);
> MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" QCA988X_HW_2_0_BOARD_DATA_FILE);
> MODULE_FIRMWARE(QCA988X_HW_2_0_FW_DIR "/" ATH10K_BOARD_API2_FILE);
>
> +/* QCA9887 1.0 firmware files */
> +MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" ATH10K_FW_API5_FILE);
> +MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" QCA9887_HW_1_0_BOARD_DATA_FILE);
> +MODULE_FIRMWARE(QCA9887_HW_1_0_FW_DIR "/" ATH10K_BOARD_API2_FILE);
> +
> /* QCA6174 2.1 firmware files */
> MODULE_FIRMWARE(QCA6174_HW_2_1_FW_DIR "/" ATH10K_FW_API4_FILE);
> MODULE_FIRMWARE(QCA6174_HW_2_1_FW_DIR "/" ATH10K_FW_API5_FILE);
> diff --git a/drivers/net/wireless/ath/ath10k/targaddrs.h b/drivers/net/wireless/ath/ath10k/targaddrs.h
> index 8e24099..aaf53a8 100644
> --- a/drivers/net/wireless/ath/ath10k/targaddrs.h
> +++ b/drivers/net/wireless/ath/ath10k/targaddrs.h
> @@ -447,6 +447,9 @@ Fw Mode/SubMode Mask
> #define QCA988X_BOARD_DATA_SZ 7168
> #define QCA988X_BOARD_EXT_DATA_SZ 0
>
> +#define QCA9887_BOARD_DATA_SZ 7168
> +#define QCA9887_BOARD_EXT_DATA_SZ 0
> +
> #define QCA6174_BOARD_DATA_SZ 8192
> #define QCA6174_BOARD_EXT_DATA_SZ 0
>
> --
> 2.8.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html

2016-06-06 10:10:21

[permalink] [raw]

Subject: Re: [PATCH 2/2] ath10k: Add board data download from target

On Saturday 04 June 2016 13:26:39 you wrote:
[...]
> Looking at this again I noticed that we issue this warning even if
> EEPROM is not supported, which I think is wrong. I fixed this in the
> pending branch, the diff is below.
>
> I also renamed target_board_data to cal_eeprom because, at least to my
> understanding, the eeprom actually contains the real calibration data,
> not the board data file.
>
> Please review so that I didn't break anything.

Thanks for the changes. Looks good to me.

Kind regards,
Sven

Attachments:

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2016-06-04 13:26:45

[permalink] [raw]

Subject: Re: [PATCH 2/2] ath10k: Add board data download from target

Sven Eckelmann <[email protected]> writes:

> The QCA9887 stores its calibration data (board.bin) inside the EEPROM of
> the target. This has to be downloaded manually to allow the device to
> initialize correctly.
>
> Signed-off-by: Sven Eckelmann <[email protected]>

[...]

> --- a/drivers/net/wireless/ath/ath10k/core.c
> +++ b/drivers/net/wireless/ath/ath10k/core.c
> @@ -18,6 +18,7 @@
> #include <linux/module.h>
> #include <linux/firmware.h>
> #include <linux/of.h>
> +#include <asm/byteorder.h>
>
> #include "core.h"
> #include "mac.h"
> @@ -550,6 +551,34 @@ out:
> return ret;
> }
>
> +static int ath10k_download_cal_eeprom(struct ath10k *ar)
> +{
> + size_t data_len;
> + void *data = NULL;
> + int ret;
> +
> + ret = ath10k_hif_fetch_target_board_data(ar, &data, &data_len);
> + if (ret) {
> + ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
> + ret);
> + goto out_free;
> + }

Looking at this again I noticed that we issue this warning even if
EEPROM is not supported, which I think is wrong. I fixed this in the
pending branch, the diff is below.

I also renamed target_board_data to cal_eeprom because, at least to my
understanding, the eeprom actually contains the real calibration data,
not the board data file.

Please review so that I didn't break anything.

https://git.kernel.org/cgit/linux/kernel/git/kvalo/ath.git/commit/?h=pending&id=4f79bdf2db7bcfa9c7c093fd423af801b9797c63

diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
index 10a1b620a68b..1e88251ca6d0 100644
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -580,10 +580,11 @@ static int ath10k_download_cal_eeprom(struct ath10k *ar)
void *data = NULL;
int ret;

- ret = ath10k_hif_fetch_target_board_data(ar, &data, &data_len);
+ ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
if (ret) {
- ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
- ret);
+ if (ret != -EOPNOTSUPP)
+ ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
+ ret);
goto out_free;
}

diff --git a/drivers/net/wireless/ath/ath10k/hif.h b/drivers/net/wireless/ath/ath10k/hif.h
index c18b8c81bde4..b2566b06e1e1 100644
--- a/drivers/net/wireless/ath/ath10k/hif.h
+++ b/drivers/net/wireless/ath/ath10k/hif.h
@@ -88,9 +88,9 @@ struct ath10k_hif_ops {
int (*suspend)(struct ath10k *ar);
int (*resume)(struct ath10k *ar);

- /* fetch board data from target eeprom */
- int (*fetch_target_board_data)(struct ath10k *ar, void **data,
- size_t *data_len);
+ /* fetch calibration data from target eeprom */
+ int (*fetch_cal_eeprom)(struct ath10k *ar, void **data,
+ size_t *data_len);
};

static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
@@ -206,14 +206,14 @@ static inline void ath10k_hif_write32(struct ath10k *ar,
ar->hif.ops->write32(ar, address, data);
}

-static inline int ath10k_hif_fetch_target_board_data(struct ath10k *ar,
- void **data,
- size_t *data_len)
+static inline int ath10k_hif_fetch_cal_eeprom(struct ath10k *ar,
+ void **data,
+ size_t *data_len)
{
- if (!ar->hif.ops->fetch_target_board_data)
+ if (!ar->hif.ops->fetch_cal_eeprom)
return -EOPNOTSUPP;

- return ar->hif.ops->fetch_target_board_data(ar, data, data_len);
+ return ar->hif.ops->fetch_cal_eeprom(ar, data, data_len);
}

#endif /* _HIF_H_ */
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index fb53f8846efd..f06dd3941bac 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2678,8 +2678,8 @@ static int ath10k_pci_read_eeprom(struct ath10k *ar, u16 addr, u8 *out)
return 0;
}

-static int ath10k_pci_fetch_target_board_data(struct ath10k *ar, void **data,
- size_t *data_len)
+static int ath10k_pci_hif_fetch_cal_eeprom(struct ath10k *ar, void **data,
+ size_t *data_len)
{
u8 *caldata = NULL;
size_t calsize, i;
@@ -2734,7 +2734,7 @@ static const struct ath10k_hif_ops ath10k_pci_hif_ops = {
.suspend = ath10k_pci_hif_suspend,
.resume = ath10k_pci_hif_resume,
#endif
- .fetch_target_board_data = ath10k_pci_fetch_target_board_data,
+ .fetch_cal_eeprom = ath10k_pci_hif_fetch_cal_eeprom,
};

/*

--
Kalle Valo

2016-06-09 05:07:09

[permalink] [raw]

Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

Hi Sven,

i have something like this as of now(generically
disabling TX-STBC for streams <= 1 just like ath9k
does

--- a/drivers/net/wireless/ath/ath10k/mac.c
+++ b/drivers/net/wireless/ath/ath10k/mac.c
@@ -4194,6 +4194,9 @@ static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar)
mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2);
}

+ if (ar->cfg_tx_chainmask <= 1)
+ vht_cap.cap &= ~IEEE80211_VHT_CAP_TXSTBC;
+
vht_cap.vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
vht_cap.vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);

@@ -4231,7 +4234,7 @@ static struct ieee80211_sta_ht_cap ath10k_get_ht_cap(struct ath10k *ar)
ht_cap.cap |= smps;
}

- if (ar->ht_cap_info & WMI_HT_CAP_TX_STBC)
+ if (ar->ht_cap_info & WMI_HT_CAP_TX_STBC && (ar->cfg_tx_chainmask > 1))
ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;

if (ar->ht_cap_info & WMI_HT_CAP_RX_STBC) {
--

regards,
shafi

On Wed, Jun 08, 2016 at 06:13:08PM +0530, Mohammed Shafi Shajakhan wrote:
> On Tue, Jun 07, 2016 at 10:41:48PM +0530, Mohammed Shafi Shajakhan wrote:
> > Hi Sven,
> >
> > On Tue, Jun 07, 2016 at 06:54:54PM +0200, Sven Eckelmann wrote:
> > > On Tuesday 07 June 2016 20:20:02 Mohammed Shafi Shajakhan wrote:
> > > [...]
> > > > [shafi] it would be helpful if you can share your basic test results (if its
> > > > possible to share). Have you tried to bring up the card in 5ghz (or) 2ghz.
> > > > Or both of them were tried ?
> > >
> > > * 5GHz-only (I have no 2.4GHz capable card)
> > > * card is able to scan
> > > * card is able to create an AP
> > > * data can be transferred via AP and client (bidirectional connection)
> > > * performance was more like 15 Mibit/s for 1x1 HT20 11n devices instead of
> > > something like 35-40 Mibit/s
> >
> > [shafi] sure thanks a lot, this is a good start, i will keep you posted
> > with my findings and results.
>
> [shafi] request if you can disable TX-STBC for both HT and VHT, it helped
> me though. Will keep you posted with more updates.
>
> >
> > >
> > > I cannot give you any more detailed, current performance test results because
> > > they were done months ago and are most likely not relevant to describe the
> > > current state. Please ask Kalle if you want to know why the old tests were
> > > done many, many months ago.
> >
> > [shafi] sure, hopefully we can get this sorted out. Thank you for the patches
> > and support.
> >
> > >
> > > Please ask Marek when you want to have tests done with the current
> > > mac8011+ath10k.
> >
> > [shafi] thanks
> >
> > >
> > > Kind regards,
> > > Sven
> >
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
> > the body of a message to [email protected]
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> --
> To unsubscribe from this list: send the line "unsubscribe linux-wireless" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html

2016-06-04 13:21:10

[permalink] [raw]

Subject: Re: [PATCH 1/2] ath10k: add QCA9887 chipset support

Sven Eckelmann <[email protected]> writes:

> Add the hardware name, revision, firmware names and update the pci_id
> table.
>
> QA9887 HW1.0 is supposed to be similar to QCA988X HW2.0 . Details about
> he firmware interface are currently unknown.
>
> Signed-off-by: Sven Eckelmann <[email protected]>

I added the warning we talked about, diff below. Full patch in the
pending branch:

https://git.kernel.org/cgit/linux/kernel/git/kvalo/ath.git/commit/?h=pending&id=ed730faad11df99f2aba3b8d78ac5587c3403e69

diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index d34c32a075ac..3e8e7ed6faa1 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -3005,6 +3005,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
pci_hard_reset = ath10k_pci_qca988x_chip_reset;
break;
case QCA9887_1_0_DEVICE_ID:
+ dev_warn(&pdev->dev, "QCA9887 support is still experimental, there are likely bugs. You have been warned.\n");
hw_rev = ATH10K_HW_QCA9887;
pci_ps = false;
pci_soft_reset = ath10k_pci_warm_reset;

--
Kalle Valo

2016-06-07 11:29:41

[permalink] [raw]

Subject: Re: [1/2] ath10k: add QCA9887 chipset support

Sven Eckelmann <[email protected]> wrote:
> Add the hardware name, revision, firmware names and update the pci_id
> table.
>
> QA9887 HW1.0 is supposed to be similar to QCA988X HW2.0 . Details about
> he firmware interface are currently unknown.
>
> Signed-off-by: Sven Eckelmann <[email protected]>

Thanks, 2 patches applied to ath-next branch of ath.git:

6fd3dd716091 ath10k: add QCA9887 chipset support
6847f9673391 ath10k: add board data download from target

--
Sent by pwcli
https://patchwork.kernel.org/patch/9129717/

2016-06-07 14:50:10

[permalink] [raw]

Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

Hi Sven,

On Mon, May 30, 2016 at 01:12:27PM +0200, Sven Eckelmann wrote:
> On Friday 27 May 2016 12:44:52 Valo, Kalle wrote:
> [...]
> > > But maybe I should add that the results with the original AP147 firmware also
> > > wasn't better.
> >
> > That doesn't sound good. Maybe a calibration issue?
>
> Maybe but I don't have a different card to compare it to.
>
> [...]
> > I pushed a new firmware image firmware-5.bin_10.2.3.31.7-2 with those
> > enabled:
> >
> > https://github.com/kvalo/ath10k-firmware/tree/master/QCA9887
>
> Thanks for the updated firmware file. I have done some basic tests and seems
> to work fine. Bindiff also looks fine
>
[shafi] it would be helpful if you can share your basic test results (if its
possible to share). Have you tried to bring up the card in 5ghz (or) 2ghz.
Or both of them were tried ?

regards
shafi

2016-06-07 16:55:01

[permalink] [raw]

Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

On Tuesday 07 June 2016 20:20:02 Mohammed Shafi Shajakhan wrote:
[...]
> [shafi] it would be helpful if you can share your basic test results (if its
> possible to share). Have you tried to bring up the card in 5ghz (or) 2ghz.
> Or both of them were tried ?

* 5GHz-only (I have no 2.4GHz capable card)
* card is able to scan
* card is able to create an AP
* data can be transferred via AP and client (bidirectional connection)
* performance was more like 15 Mibit/s for 1x1 HT20 11n devices instead of
something like 35-40 Mibit/s

I cannot give you any more detailed, current performance test results because
they were done months ago and are most likely not relevant to describe the
current state. Please ask Kalle if you want to know why the old tests were
done many, many months ago.

Please ask Marek when you want to have tests done with the current
mac8011+ath10k.

Kind regards,
Sven

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2016-06-08 12:43:17

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Subject: Re: [PATCH 0/2] ath10k: Add support for QCA9887

On Tue, Jun 07, 2016 at 10:41:48PM +0530, Mohammed Shafi Shajakhan wrote:
> Hi Sven,
>
> On Tue, Jun 07, 2016 at 06:54:54PM +0200, Sven Eckelmann wrote:
> > On Tuesday 07 June 2016 20:20:02 Mohammed Shafi Shajakhan wrote:
> > [...]
> > > [shafi] it would be helpful if you can share your basic test results (if its
> > > possible to share). Have you tried to bring up the card in 5ghz (or) 2ghz.
> > > Or both of them were tried ?
> >
> > * 5GHz-only (I have no 2.4GHz capable card)
> > * card is able to scan
> > * card is able to create an AP
> > * data can be transferred via AP and client (bidirectional connection)
> > * performance was more like 15 Mibit/s for 1x1 HT20 11n devices instead of
> > something like 35-40 Mibit/s
>
> [shafi] sure thanks a lot, this is a good start, i will keep you posted
> with my findings and results.

[shafi] request if you can disable TX-STBC for both HT and VHT, it helped
me though. Will keep you posted with more updates.

>
> >
> > I cannot give you any more detailed, current performance test results because
> > they were done months ago and are most likely not relevant to describe the
> > current state. Please ask Kalle if you want to know why the old tests were
> > done many, many months ago.
>
> [shafi] sure, hopefully we can get this sorted out. Thank you for the patches
> and support.
>
> >
> > Please ask Marek when you want to have tests done with the current
> > mac8011+ath10k.
>
> [shafi] thanks
>
> >
> > Kind regards,
> > Sven
>
>
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2016-06-07 17:12:01