AR9003 series allows to calibrate noise floor for different frequency
bins. Once it's done it's possible to get more accurate rssi/signal
values over whole frequency band at a given temperature.
The RSSI/signal accuracy reported by calibrated RF cards improves
from 6 to up to 2dB.
This could be interesting for application which require good signal
accuracy like roaming or mesh protocols.
Wojciech Dubowik (4):
ath9k: Alternative EEPROM size for AR9003
ath9k: Read noise floor calibration data from eeprom
ath9k: Use calibrated noise floor value when available
ath9k: Display calibration data piers in debugfs
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 133 +++++++++++++++++++++++--
drivers/net/wireless/ath/ath9k/ar9003_eeprom.h | 10 ++
drivers/net/wireless/ath/ath9k/calib.c | 38 ++++---
drivers/net/wireless/ath/ath9k/hw.h | 2 +
4 files changed, 160 insertions(+), 23 deletions(-)
--
2.7.4
Wojciech Dubowik <[email protected]> writes:
> AR9003 series allows to calibrate noise floor for different frequency
> bins. Once it's done it's possible to get more accurate rssi/signal
> values over whole frequency band at a given temperature.
> The RSSI/signal accuracy reported by calibrated RF cards improves
> from 6 to up to 2dB.
>
> This could be interesting for application which require good signal
> accuracy like roaming or mesh protocols.
This is a very good description of the feature. I think you should copy
it to the patch 3 commit log so that it gets archived to git. (I don't
store cover letters to git.)
--
Kalle Valo
On 26/01/18 12:35, Sebastian Gottschall wrote:
> after reverting your patches all looks normal again. noise is -95
>
> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat dump_nfcal
> Channel Noise Floor : -95
> Chain | privNF | # Readings | NF Readings
> 0 -108 5 -108 -108 -107 -108 -108
> 1 -106 5 -106 -106 -106 -105 -106
I will send a patch which fixes it. I have been taking per chain nominal
noise
which is not the same as per channel noise.
>
>
> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
> 2GHz modal Header :
> Chain0 Ant. Control : 0
> Chain1 Ant. Control : 0
> Chain2 Ant. Control : 0
> Ant. Common Control : 0
> Chain0 Ant. Gain : 0
> Chain1 Ant. Gain : 0
> Chain2 Ant. Gain : 0
> Switch Settle : 45
> Chain0 TxRxAtten : 11
> Chain1 TxRxAtten : 11
> Chain2 TxRxAtten : 11
> Chain0 RxTxMargin : 11
> Chain1 RxTxMargin : 11
> Chain2 RxTxMargin : 11
> ADC Desired size : 224
> PGA Desired size : 0
> Chain0 xlna Gain : 14
> Chain1 xlna Gain : 14
> Chain2 xlna Gain : 14
> txEndToXpaOff : 0
> txEndToRxOn : 2
> txFrameToXpaOn : 14
> CCA Threshold) : 0
> Chain0 NF Threshold : 202
> Chain1 NF Threshold : 202
> Chain2 NF Threshold : 202
> xpdGain : 9
> External PD : 1
> Chain0 I Coefficient : 0
> Chain1 I Coefficient : 0
> Chain2 I Coefficient : 0
> Chain0 Q Coefficient : 0
> Chain1 Q Coefficient : 0
> Chain2 Q Coefficient : 0
> pdGainOverlap : 6
> Chain0 OutputBias : 2
> Chain0 DriverBias : 2
> xPA Bias Level : 0
> 2chain pwr decrease : 0
> 3chain pwr decrease : 0
> txFrameToDataStart : 14
> txFrameToPaOn : 14
> HT40 Power Inc. : 2
> Chain0 bswAtten : 21
> Chain1 bswAtten : 21
> Chain2 bswAtten : 0
> Chain0 bswMargin : 31
> Chain1 bswMargin : 31
> Chain2 bswMargin : 0
> HT40 Switch Settle : 44
> Chain0 xatten2Db : 0
> Chain1 xatten2Db : 0
> Chain2 xatten2Db : 0
> Chain0 xatten2Margin : 0
> Chain1 xatten2Margin : 0
> Chain2 xatten2Margin : 0
> Chain1 OutputBias : 2
> Chain1 DriverBias : 2
> LNA Control : 13
> XPA Bias Freq0 : 0
> XPA Bias Freq1 : 0
> XPA Bias Freq2 : 0
> 5GHz modal Header :
> Chain0 Ant. Control : 16
> Chain1 Ant. Control : 16
> Chain2 Ant. Control : 0
> Ant. Common Control : 288
> Chain0 Ant. Gain : 0
> Chain1 Ant. Gain : 0
> Chain2 Ant. Gain : 0
> Switch Settle : 45
> Chain0 TxRxAtten : 32
> Chain1 TxRxAtten : 32
> Chain2 TxRxAtten : 11
> Chain0 RxTxMargin : 0
> Chain1 RxTxMargin : 0
> Chain2 RxTxMargin : 16
> ADC Desired size : 226
> PGA Desired size : 0
> Chain0 xlna Gain : 13
> Chain1 xlna Gain : 13
> Chain2 xlna Gain : 13
> txEndToXpaOff : 0
> txEndToRxOn : 2
> txFrameToXpaOn : 14
> CCA Threshold) : 28
> Chain0 NF Threshold : 255
> Chain1 NF Threshold : 255
> Chain2 NF Threshold : 255
> xpdGain : 1
> External PD : 1
> Chain0 I Coefficient : 0
> Chain1 I Coefficient : 0
> Chain2 I Coefficient : 0
> Chain0 Q Coefficient : 0
> Chain1 Q Coefficient : 0
> Chain2 Q Coefficient : 0
> pdGainOverlap : 6
> Chain0 OutputBias : 3
> Chain0 DriverBias : 3
> xPA Bias Level : 2
> 2chain pwr decrease : 0
> 3chain pwr decrease : 0
> txFrameToDataStart : 14
> txFrameToPaOn : 14
> HT40 Power Inc. : 0
> Chain0 bswAtten : 34
> Chain1 bswAtten : 34
> Chain2 bswAtten : 0
> Chain0 bswMargin : 22
> Chain1 bswMargin : 22
> Chain2 bswMargin : 0
> HT40 Switch Settle : 45
> Chain0 xatten2Db : 0
> Chain1 xatten2Db : 0
> Chain2 xatten2Db : 0
> Chain0 xatten2Margin : 0
> Chain1 xatten2Margin : 0
> Chain2 xatten2Margin : 0
> Chain1 OutputBias : 3
> Chain1 DriverBias : 3
> LNA Control : 13
> XPA Bias Freq0 : 0
> XPA Bias Freq1 : 0
> XPA Bias Freq2 : 0
>
>
> Am 26.01.2018 um 12:07 schrieb Wojciech Dubowik:
>> Are you sure you have applied path 4 in the series. You should see
>> calibration piers. Sth like:
>>
>> Calibration data
>> Chain 0
>> Freq ref volt temp nf_cal nf_pow rx_temp
>> 2412 14 0 136 0 0 0
>> 2437 13 0 136 0 0 0
>> 2472 11 0 136 0 0 0
>> Chain 1
>> Freq ref volt temp nf_cal nf_pow rx_temp
>> 2412 11 0 137 0 0 0
>> 2437 11 0 139 0 0 0
>> 2472 10 0 137 0 0 0
>> Chain 2
>> Freq ref volt temp nf_cal nf_pow rx_temp
>> 2412 13 0 138 0 0 0
>> 2437 14 0 139 0 0 0
>> 2472 14 0 139 0 0 0
>>
>> I have just done backports from ath.git and I can see these entries
>> with my Compex card.
>>
>> Wojtek
>>
>>
>> On 26/01/18 11:36, Sebastian Gottschall wrote:
>>> Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
>>>> I will try it with again with couple of OEM cards.
>>> this is no card. the eeprom is stored in flash memory. so the chip
>>> is a 9280 pcie chip which is connected on board, but has no own
>>> flash memory for calibration data. this is stored in system flash
>>> memory
>>>>
>>>> Is nanostation calibrated for noisefloor? You can see it with
>>>> modal_eeprom in debugfs.
>>> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
>>> 2GHz modal Header :
>>> Chain0 Ant. Control : 0
>>> Chain1 Ant. Control : 0
>>> Chain2 Ant. Control : 0
>>> Ant. Common Control : 0
>>> Chain0 Ant. Gain : 0
>>> Chain1 Ant. Gain : 0
>>> Chain2 Ant. Gain : 0
>>> Switch Settle : 45
>>> Chain0 TxRxAtten : 11
>>> Chain1 TxRxAtten : 11
>>> Chain2 TxRxAtten : 11
>>> Chain0 RxTxMargin : 11
>>> Chain1 RxTxMargin : 11
>>> Chain2 RxTxMargin : 11
>>> ADC Desired size : 224
>>> PGA Desired size : 0
>>> Chain0 xlna Gain : 14
>>> Chain1 xlna Gain : 14
>>> Chain2 xlna Gain : 14
>>> txEndToXpaOff : 0
>>> txEndToRxOn : 2
>>> txFrameToXpaOn : 14
>>> CCA Threshold) : 0
>>> Chain0 NF Threshold : 202
>>> Chain1 NF Threshold : 202
>>> Chain2 NF Threshold : 202
>>> xpdGain : 9
>>> External PD : 1
>>> Chain0 I Coefficient : 0
>>> Chain1 I Coefficient : 0
>>> Chain2 I Coefficient : 0
>>> Chain0 Q Coefficient : 0
>>> Chain1 Q Coefficient : 0
>>> Chain2 Q Coefficient : 0
>>> pdGainOverlap : 6
>>> Chain0 OutputBias : 2
>>> Chain0 DriverBias : 2
>>> xPA Bias Level : 0
>>> 2chain pwr decrease : 0
>>> 3chain pwr decrease : 0
>>> txFrameToDataStart : 14
>>> txFrameToPaOn : 14
>>> HT40 Power Inc. : 2
>>> Chain0 bswAtten : 21
>>> Chain1 bswAtten : 21
>>> Chain2 bswAtten : 0
>>> Chain0 bswMargin : 31
>>> Chain1 bswMargin : 31
>>> Chain2 bswMargin : 0
>>> HT40 Switch Settle : 44
>>> Chain0 xatten2Db : 0
>>> Chain1 xatten2Db : 0
>>> Chain2 xatten2Db : 0
>>> Chain0 xatten2Margin : 0
>>> Chain1 xatten2Margin : 0
>>> Chain2 xatten2Margin : 0
>>> Chain1 OutputBias : 2
>>> Chain1 DriverBias : 2
>>> LNA Control : 13
>>> XPA Bias Freq0 : 0
>>> XPA Bias Freq1 : 0
>>> XPA Bias Freq2 : 0
>>> 5GHz modal Header :
>>> Chain0 Ant. Control : 16
>>> Chain1 Ant. Control : 16
>>> Chain2 Ant. Control : 0
>>> Ant. Common Control : 288
>>> Chain0 Ant. Gain : 0
>>> Chain1 Ant. Gain : 0
>>> Chain2 Ant. Gain : 0
>>> Switch Settle : 45
>>> Chain0 TxRxAtten : 32
>>> Chain1 TxRxAtten : 32
>>> Chain2 TxRxAtten : 11
>>> Chain0 RxTxMargin : 0
>>> Chain1 RxTxMargin : 0
>>> Chain2 RxTxMargin : 16
>>> ADC Desired size : 226
>>> PGA Desired size : 0
>>> Chain0 xlna Gain : 13
>>> Chain1 xlna Gain : 13
>>> Chain2 xlna Gain : 13
>>> txEndToXpaOff : 0
>>> txEndToRxOn : 2
>>> txFrameToXpaOn : 14
>>> CCA Threshold) : 28
>>> Chain0 NF Threshold : 255
>>> Chain1 NF Threshold : 255
>>> Chain2 NF Threshold : 255
>>> xpdGain : 1
>>> External PD : 1
>>> Chain0 I Coefficient : 0
>>> Chain1 I Coefficient : 0
>>> Chain2 I Coefficient : 0
>>> Chain0 Q Coefficient : 0
>>> Chain1 Q Coefficient : 0
>>> Chain2 Q Coefficient : 0
>>> pdGainOverlap : 6
>>> Chain0 OutputBias : 3
>>> Chain0 DriverBias : 3
>>> xPA Bias Level : 2
>>> 2chain pwr decrease : 0
>>> 3chain pwr decrease : 0
>>> txFrameToDataStart : 14
>>> txFrameToPaOn : 14
>>> HT40 Power Inc. : 0
>>> Chain0 bswAtten : 34
>>> Chain1 bswAtten : 34
>>> Chain2 bswAtten : 0
>>> Chain0 bswMargin : 22
>>> Chain1 bswMargin : 22
>>> Chain2 bswMargin : 0
>>> HT40 Switch Settle : 45
>>> Chain0 xatten2Db : 0
>>> Chain1 xatten2Db : 0
>>> Chain2 xatten2Db : 0
>>> Chain0 xatten2Margin : 0
>>> Chain1 xatten2Margin : 0
>>> Chain2 xatten2Margin : 0
>>> Chain1 OutputBias : 3
>>> Chain1 DriverBias : 3
>>> LNA Control : 13
>>> XPA Bias Freq0 : 0
>>> XPA Bias Freq1 : 0
>>> XPA Bias Freq2 : 0
>>>
>>>>
>>>> Wojtek
>>>> On 26/01/18 10:59, Sebastian Gottschall wrote:
>>>>> i dont know if this is a coincidence. but after testing your patch
>>>>> on a standard ubiquiti nanostation m2 the noise floor looks wrong.
>>>>> it will stay on -112 which is clearly impossible in 2.4 (before it
>>>>> was around -96)
>>>>
>>>>
>>>
>>
>>
>
On 26/01/18 12:42, Sebastian Gottschall wrote:
> i have a idea what one cause could ne
>
> + nfval =
> + ath9k_hw_get_nf_limits(ah, chan)->cal[i];
> + if (nfval > -60 || nfval < -127)
> + nfval = default_nf;
>
This is just a check to make sure we have sane calibrated values.
Anything above -60 or under -127 will not work so
we take nominal value.
> this code here will allways return the default_nf since all possible
> returned values are within that range
> and the || is likelly wrong too and must be replaced with &&. but the
> range itself looks bogus. can't be right
>
> so please do me a favor and test your code against 9280 chipsets too
> and check if its working. right now its a full regression incidence
> and should be reverted
>
>
>
> Am 26.01.2018 um 12:07 schrieb Wojciech Dubowik:
>> Are you sure you have applied path 4 in the series. You should see
>> calibration piers. Sth like:
>>
>> Calibration data
>> Chain 0
>> Freq ref volt temp nf_cal nf_pow rx_temp
>> 2412 14 0 136 0 0 0
>> 2437 13 0 136 0 0 0
>> 2472 11 0 136 0 0 0
>> Chain 1
>> Freq ref volt temp nf_cal nf_pow rx_temp
>> 2412 11 0 137 0 0 0
>> 2437 11 0 139 0 0 0
>> 2472 10 0 137 0 0 0
>> Chain 2
>> Freq ref volt temp nf_cal nf_pow rx_temp
>> 2412 13 0 138 0 0 0
>> 2437 14 0 139 0 0 0
>> 2472 14 0 139 0 0 0
>>
>> I have just done backports from ath.git and I can see these entries
>> with my Compex card.
>>
>> Wojtek
>>
>>
>> On 26/01/18 11:36, Sebastian Gottschall wrote:
>>> Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
>>>> I will try it with again with couple of OEM cards.
>>> this is no card. the eeprom is stored in flash memory. so the chip
>>> is a 9280 pcie chip which is connected on board, but has no own
>>> flash memory for calibration data. this is stored in system flash
>>> memory
>>>>
>>>> Is nanostation calibrated for noisefloor? You can see it with
>>>> modal_eeprom in debugfs.
>>> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
>>> 2GHz modal Header :
>>> Chain0 Ant. Control : 0
>>> Chain1 Ant. Control : 0
>>> Chain2 Ant. Control : 0
>>> Ant. Common Control : 0
>>> Chain0 Ant. Gain : 0
>>> Chain1 Ant. Gain : 0
>>> Chain2 Ant. Gain : 0
>>> Switch Settle : 45
>>> Chain0 TxRxAtten : 11
>>> Chain1 TxRxAtten : 11
>>> Chain2 TxRxAtten : 11
>>> Chain0 RxTxMargin : 11
>>> Chain1 RxTxMargin : 11
>>> Chain2 RxTxMargin : 11
>>> ADC Desired size : 224
>>> PGA Desired size : 0
>>> Chain0 xlna Gain : 14
>>> Chain1 xlna Gain : 14
>>> Chain2 xlna Gain : 14
>>> txEndToXpaOff : 0
>>> txEndToRxOn : 2
>>> txFrameToXpaOn : 14
>>> CCA Threshold) : 0
>>> Chain0 NF Threshold : 202
>>> Chain1 NF Threshold : 202
>>> Chain2 NF Threshold : 202
>>> xpdGain : 9
>>> External PD : 1
>>> Chain0 I Coefficient : 0
>>> Chain1 I Coefficient : 0
>>> Chain2 I Coefficient : 0
>>> Chain0 Q Coefficient : 0
>>> Chain1 Q Coefficient : 0
>>> Chain2 Q Coefficient : 0
>>> pdGainOverlap : 6
>>> Chain0 OutputBias : 2
>>> Chain0 DriverBias : 2
>>> xPA Bias Level : 0
>>> 2chain pwr decrease : 0
>>> 3chain pwr decrease : 0
>>> txFrameToDataStart : 14
>>> txFrameToPaOn : 14
>>> HT40 Power Inc. : 2
>>> Chain0 bswAtten : 21
>>> Chain1 bswAtten : 21
>>> Chain2 bswAtten : 0
>>> Chain0 bswMargin : 31
>>> Chain1 bswMargin : 31
>>> Chain2 bswMargin : 0
>>> HT40 Switch Settle : 44
>>> Chain0 xatten2Db : 0
>>> Chain1 xatten2Db : 0
>>> Chain2 xatten2Db : 0
>>> Chain0 xatten2Margin : 0
>>> Chain1 xatten2Margin : 0
>>> Chain2 xatten2Margin : 0
>>> Chain1 OutputBias : 2
>>> Chain1 DriverBias : 2
>>> LNA Control : 13
>>> XPA Bias Freq0 : 0
>>> XPA Bias Freq1 : 0
>>> XPA Bias Freq2 : 0
>>> 5GHz modal Header :
>>> Chain0 Ant. Control : 16
>>> Chain1 Ant. Control : 16
>>> Chain2 Ant. Control : 0
>>> Ant. Common Control : 288
>>> Chain0 Ant. Gain : 0
>>> Chain1 Ant. Gain : 0
>>> Chain2 Ant. Gain : 0
>>> Switch Settle : 45
>>> Chain0 TxRxAtten : 32
>>> Chain1 TxRxAtten : 32
>>> Chain2 TxRxAtten : 11
>>> Chain0 RxTxMargin : 0
>>> Chain1 RxTxMargin : 0
>>> Chain2 RxTxMargin : 16
>>> ADC Desired size : 226
>>> PGA Desired size : 0
>>> Chain0 xlna Gain : 13
>>> Chain1 xlna Gain : 13
>>> Chain2 xlna Gain : 13
>>> txEndToXpaOff : 0
>>> txEndToRxOn : 2
>>> txFrameToXpaOn : 14
>>> CCA Threshold) : 28
>>> Chain0 NF Threshold : 255
>>> Chain1 NF Threshold : 255
>>> Chain2 NF Threshold : 255
>>> xpdGain : 1
>>> External PD : 1
>>> Chain0 I Coefficient : 0
>>> Chain1 I Coefficient : 0
>>> Chain2 I Coefficient : 0
>>> Chain0 Q Coefficient : 0
>>> Chain1 Q Coefficient : 0
>>> Chain2 Q Coefficient : 0
>>> pdGainOverlap : 6
>>> Chain0 OutputBias : 3
>>> Chain0 DriverBias : 3
>>> xPA Bias Level : 2
>>> 2chain pwr decrease : 0
>>> 3chain pwr decrease : 0
>>> txFrameToDataStart : 14
>>> txFrameToPaOn : 14
>>> HT40 Power Inc. : 0
>>> Chain0 bswAtten : 34
>>> Chain1 bswAtten : 34
>>> Chain2 bswAtten : 0
>>> Chain0 bswMargin : 22
>>> Chain1 bswMargin : 22
>>> Chain2 bswMargin : 0
>>> HT40 Switch Settle : 45
>>> Chain0 xatten2Db : 0
>>> Chain1 xatten2Db : 0
>>> Chain2 xatten2Db : 0
>>> Chain0 xatten2Margin : 0
>>> Chain1 xatten2Margin : 0
>>> Chain2 xatten2Margin : 0
>>> Chain1 OutputBias : 3
>>> Chain1 DriverBias : 3
>>> LNA Control : 13
>>> XPA Bias Freq0 : 0
>>> XPA Bias Freq1 : 0
>>> XPA Bias Freq2 : 0
>>>
>>>>
>>>> Wojtek
>>>> On 26/01/18 10:59, Sebastian Gottschall wrote:
>>>>> i dont know if this is a coincidence. but after testing your patch
>>>>> on a standard ubiquiti nanostation m2 the noise floor looks wrong.
>>>>> it will stay on -112 which is clearly impossible in 2.4 (before it
>>>>> was around -96)
>>>>
>>>>
>>>
>>
>>
>
Are you sure you have applied path 4 in the series. You should see
calibration piers. Sth like:
Calibration data
Chain 0
Freq ref volt temp nf_cal nf_pow rx_temp
2412 14 0 136 0 0 0
2437 13 0 136 0 0 0
2472 11 0 136 0 0 0
Chain 1
Freq ref volt temp nf_cal nf_pow rx_temp
2412 11 0 137 0 0 0
2437 11 0 139 0 0 0
2472 10 0 137 0 0 0
Chain 2
Freq ref volt temp nf_cal nf_pow rx_temp
2412 13 0 138 0 0 0
2437 14 0 139 0 0 0
2472 14 0 139 0 0 0
I have just done backports from ath.git and I can see these entries with
my Compex card.
Wojtek
On 26/01/18 11:36, Sebastian Gottschall wrote:
> Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
>> I will try it with again with couple of OEM cards.
> this is no card. the eeprom is stored in flash memory. so the chip is
> a 9280 pcie chip which is connected on board, but has no own flash
> memory for calibration data. this is stored in system flash memory
>>
>> Is nanostation calibrated for noisefloor? You can see it with
>> modal_eeprom in debugfs.
> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
> 2GHz modal Header :
> Chain0 Ant. Control : 0
> Chain1 Ant. Control : 0
> Chain2 Ant. Control : 0
> Ant. Common Control : 0
> Chain0 Ant. Gain : 0
> Chain1 Ant. Gain : 0
> Chain2 Ant. Gain : 0
> Switch Settle : 45
> Chain0 TxRxAtten : 11
> Chain1 TxRxAtten : 11
> Chain2 TxRxAtten : 11
> Chain0 RxTxMargin : 11
> Chain1 RxTxMargin : 11
> Chain2 RxTxMargin : 11
> ADC Desired size : 224
> PGA Desired size : 0
> Chain0 xlna Gain : 14
> Chain1 xlna Gain : 14
> Chain2 xlna Gain : 14
> txEndToXpaOff : 0
> txEndToRxOn : 2
> txFrameToXpaOn : 14
> CCA Threshold) : 0
> Chain0 NF Threshold : 202
> Chain1 NF Threshold : 202
> Chain2 NF Threshold : 202
> xpdGain : 9
> External PD : 1
> Chain0 I Coefficient : 0
> Chain1 I Coefficient : 0
> Chain2 I Coefficient : 0
> Chain0 Q Coefficient : 0
> Chain1 Q Coefficient : 0
> Chain2 Q Coefficient : 0
> pdGainOverlap : 6
> Chain0 OutputBias : 2
> Chain0 DriverBias : 2
> xPA Bias Level : 0
> 2chain pwr decrease : 0
> 3chain pwr decrease : 0
> txFrameToDataStart : 14
> txFrameToPaOn : 14
> HT40 Power Inc. : 2
> Chain0 bswAtten : 21
> Chain1 bswAtten : 21
> Chain2 bswAtten : 0
> Chain0 bswMargin : 31
> Chain1 bswMargin : 31
> Chain2 bswMargin : 0
> HT40 Switch Settle : 44
> Chain0 xatten2Db : 0
> Chain1 xatten2Db : 0
> Chain2 xatten2Db : 0
> Chain0 xatten2Margin : 0
> Chain1 xatten2Margin : 0
> Chain2 xatten2Margin : 0
> Chain1 OutputBias : 2
> Chain1 DriverBias : 2
> LNA Control : 13
> XPA Bias Freq0 : 0
> XPA Bias Freq1 : 0
> XPA Bias Freq2 : 0
> 5GHz modal Header :
> Chain0 Ant. Control : 16
> Chain1 Ant. Control : 16
> Chain2 Ant. Control : 0
> Ant. Common Control : 288
> Chain0 Ant. Gain : 0
> Chain1 Ant. Gain : 0
> Chain2 Ant. Gain : 0
> Switch Settle : 45
> Chain0 TxRxAtten : 32
> Chain1 TxRxAtten : 32
> Chain2 TxRxAtten : 11
> Chain0 RxTxMargin : 0
> Chain1 RxTxMargin : 0
> Chain2 RxTxMargin : 16
> ADC Desired size : 226
> PGA Desired size : 0
> Chain0 xlna Gain : 13
> Chain1 xlna Gain : 13
> Chain2 xlna Gain : 13
> txEndToXpaOff : 0
> txEndToRxOn : 2
> txFrameToXpaOn : 14
> CCA Threshold) : 28
> Chain0 NF Threshold : 255
> Chain1 NF Threshold : 255
> Chain2 NF Threshold : 255
> xpdGain : 1
> External PD : 1
> Chain0 I Coefficient : 0
> Chain1 I Coefficient : 0
> Chain2 I Coefficient : 0
> Chain0 Q Coefficient : 0
> Chain1 Q Coefficient : 0
> Chain2 Q Coefficient : 0
> pdGainOverlap : 6
> Chain0 OutputBias : 3
> Chain0 DriverBias : 3
> xPA Bias Level : 2
> 2chain pwr decrease : 0
> 3chain pwr decrease : 0
> txFrameToDataStart : 14
> txFrameToPaOn : 14
> HT40 Power Inc. : 0
> Chain0 bswAtten : 34
> Chain1 bswAtten : 34
> Chain2 bswAtten : 0
> Chain0 bswMargin : 22
> Chain1 bswMargin : 22
> Chain2 bswMargin : 0
> HT40 Switch Settle : 45
> Chain0 xatten2Db : 0
> Chain1 xatten2Db : 0
> Chain2 xatten2Db : 0
> Chain0 xatten2Margin : 0
> Chain1 xatten2Margin : 0
> Chain2 xatten2Margin : 0
> Chain1 OutputBias : 3
> Chain1 DriverBias : 3
> LNA Control : 13
> XPA Bias Freq0 : 0
> XPA Bias Freq1 : 0
> XPA Bias Freq2 : 0
>
>>
>> Wojtek
>> On 26/01/18 10:59, Sebastian Gottschall wrote:
>>> i dont know if this is a coincidence. but after testing your patch
>>> on a standard ubiquiti nanostation m2 the noise floor looks wrong.
>>> it will stay on -112 which is clearly impossible in 2.4 (before it
>>> was around -96)
>>
>>
>
AR9003 devices can have calibrated noise floor values
which can be used instead of hard coded one. Read them
from eeprom and save interpolated value in nf limits for
the current channel.
Signed-off-by: Wojciech Dubowik <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 63 ++++++++++++++++++++++----
drivers/net/wireless/ath/ath9k/ar9003_eeprom.h | 10 ++++
drivers/net/wireless/ath/ath9k/hw.h | 2 +
3 files changed, 67 insertions(+), 8 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 23bb677..de2e503 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -4689,7 +4689,8 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
int ichain,
int *pfrequency,
int *pcorrection,
- int *ptemperature, int *pvoltage)
+ int *ptemperature, int *pvoltage,
+ int *pnf_cal, int *pnf_power)
{
u8 *pCalPier;
struct ar9300_cal_data_per_freq_op_loop *pCalPierStruct;
@@ -4731,6 +4732,10 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
*pcorrection = pCalPierStruct->refPower;
*ptemperature = pCalPierStruct->tempMeas;
*pvoltage = pCalPierStruct->voltMeas;
+ *pnf_cal = pCalPierStruct->rxTempMeas ?
+ N2DBM(pCalPierStruct->rxNoisefloorCal) : 0;
+ *pnf_power = pCalPierStruct->rxTempMeas ?
+ N2DBM(pCalPierStruct->rxNoisefloorPower) : 0;
return 0;
}
@@ -4895,14 +4900,18 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
int mode;
int lfrequency[AR9300_MAX_CHAINS],
lcorrection[AR9300_MAX_CHAINS],
- ltemperature[AR9300_MAX_CHAINS], lvoltage[AR9300_MAX_CHAINS];
+ ltemperature[AR9300_MAX_CHAINS], lvoltage[AR9300_MAX_CHAINS],
+ lnf_cal[AR9300_MAX_CHAINS], lnf_pwr[AR9300_MAX_CHAINS];
int hfrequency[AR9300_MAX_CHAINS],
hcorrection[AR9300_MAX_CHAINS],
- htemperature[AR9300_MAX_CHAINS], hvoltage[AR9300_MAX_CHAINS];
+ htemperature[AR9300_MAX_CHAINS], hvoltage[AR9300_MAX_CHAINS],
+ hnf_cal[AR9300_MAX_CHAINS], hnf_pwr[AR9300_MAX_CHAINS];
int fdiff;
int correction[AR9300_MAX_CHAINS],
- voltage[AR9300_MAX_CHAINS], temperature[AR9300_MAX_CHAINS];
- int pfrequency, pcorrection, ptemperature, pvoltage;
+ voltage[AR9300_MAX_CHAINS], temperature[AR9300_MAX_CHAINS],
+ nf_cal[AR9300_MAX_CHAINS], nf_pwr[AR9300_MAX_CHAINS];
+ int pfrequency, pcorrection, ptemperature, pvoltage,
+ pnf_cal, pnf_pwr;
struct ath_common *common = ath9k_hw_common(ah);
mode = (frequency >= 4000);
@@ -4920,7 +4929,8 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
for (ipier = 0; ipier < npier; ipier++) {
if (!ar9003_hw_cal_pier_get(ah, mode, ipier, ichain,
&pfrequency, &pcorrection,
- &ptemperature, &pvoltage)) {
+ &ptemperature, &pvoltage,
+ &pnf_cal, &pnf_pwr)) {
fdiff = frequency - pfrequency;
/*
@@ -4942,6 +4952,8 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
htemperature[ichain] =
ptemperature;
hvoltage[ichain] = pvoltage;
+ hnf_cal[ichain] = pnf_cal;
+ hnf_pwr[ichain] = pnf_pwr;
}
}
if (fdiff >= 0) {
@@ -4958,6 +4970,8 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
ltemperature[ichain] =
ptemperature;
lvoltage[ichain] = pvoltage;
+ lnf_cal[ichain] = pnf_cal;
+ lnf_pwr[ichain] = pnf_pwr;
}
}
}
@@ -4966,15 +4980,20 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
/* interpolate */
for (ichain = 0; ichain < AR9300_MAX_CHAINS; ichain++) {
- ath_dbg(common, EEPROM, "ch=%d f=%d low=%d %d h=%d %d\n",
+ ath_dbg(common, EEPROM,
+ "ch=%d f=%d low=%d %d h=%d %d n=%d %d p=%d %d\n",
ichain, frequency, lfrequency[ichain],
lcorrection[ichain], hfrequency[ichain],
- hcorrection[ichain]);
+ hcorrection[ichain], lnf_cal[ichain],
+ hnf_cal[ichain], lnf_pwr[ichain],
+ hnf_pwr[ichain]);
/* they're the same, so just pick one */
if (hfrequency[ichain] == lfrequency[ichain]) {
correction[ichain] = lcorrection[ichain];
voltage[ichain] = lvoltage[ichain];
temperature[ichain] = ltemperature[ichain];
+ nf_cal[ichain] = lnf_cal[ichain];
+ nf_pwr[ichain] = lnf_pwr[ichain];
}
/* the low frequency is good */
else if (frequency - lfrequency[ichain] < 1000) {
@@ -4998,12 +5017,26 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
hfrequency[ichain],
lvoltage[ichain],
hvoltage[ichain]);
+
+ nf_cal[ichain] = interpolate(frequency,
+ lfrequency[ichain],
+ hfrequency[ichain],
+ lnf_cal[ichain],
+ hnf_cal[ichain]);
+
+ nf_pwr[ichain] = interpolate(frequency,
+ lfrequency[ichain],
+ hfrequency[ichain],
+ lnf_pwr[ichain],
+ hnf_pwr[ichain]);
}
/* only low is good, use it */
else {
correction[ichain] = lcorrection[ichain];
temperature[ichain] = ltemperature[ichain];
voltage[ichain] = lvoltage[ichain];
+ nf_cal[ichain] = lnf_cal[ichain];
+ nf_pwr[ichain] = lnf_pwr[ichain];
}
}
/* only high is good, use it */
@@ -5011,10 +5044,14 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
correction[ichain] = hcorrection[ichain];
temperature[ichain] = htemperature[ichain];
voltage[ichain] = hvoltage[ichain];
+ nf_cal[ichain] = hnf_cal[ichain];
+ nf_pwr[ichain] = hnf_pwr[ichain];
} else { /* nothing is good, presume 0???? */
correction[ichain] = 0;
temperature[ichain] = 0;
voltage[ichain] = 0;
+ nf_cal[ichain] = 0;
+ nf_pwr[ichain] = 0;
}
}
@@ -5025,6 +5062,16 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
"for frequency=%d, calibration correction = %d %d %d\n",
frequency, correction[0], correction[1], correction[2]);
+ /* Store calibrated noise floor values */
+ for (ichain = 0; ichain < AR5416_MAX_CHAINS; ichain++)
+ if (mode) {
+ ah->nf_5g.cal[ichain] = nf_cal[ichain];
+ ah->nf_5g.pwr[ichain] = nf_pwr[ichain];
+ } else {
+ ah->nf_2g.cal[ichain] = nf_cal[ichain];
+ ah->nf_2g.pwr[ichain] = nf_pwr[ichain];
+ }
+
return 0;
}
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
index bd2269c..e8fda54 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
@@ -62,6 +62,16 @@
*/
#define AR9300_PWR_TABLE_OFFSET 0
+/* Noise power data definitions
+ * units are: 4 x dBm - NOISE_PWR_DATA_OFFSET
+ * (e.g. -25 = (-25/4 - 90) = -96.25 dBm)
+ * range (for 6 signed bits) is (-32 to 31) + offset => -122dBm to -59dBm
+ * resolution (2 bits) is 0.25dBm
+ */
+#define NOISE_PWR_DATA_OFFSET -90
+#define NOISE_PWR_DBM_2_INT(_p) ((((_p) + 3) >> 2) + NOISE_PWR_DATA_OFFSET)
+#define N2DBM(_p) NOISE_PWR_DBM_2_INT(_p)
+
/* byte addressable */
#define AR9300_EEPROM_SIZE (16*1024)
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 0d6c07c7..9804a24 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -754,6 +754,8 @@ struct ath_nf_limits {
s16 max;
s16 min;
s16 nominal;
+ s16 cal[AR5416_MAX_CHAINS];
+ s16 pwr[AR5416_MAX_CHAINS];
};
enum ath_cal_list {
--
2.7.4
Display per frequency calibration data in dump_modal
debugfs entry including reference power, voltage,
tx temperature and noise floor.
Example of chain 0 of OEM card (dump from modal_eeprom):
Chain 0
Freq ref volt temp nf_Cal nf_Pow rx_temp
5180 -30 0 137 0 0 0
5320 -24 0 137 0 0 0
5500 -15 0 137 0 0 0
5620 -10 0 137 0 0 0
5700 -15 0 137 0 0 0
5745 -16 0 135 0 0 0
5785 -19 0 136 0 0 0
5825 -22 0 136 0 0 0
Example of a card with calibrated noise floor.
Chain 0
Freq ref volt temp nf_Cal nf_Pow rx_temp
4890 -49 0 128 -107 -97 124
5100 -23 0 128 -101 -96 124
5180 -18 0 128 -101 -96 124
5300 -12 0 128 -102 -97 124
5500 -9 0 128 -101 -97 125
5640 -17 0 128 -101 -98 124
5785 -25 0 128 -101 -98 124
5940 -33 0 128 -106 -99 124
Signed-off-by: Wojciech Dubowik <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 64 +++++++++++++++++++++++++-
1 file changed, 63 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index de2e503..f019a20 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3436,6 +3436,60 @@ static u32 ar9003_dump_modal_eeprom(char *buf, u32 len, u32 size,
return len;
}
+static u32 ar9003_dump_cal_data(struct ath_hw *ah, char *buf, u32 len, u32 size,
+ bool is_2g)
+{
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ struct ar9300_base_eep_hdr *pBase;
+ struct ar9300_cal_data_per_freq_op_loop *cal_pier;
+ int cal_pier_nr;
+ int freq;
+ int i, j;
+
+ pBase = &eep->baseEepHeader;
+
+ if (is_2g)
+ cal_pier_nr = AR9300_NUM_2G_CAL_PIERS;
+ else
+ cal_pier_nr = AR9300_NUM_5G_CAL_PIERS;
+
+ for (i = 0; i < AR9300_MAX_CHAINS; i++) {
+ if (!((pBase->txrxMask >> i) & 1))
+ continue;
+
+ len += snprintf(buf + len, size - len, "Chain %d\n", i);
+
+ len += snprintf(buf + len, size - len,
+ "Freq\t ref\tvolt\ttemp\tnf_cal\tnf_pow\trx_temp\n");
+
+ for (j = 0; j < cal_pier_nr; j++) {
+ if (is_2g) {
+ cal_pier = &eep->calPierData2G[i][j];
+ freq = 2300 + eep->calFreqPier2G[j];
+ } else {
+ cal_pier = &eep->calPierData5G[i][j];
+ freq = 4800 + eep->calFreqPier5G[j] * 5;
+ }
+
+ len += snprintf(buf + len, size - len,
+ "%d\t", freq);
+
+ len += snprintf(buf + len, size - len,
+ "%d\t%d\t%d\t%d\t%d\t%d\n",
+ cal_pier->refPower,
+ cal_pier->voltMeas,
+ cal_pier->tempMeas,
+ cal_pier->rxTempMeas ?
+ N2DBM(cal_pier->rxNoisefloorCal) : 0,
+ cal_pier->rxTempMeas ?
+ N2DBM(cal_pier->rxNoisefloorPower) : 0,
+ cal_pier->rxTempMeas);
+ }
+ }
+
+ return len;
+}
+
static u32 ath9k_hw_ar9003_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
u8 *buf, u32 len, u32 size)
{
@@ -3447,10 +3501,18 @@ static u32 ath9k_hw_ar9003_dump_eeprom(struct ath_hw *ah, bool dump_base_hdr,
"%20s :\n", "2GHz modal Header");
len = ar9003_dump_modal_eeprom(buf, len, size,
&eep->modalHeader2G);
- len += scnprintf(buf + len, size - len,
+
+ len += scnprintf(buf + len, size - len, "Calibration data\n");
+ len = ar9003_dump_cal_data(ah, buf, len, size, true);
+
+ len += snprintf(buf + len, size - len,
"%20s :\n", "5GHz modal Header");
len = ar9003_dump_modal_eeprom(buf, len, size,
&eep->modalHeader5G);
+
+ len += snprintf(buf + len, size - len, "Calibration data\n");
+ len = ar9003_dump_cal_data(ah, buf, len, size, false);
+
goto out;
}
--
2.7.4
Use calibrated noise floor value to improve rssi/signal reporting.
Signed-off-by: Wojciech Dubowik <[email protected]>
---
drivers/net/wireless/ath/ath9k/calib.c | 38 +++++++++++++++++++++-------------
1 file changed, 24 insertions(+), 14 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 13ab6bc..3d9447e 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -58,19 +58,25 @@ static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah,
}
static s16 ath9k_hw_get_default_nf(struct ath_hw *ah,
- struct ath9k_channel *chan)
+ struct ath9k_channel *chan,
+ int chain)
{
- return ath9k_hw_get_nf_limits(ah, chan)->nominal;
+ s16 calib_nf = ath9k_hw_get_nf_limits(ah, chan)->cal[chain];
+
+ if (calib_nf)
+ return calib_nf;
+ else
+ return ath9k_hw_get_nf_limits(ah, chan)->nominal;
}
s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan,
s16 nf)
{
- s8 noise = ATH_DEFAULT_NOISE_FLOOR;
+ s8 noise = ath9k_hw_get_default_nf(ah, chan, 0);
if (nf) {
s8 delta = nf - ATH9K_NF_CAL_NOISE_THRESH -
- ath9k_hw_get_default_nf(ah, chan);
+ ath9k_hw_get_default_nf(ah, chan, 0);
if (delta > 0)
noise += delta;
}
@@ -240,7 +246,7 @@ int ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
unsigned i, j;
u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
struct ath_common *common = ath9k_hw_common(ah);
- s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
+ s16 default_nf = ath9k_hw_get_nf_limits(ah, chan)->nominal;
u32 bb_agc_ctl = REG_READ(ah, AR_PHY_AGC_CONTROL);
if (ah->caldata)
@@ -258,8 +264,13 @@ int ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
nfval = ah->nf_override;
else if (h)
nfval = h[i].privNF;
- else
- nfval = default_nf;
+ else {
+ /* Try to get calibrated noise floor value */
+ nfval =
+ ath9k_hw_get_nf_limits(ah, chan)->cal[i];
+ if (nfval > -60 || nfval < -127)
+ nfval = default_nf;
+ }
REG_RMW(ah, ah->nf_regs[i],
(((u32) nfval << 1) & 0x1ff), 0x1ff);
@@ -429,20 +440,19 @@ void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah,
struct ath9k_channel *chan)
{
struct ath9k_nfcal_hist *h;
- s16 default_nf;
- int i, j;
+ int i, j, k = 0;
ah->caldata->channel = chan->channel;
ah->caldata->channelFlags = chan->channelFlags;
h = ah->caldata->nfCalHist;
- default_nf = ath9k_hw_get_default_nf(ah, chan);
for (i = 0; i < NUM_NF_READINGS; i++) {
h[i].currIndex = 0;
- h[i].privNF = default_nf;
+ h[i].privNF = ath9k_hw_get_default_nf(ah, chan, k);
h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
- for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
- h[i].nfCalBuffer[j] = default_nf;
- }
+ for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++)
+ h[i].nfCalBuffer[j] = h[i].privNF;
+ if (++k >= AR5416_MAX_CHAINS)
+ k = 0;
}
}
--
2.7.4
i have a idea what one cause could ne
+ nfval =
+ ath9k_hw_get_nf_limits(ah, chan)->cal[i];
+ if (nfval > -60 || nfval < -127)
+ nfval = default_nf;
this code here will allways return the default_nf since all possible returned values are within that range
and the || is likelly wrong too and must be replaced with &&. but the range itself looks bogus. can't be right
so please do me a favor and test your code against 9280 chipsets too and check if its working. right now its a full regression incidence
and should be reverted
Am 26.01.2018 um 12:07 schrieb Wojciech Dubowik:
> Are you sure you have applied path 4 in the series. You should see
> calibration piers. Sth like:
>
> Calibration data
> Chain 0
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 14 0 136 0 0 0
> 2437 13 0 136 0 0 0
> 2472 11 0 136 0 0 0
> Chain 1
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 11 0 137 0 0 0
> 2437 11 0 139 0 0 0
> 2472 10 0 137 0 0 0
> Chain 2
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 13 0 138 0 0 0
> 2437 14 0 139 0 0 0
> 2472 14 0 139 0 0 0
>
> I have just done backports from ath.git and I can see these entries
> with my Compex card.
>
> Wojtek
>
>
> On 26/01/18 11:36, Sebastian Gottschall wrote:
>> Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
>>> I will try it with again with couple of OEM cards.
>> this is no card. the eeprom is stored in flash memory. so the chip is
>> a 9280 pcie chip which is connected on board, but has no own flash
>> memory for calibration data. this is stored in system flash memory
>>>
>>> Is nanostation calibrated for noisefloor? You can see it with
>>> modal_eeprom in debugfs.
>> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
>> 2GHz modal Header :
>> Chain0 Ant. Control : 0
>> Chain1 Ant. Control : 0
>> Chain2 Ant. Control : 0
>> Ant. Common Control : 0
>> Chain0 Ant. Gain : 0
>> Chain1 Ant. Gain : 0
>> Chain2 Ant. Gain : 0
>> Switch Settle : 45
>> Chain0 TxRxAtten : 11
>> Chain1 TxRxAtten : 11
>> Chain2 TxRxAtten : 11
>> Chain0 RxTxMargin : 11
>> Chain1 RxTxMargin : 11
>> Chain2 RxTxMargin : 11
>> ADC Desired size : 224
>> PGA Desired size : 0
>> Chain0 xlna Gain : 14
>> Chain1 xlna Gain : 14
>> Chain2 xlna Gain : 14
>> txEndToXpaOff : 0
>> txEndToRxOn : 2
>> txFrameToXpaOn : 14
>> CCA Threshold) : 0
>> Chain0 NF Threshold : 202
>> Chain1 NF Threshold : 202
>> Chain2 NF Threshold : 202
>> xpdGain : 9
>> External PD : 1
>> Chain0 I Coefficient : 0
>> Chain1 I Coefficient : 0
>> Chain2 I Coefficient : 0
>> Chain0 Q Coefficient : 0
>> Chain1 Q Coefficient : 0
>> Chain2 Q Coefficient : 0
>> pdGainOverlap : 6
>> Chain0 OutputBias : 2
>> Chain0 DriverBias : 2
>> xPA Bias Level : 0
>> 2chain pwr decrease : 0
>> 3chain pwr decrease : 0
>> txFrameToDataStart : 14
>> txFrameToPaOn : 14
>> HT40 Power Inc. : 2
>> Chain0 bswAtten : 21
>> Chain1 bswAtten : 21
>> Chain2 bswAtten : 0
>> Chain0 bswMargin : 31
>> Chain1 bswMargin : 31
>> Chain2 bswMargin : 0
>> HT40 Switch Settle : 44
>> Chain0 xatten2Db : 0
>> Chain1 xatten2Db : 0
>> Chain2 xatten2Db : 0
>> Chain0 xatten2Margin : 0
>> Chain1 xatten2Margin : 0
>> Chain2 xatten2Margin : 0
>> Chain1 OutputBias : 2
>> Chain1 DriverBias : 2
>> LNA Control : 13
>> XPA Bias Freq0 : 0
>> XPA Bias Freq1 : 0
>> XPA Bias Freq2 : 0
>> 5GHz modal Header :
>> Chain0 Ant. Control : 16
>> Chain1 Ant. Control : 16
>> Chain2 Ant. Control : 0
>> Ant. Common Control : 288
>> Chain0 Ant. Gain : 0
>> Chain1 Ant. Gain : 0
>> Chain2 Ant. Gain : 0
>> Switch Settle : 45
>> Chain0 TxRxAtten : 32
>> Chain1 TxRxAtten : 32
>> Chain2 TxRxAtten : 11
>> Chain0 RxTxMargin : 0
>> Chain1 RxTxMargin : 0
>> Chain2 RxTxMargin : 16
>> ADC Desired size : 226
>> PGA Desired size : 0
>> Chain0 xlna Gain : 13
>> Chain1 xlna Gain : 13
>> Chain2 xlna Gain : 13
>> txEndToXpaOff : 0
>> txEndToRxOn : 2
>> txFrameToXpaOn : 14
>> CCA Threshold) : 28
>> Chain0 NF Threshold : 255
>> Chain1 NF Threshold : 255
>> Chain2 NF Threshold : 255
>> xpdGain : 1
>> External PD : 1
>> Chain0 I Coefficient : 0
>> Chain1 I Coefficient : 0
>> Chain2 I Coefficient : 0
>> Chain0 Q Coefficient : 0
>> Chain1 Q Coefficient : 0
>> Chain2 Q Coefficient : 0
>> pdGainOverlap : 6
>> Chain0 OutputBias : 3
>> Chain0 DriverBias : 3
>> xPA Bias Level : 2
>> 2chain pwr decrease : 0
>> 3chain pwr decrease : 0
>> txFrameToDataStart : 14
>> txFrameToPaOn : 14
>> HT40 Power Inc. : 0
>> Chain0 bswAtten : 34
>> Chain1 bswAtten : 34
>> Chain2 bswAtten : 0
>> Chain0 bswMargin : 22
>> Chain1 bswMargin : 22
>> Chain2 bswMargin : 0
>> HT40 Switch Settle : 45
>> Chain0 xatten2Db : 0
>> Chain1 xatten2Db : 0
>> Chain2 xatten2Db : 0
>> Chain0 xatten2Margin : 0
>> Chain1 xatten2Margin : 0
>> Chain2 xatten2Margin : 0
>> Chain1 OutputBias : 3
>> Chain1 DriverBias : 3
>> LNA Control : 13
>> XPA Bias Freq0 : 0
>> XPA Bias Freq1 : 0
>> XPA Bias Freq2 : 0
>>
>>>
>>> Wojtek
>>> On 26/01/18 10:59, Sebastian Gottschall wrote:
>>>> i dont know if this is a coincidence. but after testing your patch
>>>> on a standard ubiquiti nanostation m2 the noise floor looks wrong.
>>>> it will stay on -112 which is clearly impossible in 2.4 (before it
>>>> was around -96)
>>>
>>>
>>
>
>
--
Mit freundlichen Grüssen / Regards
Sebastian Gottschall / CTO
NewMedia-NET GmbH - DD-WRT
Firmensitz: Stubenwaldallee 21a, 64625 Bensheim
Registergericht: Amtsgericht Darmstadt, HRB 25473
Geschäftsführer: Peter Steinhäuser, Christian Scheele
http://www.dd-wrt.com
email: [email protected]
Tel.: +496251-582650 / Fax: +496251-5826565
i dont know if this is a coincidence. but after testing your patch on a
standard ubiquiti nanostation m2 the noise floor looks wrong.
it will stay on -112 which is clearly impossible in 2.4 (before it was
around -96)
Sebastian
Am 23.01.2018 um 08:56 schrieb Kalle Valo:
> Wojciech Dubowik <[email protected]> writes:
>
>> AR9003 series allows to calibrate noise floor for different frequency
>> bins. Once it's done it's possible to get more accurate rssi/signal
>> values over whole frequency band at a given temperature.
>> The RSSI/signal accuracy reported by calibrated RF cards improves
>> from 6 to up to 2dB.
>>
>> This could be interesting for application which require good signal
>> accuracy like roaming or mesh protocols.
> This is a very good description of the feature. I think you should copy
> it to the patch 3 commit log so that it gets archived to git. (I don't
> store cover letters to git.)
>
--
Mit freundlichen Grüssen / Regards
Sebastian Gottschall / CTO
NewMedia-NET GmbH - DD-WRT
Firmensitz: Stubenwaldallee 21a, 64625 Bensheim
Registergericht: Amtsgericht Darmstadt, HRB 25473
Geschäftsführer: Peter Steinhäuser, Christian Scheele
http://www.dd-wrt.com
email: [email protected]
Tel.: +496251-582650 / Fax: +496251-5826565
Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
> I will try it with again with couple of OEM cards.
this is no card. the eeprom is stored in flash memory. so the chip is a
9280 pcie chip which is connected on board, but has no own flash memory
for calibration data. this is stored in system flash memory
>
> Is nanostation calibrated for noisefloor? You can see it with
> modal_eeprom in debugfs.
root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
2GHz modal Header :
Chain0 Ant. Control : 0
Chain1 Ant. Control : 0
Chain2 Ant. Control : 0
Ant. Common Control : 0
Chain0 Ant. Gain : 0
Chain1 Ant. Gain : 0
Chain2 Ant. Gain : 0
Switch Settle : 45
Chain0 TxRxAtten : 11
Chain1 TxRxAtten : 11
Chain2 TxRxAtten : 11
Chain0 RxTxMargin : 11
Chain1 RxTxMargin : 11
Chain2 RxTxMargin : 11
ADC Desired size : 224
PGA Desired size : 0
Chain0 xlna Gain : 14
Chain1 xlna Gain : 14
Chain2 xlna Gain : 14
txEndToXpaOff : 0
txEndToRxOn : 2
txFrameToXpaOn : 14
CCA Threshold) : 0
Chain0 NF Threshold : 202
Chain1 NF Threshold : 202
Chain2 NF Threshold : 202
xpdGain : 9
External PD : 1
Chain0 I Coefficient : 0
Chain1 I Coefficient : 0
Chain2 I Coefficient : 0
Chain0 Q Coefficient : 0
Chain1 Q Coefficient : 0
Chain2 Q Coefficient : 0
pdGainOverlap : 6
Chain0 OutputBias : 2
Chain0 DriverBias : 2
xPA Bias Level : 0
2chain pwr decrease : 0
3chain pwr decrease : 0
txFrameToDataStart : 14
txFrameToPaOn : 14
HT40 Power Inc. : 2
Chain0 bswAtten : 21
Chain1 bswAtten : 21
Chain2 bswAtten : 0
Chain0 bswMargin : 31
Chain1 bswMargin : 31
Chain2 bswMargin : 0
HT40 Switch Settle : 44
Chain0 xatten2Db : 0
Chain1 xatten2Db : 0
Chain2 xatten2Db : 0
Chain0 xatten2Margin : 0
Chain1 xatten2Margin : 0
Chain2 xatten2Margin : 0
Chain1 OutputBias : 2
Chain1 DriverBias : 2
LNA Control : 13
XPA Bias Freq0 : 0
XPA Bias Freq1 : 0
XPA Bias Freq2 : 0
5GHz modal Header :
Chain0 Ant. Control : 16
Chain1 Ant. Control : 16
Chain2 Ant. Control : 0
Ant. Common Control : 288
Chain0 Ant. Gain : 0
Chain1 Ant. Gain : 0
Chain2 Ant. Gain : 0
Switch Settle : 45
Chain0 TxRxAtten : 32
Chain1 TxRxAtten : 32
Chain2 TxRxAtten : 11
Chain0 RxTxMargin : 0
Chain1 RxTxMargin : 0
Chain2 RxTxMargin : 16
ADC Desired size : 226
PGA Desired size : 0
Chain0 xlna Gain : 13
Chain1 xlna Gain : 13
Chain2 xlna Gain : 13
txEndToXpaOff : 0
txEndToRxOn : 2
txFrameToXpaOn : 14
CCA Threshold) : 28
Chain0 NF Threshold : 255
Chain1 NF Threshold : 255
Chain2 NF Threshold : 255
xpdGain : 1
External PD : 1
Chain0 I Coefficient : 0
Chain1 I Coefficient : 0
Chain2 I Coefficient : 0
Chain0 Q Coefficient : 0
Chain1 Q Coefficient : 0
Chain2 Q Coefficient : 0
pdGainOverlap : 6
Chain0 OutputBias : 3
Chain0 DriverBias : 3
xPA Bias Level : 2
2chain pwr decrease : 0
3chain pwr decrease : 0
txFrameToDataStart : 14
txFrameToPaOn : 14
HT40 Power Inc. : 0
Chain0 bswAtten : 34
Chain1 bswAtten : 34
Chain2 bswAtten : 0
Chain0 bswMargin : 22
Chain1 bswMargin : 22
Chain2 bswMargin : 0
HT40 Switch Settle : 45
Chain0 xatten2Db : 0
Chain1 xatten2Db : 0
Chain2 xatten2Db : 0
Chain0 xatten2Margin : 0
Chain1 xatten2Margin : 0
Chain2 xatten2Margin : 0
Chain1 OutputBias : 3
Chain1 DriverBias : 3
LNA Control : 13
XPA Bias Freq0 : 0
XPA Bias Freq1 : 0
XPA Bias Freq2 : 0
>
> Wojtek
> On 26/01/18 10:59, Sebastian Gottschall wrote:
>> i dont know if this is a coincidence. but after testing your patch on
>> a standard ubiquiti nanostation m2 the noise floor looks wrong.
>> it will stay on -112 which is clearly impossible in 2.4 (before it
>> was around -96)
>
>
--
Mit freundlichen Grüssen / Regards
Sebastian Gottschall / CTO
NewMedia-NET GmbH - DD-WRT
Firmensitz: Stubenwaldallee 21a, 64625 Bensheim
Registergericht: Amtsgericht Darmstadt, HRB 25473
Geschäftsführer: Peter Steinhäuser, Christian Scheele
http://www.dd-wrt.com
email: [email protected]
Tel.: +496251-582650 / Fax: +496251-5826565
Am 26.01.2018 um 15:16 schrieb Wojciech Dubowik:
>
>
> On 26/01/18 12:42, Sebastian Gottschall wrote:
>> i have a idea what one cause could ne
>>
>> + nfval =
>> + ath9k_hw_get_nf_limits(ah, chan)->cal[i];
>> + if (nfval > -60 || nfval < -127)
>> + nfval = default_nf;
>>
> This is just a check to make sure we have sane calibrated values.
> Anything above -60 or under -127 will not work so
> we take nominal value.
yes. but that means all < -127 and all > -60 catches it. this is the
full value range. the check is wrong
everything is above -60 and bellow -127 at the same time. OR must ne AND
>> this code here will allways return the default_nf since all possible
>> returned values are within that range
>> and the || is likelly wrong too and must be replaced with &&. but the
>> range itself looks bogus. can't be right
>>
>> so please do me a favor and test your code against 9280 chipsets too
>> and check if its working. right now its a full regression incidence
>> and should be reverted
>>
>>
>>
>> Am 26.01.2018 um 12:07 schrieb Wojciech Dubowik:
>>> Are you sure you have applied path 4 in the series. You should see
>>> calibration piers. Sth like:
>>>
>>> Calibration data
>>> Chain 0
>>> Freq ref volt temp nf_cal nf_pow rx_temp
>>> 2412 14 0 136 0 0 0
>>> 2437 13 0 136 0 0 0
>>> 2472 11 0 136 0 0 0
>>> Chain 1
>>> Freq ref volt temp nf_cal nf_pow rx_temp
>>> 2412 11 0 137 0 0 0
>>> 2437 11 0 139 0 0 0
>>> 2472 10 0 137 0 0 0
>>> Chain 2
>>> Freq ref volt temp nf_cal nf_pow rx_temp
>>> 2412 13 0 138 0 0 0
>>> 2437 14 0 139 0 0 0
>>> 2472 14 0 139 0 0 0
>>>
>>> I have just done backports from ath.git and I can see these entries
>>> with my Compex card.
>>>
>>> Wojtek
>>>
>>>
>>> On 26/01/18 11:36, Sebastian Gottschall wrote:
>>>> Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
>>>>> I will try it with again with couple of OEM cards.
>>>> this is no card. the eeprom is stored in flash memory. so the chip
>>>> is a 9280 pcie chip which is connected on board, but has no own
>>>> flash memory for calibration data. this is stored in system flash
>>>> memory
>>>>>
>>>>> Is nanostation calibrated for noisefloor? You can see it with
>>>>> modal_eeprom in debugfs.
>>>> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
>>>> 2GHz modal Header :
>>>> Chain0 Ant. Control : 0
>>>> Chain1 Ant. Control : 0
>>>> Chain2 Ant. Control : 0
>>>> Ant. Common Control : 0
>>>> Chain0 Ant. Gain : 0
>>>> Chain1 Ant. Gain : 0
>>>> Chain2 Ant. Gain : 0
>>>> Switch Settle : 45
>>>> Chain0 TxRxAtten : 11
>>>> Chain1 TxRxAtten : 11
>>>> Chain2 TxRxAtten : 11
>>>> Chain0 RxTxMargin : 11
>>>> Chain1 RxTxMargin : 11
>>>> Chain2 RxTxMargin : 11
>>>> ADC Desired size : 224
>>>> PGA Desired size : 0
>>>> Chain0 xlna Gain : 14
>>>> Chain1 xlna Gain : 14
>>>> Chain2 xlna Gain : 14
>>>> txEndToXpaOff : 0
>>>> txEndToRxOn : 2
>>>> txFrameToXpaOn : 14
>>>> CCA Threshold) : 0
>>>> Chain0 NF Threshold : 202
>>>> Chain1 NF Threshold : 202
>>>> Chain2 NF Threshold : 202
>>>> xpdGain : 9
>>>> External PD : 1
>>>> Chain0 I Coefficient : 0
>>>> Chain1 I Coefficient : 0
>>>> Chain2 I Coefficient : 0
>>>> Chain0 Q Coefficient : 0
>>>> Chain1 Q Coefficient : 0
>>>> Chain2 Q Coefficient : 0
>>>> pdGainOverlap : 6
>>>> Chain0 OutputBias : 2
>>>> Chain0 DriverBias : 2
>>>> xPA Bias Level : 0
>>>> 2chain pwr decrease : 0
>>>> 3chain pwr decrease : 0
>>>> txFrameToDataStart : 14
>>>> txFrameToPaOn : 14
>>>> HT40 Power Inc. : 2
>>>> Chain0 bswAtten : 21
>>>> Chain1 bswAtten : 21
>>>> Chain2 bswAtten : 0
>>>> Chain0 bswMargin : 31
>>>> Chain1 bswMargin : 31
>>>> Chain2 bswMargin : 0
>>>> HT40 Switch Settle : 44
>>>> Chain0 xatten2Db : 0
>>>> Chain1 xatten2Db : 0
>>>> Chain2 xatten2Db : 0
>>>> Chain0 xatten2Margin : 0
>>>> Chain1 xatten2Margin : 0
>>>> Chain2 xatten2Margin : 0
>>>> Chain1 OutputBias : 2
>>>> Chain1 DriverBias : 2
>>>> LNA Control : 13
>>>> XPA Bias Freq0 : 0
>>>> XPA Bias Freq1 : 0
>>>> XPA Bias Freq2 : 0
>>>> 5GHz modal Header :
>>>> Chain0 Ant. Control : 16
>>>> Chain1 Ant. Control : 16
>>>> Chain2 Ant. Control : 0
>>>> Ant. Common Control : 288
>>>> Chain0 Ant. Gain : 0
>>>> Chain1 Ant. Gain : 0
>>>> Chain2 Ant. Gain : 0
>>>> Switch Settle : 45
>>>> Chain0 TxRxAtten : 32
>>>> Chain1 TxRxAtten : 32
>>>> Chain2 TxRxAtten : 11
>>>> Chain0 RxTxMargin : 0
>>>> Chain1 RxTxMargin : 0
>>>> Chain2 RxTxMargin : 16
>>>> ADC Desired size : 226
>>>> PGA Desired size : 0
>>>> Chain0 xlna Gain : 13
>>>> Chain1 xlna Gain : 13
>>>> Chain2 xlna Gain : 13
>>>> txEndToXpaOff : 0
>>>> txEndToRxOn : 2
>>>> txFrameToXpaOn : 14
>>>> CCA Threshold) : 28
>>>> Chain0 NF Threshold : 255
>>>> Chain1 NF Threshold : 255
>>>> Chain2 NF Threshold : 255
>>>> xpdGain : 1
>>>> External PD : 1
>>>> Chain0 I Coefficient : 0
>>>> Chain1 I Coefficient : 0
>>>> Chain2 I Coefficient : 0
>>>> Chain0 Q Coefficient : 0
>>>> Chain1 Q Coefficient : 0
>>>> Chain2 Q Coefficient : 0
>>>> pdGainOverlap : 6
>>>> Chain0 OutputBias : 3
>>>> Chain0 DriverBias : 3
>>>> xPA Bias Level : 2
>>>> 2chain pwr decrease : 0
>>>> 3chain pwr decrease : 0
>>>> txFrameToDataStart : 14
>>>> txFrameToPaOn : 14
>>>> HT40 Power Inc. : 0
>>>> Chain0 bswAtten : 34
>>>> Chain1 bswAtten : 34
>>>> Chain2 bswAtten : 0
>>>> Chain0 bswMargin : 22
>>>> Chain1 bswMargin : 22
>>>> Chain2 bswMargin : 0
>>>> HT40 Switch Settle : 45
>>>> Chain0 xatten2Db : 0
>>>> Chain1 xatten2Db : 0
>>>> Chain2 xatten2Db : 0
>>>> Chain0 xatten2Margin : 0
>>>> Chain1 xatten2Margin : 0
>>>> Chain2 xatten2Margin : 0
>>>> Chain1 OutputBias : 3
>>>> Chain1 DriverBias : 3
>>>> LNA Control : 13
>>>> XPA Bias Freq0 : 0
>>>> XPA Bias Freq1 : 0
>>>> XPA Bias Freq2 : 0
>>>>
>>>>>
>>>>> Wojtek
>>>>> On 26/01/18 10:59, Sebastian Gottschall wrote:
>>>>>> i dont know if this is a coincidence. but after testing your
>>>>>> patch on a standard ubiquiti nanostation m2 the noise floor looks
>>>>>> wrong.
>>>>>> it will stay on -112 which is clearly impossible in 2.4 (before
>>>>>> it was around -96)
>>>>>
>>>>>
>>>>
>>>
>>>
>>
>
>
--
Mit freundlichen Grüssen / Regards
Sebastian Gottschall / CTO
NewMedia-NET GmbH - DD-WRT
Firmensitz: Stubenwaldallee 21a, 64625 Bensheim
Registergericht: Amtsgericht Darmstadt, HRB 25473
Geschäftsführer: Peter Steinhäuser, Christian Scheele
http://www.dd-wrt.com
email: [email protected]
Tel.: +496251-582650 / Fax: +496251-5826565
I will try it with again with couple of OEM cards.
Is nanostation calibrated for noisefloor? You can see it with
modal_eeprom in debugfs.
Wojtek
On 26/01/18 10:59, Sebastian Gottschall wrote:
> i dont know if this is a coincidence. but after testing your patch on
> a standard ubiquiti nanostation m2 the noise floor looks wrong.
> it will stay on -112 which is clearly impossible in 2.4 (before it was
> around -96)
Am 26.01.2018 um 12:07 schrieb Wojciech Dubowik:
> Are you sure you have applied path 4 in the series. You should see
> calibration piers. Sth like:
yes. all of them
root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat dump_nfcal
Channel Noise Floor : -112
Chain | privNF | # Readings | NF Readings
0 -107 5 -107 -107 -107 -108 -108
1 -106 5 -106 -106 -106 -106 -106
but looks different from yours, but chipset is 9280 as i said.
let me just revert your 4 patches to see if it changes the behaviour
>
> Calibration data
> Chain 0
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 14 0 136 0 0 0
> 2437 13 0 136 0 0 0
> 2472 11 0 136 0 0 0
> Chain 1
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 11 0 137 0 0 0
> 2437 11 0 139 0 0 0
> 2472 10 0 137 0 0 0
> Chain 2
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 13 0 138 0 0 0
> 2437 14 0 139 0 0 0
> 2472 14 0 139 0 0 0
>
> I have just done backports from ath.git and I can see these entries
> with my Compex card.
>
> Wojtek
>
>
> On 26/01/18 11:36, Sebastian Gottschall wrote:
>> Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
>>> I will try it with again with couple of OEM cards.
>> this is no card. the eeprom is stored in flash memory. so the chip is
>> a 9280 pcie chip which is connected on board, but has no own flash
>> memory for calibration data. this is stored in system flash memory
>>>
>>> Is nanostation calibrated for noisefloor? You can see it with
>>> modal_eeprom in debugfs.
>> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
>> 2GHz modal Header :
>> Chain0 Ant. Control : 0
>> Chain1 Ant. Control : 0
>> Chain2 Ant. Control : 0
>> Ant. Common Control : 0
>> Chain0 Ant. Gain : 0
>> Chain1 Ant. Gain : 0
>> Chain2 Ant. Gain : 0
>> Switch Settle : 45
>> Chain0 TxRxAtten : 11
>> Chain1 TxRxAtten : 11
>> Chain2 TxRxAtten : 11
>> Chain0 RxTxMargin : 11
>> Chain1 RxTxMargin : 11
>> Chain2 RxTxMargin : 11
>> ADC Desired size : 224
>> PGA Desired size : 0
>> Chain0 xlna Gain : 14
>> Chain1 xlna Gain : 14
>> Chain2 xlna Gain : 14
>> txEndToXpaOff : 0
>> txEndToRxOn : 2
>> txFrameToXpaOn : 14
>> CCA Threshold) : 0
>> Chain0 NF Threshold : 202
>> Chain1 NF Threshold : 202
>> Chain2 NF Threshold : 202
>> xpdGain : 9
>> External PD : 1
>> Chain0 I Coefficient : 0
>> Chain1 I Coefficient : 0
>> Chain2 I Coefficient : 0
>> Chain0 Q Coefficient : 0
>> Chain1 Q Coefficient : 0
>> Chain2 Q Coefficient : 0
>> pdGainOverlap : 6
>> Chain0 OutputBias : 2
>> Chain0 DriverBias : 2
>> xPA Bias Level : 0
>> 2chain pwr decrease : 0
>> 3chain pwr decrease : 0
>> txFrameToDataStart : 14
>> txFrameToPaOn : 14
>> HT40 Power Inc. : 2
>> Chain0 bswAtten : 21
>> Chain1 bswAtten : 21
>> Chain2 bswAtten : 0
>> Chain0 bswMargin : 31
>> Chain1 bswMargin : 31
>> Chain2 bswMargin : 0
>> HT40 Switch Settle : 44
>> Chain0 xatten2Db : 0
>> Chain1 xatten2Db : 0
>> Chain2 xatten2Db : 0
>> Chain0 xatten2Margin : 0
>> Chain1 xatten2Margin : 0
>> Chain2 xatten2Margin : 0
>> Chain1 OutputBias : 2
>> Chain1 DriverBias : 2
>> LNA Control : 13
>> XPA Bias Freq0 : 0
>> XPA Bias Freq1 : 0
>> XPA Bias Freq2 : 0
>> 5GHz modal Header :
>> Chain0 Ant. Control : 16
>> Chain1 Ant. Control : 16
>> Chain2 Ant. Control : 0
>> Ant. Common Control : 288
>> Chain0 Ant. Gain : 0
>> Chain1 Ant. Gain : 0
>> Chain2 Ant. Gain : 0
>> Switch Settle : 45
>> Chain0 TxRxAtten : 32
>> Chain1 TxRxAtten : 32
>> Chain2 TxRxAtten : 11
>> Chain0 RxTxMargin : 0
>> Chain1 RxTxMargin : 0
>> Chain2 RxTxMargin : 16
>> ADC Desired size : 226
>> PGA Desired size : 0
>> Chain0 xlna Gain : 13
>> Chain1 xlna Gain : 13
>> Chain2 xlna Gain : 13
>> txEndToXpaOff : 0
>> txEndToRxOn : 2
>> txFrameToXpaOn : 14
>> CCA Threshold) : 28
>> Chain0 NF Threshold : 255
>> Chain1 NF Threshold : 255
>> Chain2 NF Threshold : 255
>> xpdGain : 1
>> External PD : 1
>> Chain0 I Coefficient : 0
>> Chain1 I Coefficient : 0
>> Chain2 I Coefficient : 0
>> Chain0 Q Coefficient : 0
>> Chain1 Q Coefficient : 0
>> Chain2 Q Coefficient : 0
>> pdGainOverlap : 6
>> Chain0 OutputBias : 3
>> Chain0 DriverBias : 3
>> xPA Bias Level : 2
>> 2chain pwr decrease : 0
>> 3chain pwr decrease : 0
>> txFrameToDataStart : 14
>> txFrameToPaOn : 14
>> HT40 Power Inc. : 0
>> Chain0 bswAtten : 34
>> Chain1 bswAtten : 34
>> Chain2 bswAtten : 0
>> Chain0 bswMargin : 22
>> Chain1 bswMargin : 22
>> Chain2 bswMargin : 0
>> HT40 Switch Settle : 45
>> Chain0 xatten2Db : 0
>> Chain1 xatten2Db : 0
>> Chain2 xatten2Db : 0
>> Chain0 xatten2Margin : 0
>> Chain1 xatten2Margin : 0
>> Chain2 xatten2Margin : 0
>> Chain1 OutputBias : 3
>> Chain1 DriverBias : 3
>> LNA Control : 13
>> XPA Bias Freq0 : 0
>> XPA Bias Freq1 : 0
>> XPA Bias Freq2 : 0
>>
>>>
>>> Wojtek
>>> On 26/01/18 10:59, Sebastian Gottschall wrote:
>>>> i dont know if this is a coincidence. but after testing your patch
>>>> on a standard ubiquiti nanostation m2 the noise floor looks wrong.
>>>> it will stay on -112 which is clearly impossible in 2.4 (before it
>>>> was around -96)
>>>
>>>
>>
>
>
--
Mit freundlichen Grüssen / Regards
Sebastian Gottschall / CTO
NewMedia-NET GmbH - DD-WRT
Firmensitz: Stubenwaldallee 21a, 64625 Bensheim
Registergericht: Amtsgericht Darmstadt, HRB 25473
Geschäftsführer: Peter Steinhäuser, Christian Scheele
http://www.dd-wrt.com
email: [email protected]
Tel.: +496251-582650 / Fax: +496251-5826565
On 01/26/2018 03:20 PM, Sebastian Gottschall wrote:
> Am 26.01.2018 um 15:16 schrieb Wojciech Dubowik:
>>
>>
>> On 26/01/18 12:42, Sebastian Gottschall wrote:
>>> i have a idea what one cause could ne
>>>
>>> + nfval =
>>> + ath9k_hw_get_nf_limits(ah, chan)->cal[i];
>>> + if (nfval > -60 || nfval < -127)
>>> + nfval = default_nf;
>>>
>> This is just a check to make sure we have sane calibrated values. Anything above
>> -60 or under -127 will not work so
>> we take nominal value.
> yes. but that means all < -127 and all > -60 catches it. this is the full value
> range. the check is wrong
> everything is above -60 and bellow -127 at the same time. OR must ne AND
>
The minus sign generates some confusion here (had to evaluate the condition
several times myself to get it right).
what it does is defining the valid range for the nfval as follows
-128: nok (Atheros code for invalid RSSI)
[-127...-60]: ok
[-59...127]: nok
Cheers,
Zefir
On 26/01/18 15:20, Sebastian Gottschall wrote:
> Am 26.01.2018 um 15:16 schrieb Wojciech Dubowik:
>>
>>
>> On 26/01/18 12:42, Sebastian Gottschall wrote:
>>> i have a idea what one cause could ne
>>>
>>> + nfval =
>>> + ath9k_hw_get_nf_limits(ah, chan)->cal[i];
>>> + if (nfval > -60 || nfval < -127)
>>> + nfval = default_nf;
>>>
>> This is just a check to make sure we have sane calibrated values. Anything above -60 or under -127 will not work so
>> we take nominal value.
> yes. but that means all < -127 and all > -60 catches it. this is the full value range. the check is wrong
> everything is above -60 and bellow -127 at the same time. OR must ne AND
Not really. Note the negative numbers.
-60 is a bigger value than -127.
The expressions states that all values from -127 to -60 are valid.
BR
Matthias
AR9003 factory calibration allows to use bigger EEPROM than
standard 1k without changing the default layout. Allow
probing of EEPROM at alternative address if initial check
for default fails.
The original ar9003 eeprom ops are still be used.
Signed-off-by: Wojciech Dubowik <[email protected]>
---
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index c2e210c..23bb677 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -3310,6 +3310,12 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah,
if (ar9300_check_eeprom_header(ah, read, cptr))
goto found;
+ cptr = AR9300_BASE_ADDR_4K;
+ ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n",
+ cptr);
+ if (ar9300_check_eeprom_header(ah, read, cptr))
+ goto found;
+
cptr = AR9300_BASE_ADDR_512;
ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n",
cptr);
--
2.7.4
after reverting your patches all looks normal again. noise is -95
root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat dump_nfcal
Channel Noise Floor : -95
Chain | privNF | # Readings | NF Readings
0 -108 5 -108 -108 -107 -108 -108
1 -106 5 -106 -106 -106 -105 -106
root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
2GHz modal Header :
Chain0 Ant. Control : 0
Chain1 Ant. Control : 0
Chain2 Ant. Control : 0
Ant. Common Control : 0
Chain0 Ant. Gain : 0
Chain1 Ant. Gain : 0
Chain2 Ant. Gain : 0
Switch Settle : 45
Chain0 TxRxAtten : 11
Chain1 TxRxAtten : 11
Chain2 TxRxAtten : 11
Chain0 RxTxMargin : 11
Chain1 RxTxMargin : 11
Chain2 RxTxMargin : 11
ADC Desired size : 224
PGA Desired size : 0
Chain0 xlna Gain : 14
Chain1 xlna Gain : 14
Chain2 xlna Gain : 14
txEndToXpaOff : 0
txEndToRxOn : 2
txFrameToXpaOn : 14
CCA Threshold) : 0
Chain0 NF Threshold : 202
Chain1 NF Threshold : 202
Chain2 NF Threshold : 202
xpdGain : 9
External PD : 1
Chain0 I Coefficient : 0
Chain1 I Coefficient : 0
Chain2 I Coefficient : 0
Chain0 Q Coefficient : 0
Chain1 Q Coefficient : 0
Chain2 Q Coefficient : 0
pdGainOverlap : 6
Chain0 OutputBias : 2
Chain0 DriverBias : 2
xPA Bias Level : 0
2chain pwr decrease : 0
3chain pwr decrease : 0
txFrameToDataStart : 14
txFrameToPaOn : 14
HT40 Power Inc. : 2
Chain0 bswAtten : 21
Chain1 bswAtten : 21
Chain2 bswAtten : 0
Chain0 bswMargin : 31
Chain1 bswMargin : 31
Chain2 bswMargin : 0
HT40 Switch Settle : 44
Chain0 xatten2Db : 0
Chain1 xatten2Db : 0
Chain2 xatten2Db : 0
Chain0 xatten2Margin : 0
Chain1 xatten2Margin : 0
Chain2 xatten2Margin : 0
Chain1 OutputBias : 2
Chain1 DriverBias : 2
LNA Control : 13
XPA Bias Freq0 : 0
XPA Bias Freq1 : 0
XPA Bias Freq2 : 0
5GHz modal Header :
Chain0 Ant. Control : 16
Chain1 Ant. Control : 16
Chain2 Ant. Control : 0
Ant. Common Control : 288
Chain0 Ant. Gain : 0
Chain1 Ant. Gain : 0
Chain2 Ant. Gain : 0
Switch Settle : 45
Chain0 TxRxAtten : 32
Chain1 TxRxAtten : 32
Chain2 TxRxAtten : 11
Chain0 RxTxMargin : 0
Chain1 RxTxMargin : 0
Chain2 RxTxMargin : 16
ADC Desired size : 226
PGA Desired size : 0
Chain0 xlna Gain : 13
Chain1 xlna Gain : 13
Chain2 xlna Gain : 13
txEndToXpaOff : 0
txEndToRxOn : 2
txFrameToXpaOn : 14
CCA Threshold) : 28
Chain0 NF Threshold : 255
Chain1 NF Threshold : 255
Chain2 NF Threshold : 255
xpdGain : 1
External PD : 1
Chain0 I Coefficient : 0
Chain1 I Coefficient : 0
Chain2 I Coefficient : 0
Chain0 Q Coefficient : 0
Chain1 Q Coefficient : 0
Chain2 Q Coefficient : 0
pdGainOverlap : 6
Chain0 OutputBias : 3
Chain0 DriverBias : 3
xPA Bias Level : 2
2chain pwr decrease : 0
3chain pwr decrease : 0
txFrameToDataStart : 14
txFrameToPaOn : 14
HT40 Power Inc. : 0
Chain0 bswAtten : 34
Chain1 bswAtten : 34
Chain2 bswAtten : 0
Chain0 bswMargin : 22
Chain1 bswMargin : 22
Chain2 bswMargin : 0
HT40 Switch Settle : 45
Chain0 xatten2Db : 0
Chain1 xatten2Db : 0
Chain2 xatten2Db : 0
Chain0 xatten2Margin : 0
Chain1 xatten2Margin : 0
Chain2 xatten2Margin : 0
Chain1 OutputBias : 3
Chain1 DriverBias : 3
LNA Control : 13
XPA Bias Freq0 : 0
XPA Bias Freq1 : 0
XPA Bias Freq2 : 0
Am 26.01.2018 um 12:07 schrieb Wojciech Dubowik:
> Are you sure you have applied path 4 in the series. You should see
> calibration piers. Sth like:
>
> Calibration data
> Chain 0
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 14 0 136 0 0 0
> 2437 13 0 136 0 0 0
> 2472 11 0 136 0 0 0
> Chain 1
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 11 0 137 0 0 0
> 2437 11 0 139 0 0 0
> 2472 10 0 137 0 0 0
> Chain 2
> Freq ref volt temp nf_cal nf_pow rx_temp
> 2412 13 0 138 0 0 0
> 2437 14 0 139 0 0 0
> 2472 14 0 139 0 0 0
>
> I have just done backports from ath.git and I can see these entries
> with my Compex card.
>
> Wojtek
>
>
> On 26/01/18 11:36, Sebastian Gottschall wrote:
>> Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
>>> I will try it with again with couple of OEM cards.
>> this is no card. the eeprom is stored in flash memory. so the chip is
>> a 9280 pcie chip which is connected on board, but has no own flash
>> memory for calibration data. this is stored in system flash memory
>>>
>>> Is nanostation calibrated for noisefloor? You can see it with
>>> modal_eeprom in debugfs.
>> root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
>> 2GHz modal Header :
>> Chain0 Ant. Control : 0
>> Chain1 Ant. Control : 0
>> Chain2 Ant. Control : 0
>> Ant. Common Control : 0
>> Chain0 Ant. Gain : 0
>> Chain1 Ant. Gain : 0
>> Chain2 Ant. Gain : 0
>> Switch Settle : 45
>> Chain0 TxRxAtten : 11
>> Chain1 TxRxAtten : 11
>> Chain2 TxRxAtten : 11
>> Chain0 RxTxMargin : 11
>> Chain1 RxTxMargin : 11
>> Chain2 RxTxMargin : 11
>> ADC Desired size : 224
>> PGA Desired size : 0
>> Chain0 xlna Gain : 14
>> Chain1 xlna Gain : 14
>> Chain2 xlna Gain : 14
>> txEndToXpaOff : 0
>> txEndToRxOn : 2
>> txFrameToXpaOn : 14
>> CCA Threshold) : 0
>> Chain0 NF Threshold : 202
>> Chain1 NF Threshold : 202
>> Chain2 NF Threshold : 202
>> xpdGain : 9
>> External PD : 1
>> Chain0 I Coefficient : 0
>> Chain1 I Coefficient : 0
>> Chain2 I Coefficient : 0
>> Chain0 Q Coefficient : 0
>> Chain1 Q Coefficient : 0
>> Chain2 Q Coefficient : 0
>> pdGainOverlap : 6
>> Chain0 OutputBias : 2
>> Chain0 DriverBias : 2
>> xPA Bias Level : 0
>> 2chain pwr decrease : 0
>> 3chain pwr decrease : 0
>> txFrameToDataStart : 14
>> txFrameToPaOn : 14
>> HT40 Power Inc. : 2
>> Chain0 bswAtten : 21
>> Chain1 bswAtten : 21
>> Chain2 bswAtten : 0
>> Chain0 bswMargin : 31
>> Chain1 bswMargin : 31
>> Chain2 bswMargin : 0
>> HT40 Switch Settle : 44
>> Chain0 xatten2Db : 0
>> Chain1 xatten2Db : 0
>> Chain2 xatten2Db : 0
>> Chain0 xatten2Margin : 0
>> Chain1 xatten2Margin : 0
>> Chain2 xatten2Margin : 0
>> Chain1 OutputBias : 2
>> Chain1 DriverBias : 2
>> LNA Control : 13
>> XPA Bias Freq0 : 0
>> XPA Bias Freq1 : 0
>> XPA Bias Freq2 : 0
>> 5GHz modal Header :
>> Chain0 Ant. Control : 16
>> Chain1 Ant. Control : 16
>> Chain2 Ant. Control : 0
>> Ant. Common Control : 288
>> Chain0 Ant. Gain : 0
>> Chain1 Ant. Gain : 0
>> Chain2 Ant. Gain : 0
>> Switch Settle : 45
>> Chain0 TxRxAtten : 32
>> Chain1 TxRxAtten : 32
>> Chain2 TxRxAtten : 11
>> Chain0 RxTxMargin : 0
>> Chain1 RxTxMargin : 0
>> Chain2 RxTxMargin : 16
>> ADC Desired size : 226
>> PGA Desired size : 0
>> Chain0 xlna Gain : 13
>> Chain1 xlna Gain : 13
>> Chain2 xlna Gain : 13
>> txEndToXpaOff : 0
>> txEndToRxOn : 2
>> txFrameToXpaOn : 14
>> CCA Threshold) : 28
>> Chain0 NF Threshold : 255
>> Chain1 NF Threshold : 255
>> Chain2 NF Threshold : 255
>> xpdGain : 1
>> External PD : 1
>> Chain0 I Coefficient : 0
>> Chain1 I Coefficient : 0
>> Chain2 I Coefficient : 0
>> Chain0 Q Coefficient : 0
>> Chain1 Q Coefficient : 0
>> Chain2 Q Coefficient : 0
>> pdGainOverlap : 6
>> Chain0 OutputBias : 3
>> Chain0 DriverBias : 3
>> xPA Bias Level : 2
>> 2chain pwr decrease : 0
>> 3chain pwr decrease : 0
>> txFrameToDataStart : 14
>> txFrameToPaOn : 14
>> HT40 Power Inc. : 0
>> Chain0 bswAtten : 34
>> Chain1 bswAtten : 34
>> Chain2 bswAtten : 0
>> Chain0 bswMargin : 22
>> Chain1 bswMargin : 22
>> Chain2 bswMargin : 0
>> HT40 Switch Settle : 45
>> Chain0 xatten2Db : 0
>> Chain1 xatten2Db : 0
>> Chain2 xatten2Db : 0
>> Chain0 xatten2Margin : 0
>> Chain1 xatten2Margin : 0
>> Chain2 xatten2Margin : 0
>> Chain1 OutputBias : 3
>> Chain1 DriverBias : 3
>> LNA Control : 13
>> XPA Bias Freq0 : 0
>> XPA Bias Freq1 : 0
>> XPA Bias Freq2 : 0
>>
>>>
>>> Wojtek
>>> On 26/01/18 10:59, Sebastian Gottschall wrote:
>>>> i dont know if this is a coincidence. but after testing your patch
>>>> on a standard ubiquiti nanostation m2 the noise floor looks wrong.
>>>> it will stay on -112 which is clearly impossible in 2.4 (before it
>>>> was around -96)
>>>
>>>
>>
>
>
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