From: Ramesh Gupta <[email protected]>
Signed-off-by: Ramesh Gupta <[email protected]>
Signed-off-by: Hari Kanigeri <[email protected]>
---
arch/arm/plat-omap/iommu.c | 22 ++++++++--------------
1 files changed, 8 insertions(+), 14 deletions(-)
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index e3eb038..aeb2c33 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -471,22 +471,15 @@ EXPORT_SYMBOL_GPL(foreach_iommu_device);
*/
static void flush_iopgd_range(u32 *first, u32 *last)
{
- /* FIXME: L2 cache should be taken care of if it exists */
- do {
- asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd"
- : : "r" (first));
- first += L1_CACHE_BYTES / sizeof(*first);
- } while (first <= last);
+ dmac_flush_range(first, last);
+ outer_flush_range(virt_to_phys(first), virt_to_phys(last));
}
+
static void flush_iopte_range(u32 *first, u32 *last)
{
- /* FIXME: L2 cache should be taken care of if it exists */
- do {
- asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte"
- : : "r" (first));
- first += L1_CACHE_BYTES / sizeof(*first);
- } while (first <= last);
+ dmac_flush_range(first, last);
+ outer_flush_range(virt_to_phys(first), virt_to_phys(last));
}
static void iopte_free(u32 *iopte)
@@ -750,7 +743,7 @@ size_t iopgtable_clear_entry(struct iommu *obj, u32 da)
}
EXPORT_SYMBOL_GPL(iopgtable_clear_entry);
-static void iopgtable_clear_entry_all(struct iommu *obj)
+void iopgtable_clear_entry_all(struct iommu *obj)
{
int i;
@@ -777,7 +770,7 @@ static void iopgtable_clear_entry_all(struct iommu *obj)
spin_unlock(&obj->page_table_lock);
}
-
+EXPORT_SYMBOL_GPL(iopgtable_clear_entry_all);
/*
* Device IOMMU generic operations
*/
@@ -1068,6 +1061,7 @@ static void iopte_cachep_ctor(void *iopte)
clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
}
+
static int __init omap_iommu_init(void)
{
struct kmem_cache *p;
--
1.7.0.4
From: Hari Kanigeri <[email protected]>
pgd and pte entries weren't getting flushed out leading to MMU faults.
Signed-off-by: Hari Kanigeri <[email protected]>
---
arch/arm/plat-omap/iommu.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index aeb2c33..e9473ff 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -508,7 +508,7 @@ static u32 *iopte_alloc(struct iommu *obj, u32 *iopgd, u32 da)
return ERR_PTR(-ENOMEM);
*iopgd = virt_to_phys(iopte) | IOPGD_TABLE;
- flush_iopgd_range(iopgd, iopgd);
+ flush_iopgd_range(iopgd, iopgd + 1);
dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);
} else {
@@ -537,7 +537,7 @@ static int iopgd_alloc_section(struct iommu *obj, u32 da, u32 pa, u32 prot)
}
*iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION;
- flush_iopgd_range(iopgd, iopgd);
+ flush_iopgd_range(iopgd, iopgd + 1);
return 0;
}
@@ -554,7 +554,7 @@ static int iopgd_alloc_super(struct iommu *obj, u32 da, u32 pa, u32 prot)
for (i = 0; i < 16; i++)
*(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER;
- flush_iopgd_range(iopgd, iopgd + 15);
+ flush_iopgd_range(iopgd, iopgd + 16);
return 0;
}
@@ -567,7 +567,7 @@ static int iopte_alloc_page(struct iommu *obj, u32 da, u32 pa, u32 prot)
return PTR_ERR(iopte);
*iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL;
- flush_iopte_range(iopte, iopte);
+ flush_iopte_range(iopte, iopte + 1);
dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n",
__func__, da, pa, iopte, *iopte);
@@ -592,7 +592,7 @@ static int iopte_alloc_large(struct iommu *obj, u32 da, u32 pa, u32 prot)
for (i = 0; i < 16; i++)
*(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE;
- flush_iopte_range(iopte, iopte + 15);
+ flush_iopte_range(iopte, iopte + 16);
return 0;
}
@@ -763,7 +763,7 @@ void iopgtable_clear_entry_all(struct iommu *obj)
iopte_free(iopte_offset(iopgd, 0));
*iopgd = 0;
- flush_iopgd_range(iopgd, iopgd);
+ flush_iopgd_range(iopgd, iopgd + 1);
}
flush_iotlb_all(obj);
--
1.7.0.4
Hi,
On Tue, Mar 1, 2011 at 9:46 PM, Fernando Guzman Lugo
<[email protected]> wrote:
> From: Ramesh Gupta <[email protected]>
No patch body description at all?
Can we get at least something here?
Regards,
David
>
> Signed-off-by: Ramesh Gupta <[email protected]>
> Signed-off-by: Hari Kanigeri <[email protected]>
> ---
> arch/arm/plat-omap/iommu.c | 22 ++++++++--------------
> 1 files changed, 8 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
> index e3eb038..aeb2c33 100644
> --- a/arch/arm/plat-omap/iommu.c
> +++ b/arch/arm/plat-omap/iommu.c
> @@ -471,22 +471,15 @@ EXPORT_SYMBOL_GPL(foreach_iommu_device);
> */
> static void flush_iopgd_range(u32 *first, u32 *last)
> {
> - /* FIXME: L2 cache should be taken care of if it exists */
> - do {
> - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd"
> - : : "r" (first));
> - first += L1_CACHE_BYTES / sizeof(*first);
> - } while (first <= last);
> + dmac_flush_range(first, last);
> + outer_flush_range(virt_to_phys(first), virt_to_phys(last));
> }
>
> +
> static void flush_iopte_range(u32 *first, u32 *last)
> {
> - /* FIXME: L2 cache should be taken care of if it exists */
> - do {
> - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte"
> - : : "r" (first));
> - first += L1_CACHE_BYTES / sizeof(*first);
> - } while (first <= last);
> + dmac_flush_range(first, last);
> + outer_flush_range(virt_to_phys(first), virt_to_phys(last));
> }
>
> static void iopte_free(u32 *iopte)
> @@ -750,7 +743,7 @@ size_t iopgtable_clear_entry(struct iommu *obj, u32 da)
> }
> EXPORT_SYMBOL_GPL(iopgtable_clear_entry);
>
> -static void iopgtable_clear_entry_all(struct iommu *obj)
> +void iopgtable_clear_entry_all(struct iommu *obj)
> {
> int i;
>
> @@ -777,7 +770,7 @@ static void iopgtable_clear_entry_all(struct iommu *obj)
>
> spin_unlock(&obj->page_table_lock);
> }
> -
> +EXPORT_SYMBOL_GPL(iopgtable_clear_entry_all);
> /*
> * Device IOMMU generic operations
> */
> @@ -1068,6 +1061,7 @@ static void iopte_cachep_ctor(void *iopte)
> clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
> }
>
> +
> static int __init omap_iommu_init(void)
> {
> struct kmem_cache *p;
> --
> 1.7.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
Hi,
On Tue, Mar 1, 2011 at 9:46 PM, Fernando Guzman Lugo
<[email protected]> wrote:
> From: Hari Kanigeri <[email protected]>
>
> pgd and pte entries weren't getting flushed out leading to MMU faults.
May I ask you to add to the patch body description why it's wrong and
why your solution is necessary?
Br,
David
>
> Signed-off-by: Hari Kanigeri <[email protected]>
> ---
> arch/arm/plat-omap/iommu.c | 12 ++++++------
> 1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
> index aeb2c33..e9473ff 100644
> --- a/arch/arm/plat-omap/iommu.c
> +++ b/arch/arm/plat-omap/iommu.c
> @@ -508,7 +508,7 @@ static u32 *iopte_alloc(struct iommu *obj, u32 *iopgd, u32 da)
> return ERR_PTR(-ENOMEM);
>
> *iopgd = virt_to_phys(iopte) | IOPGD_TABLE;
> - flush_iopgd_range(iopgd, iopgd);
> + flush_iopgd_range(iopgd, iopgd + 1);
>
> dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);
> } else {
> @@ -537,7 +537,7 @@ static int iopgd_alloc_section(struct iommu *obj, u32 da, u32 pa, u32 prot)
> }
>
> *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION;
> - flush_iopgd_range(iopgd, iopgd);
> + flush_iopgd_range(iopgd, iopgd + 1);
> return 0;
> }
>
> @@ -554,7 +554,7 @@ static int iopgd_alloc_super(struct iommu *obj, u32 da, u32 pa, u32 prot)
>
> for (i = 0; i < 16; i++)
> *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER;
> - flush_iopgd_range(iopgd, iopgd + 15);
> + flush_iopgd_range(iopgd, iopgd + 16);
> return 0;
> }
>
> @@ -567,7 +567,7 @@ static int iopte_alloc_page(struct iommu *obj, u32 da, u32 pa, u32 prot)
> return PTR_ERR(iopte);
>
> *iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL;
> - flush_iopte_range(iopte, iopte);
> + flush_iopte_range(iopte, iopte + 1);
>
> dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n",
> __func__, da, pa, iopte, *iopte);
> @@ -592,7 +592,7 @@ static int iopte_alloc_large(struct iommu *obj, u32 da, u32 pa, u32 prot)
>
> for (i = 0; i < 16; i++)
> *(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE;
> - flush_iopte_range(iopte, iopte + 15);
> + flush_iopte_range(iopte, iopte + 16);
> return 0;
> }
>
> @@ -763,7 +763,7 @@ void iopgtable_clear_entry_all(struct iommu *obj)
> iopte_free(iopte_offset(iopgd, 0));
>
> *iopgd = 0;
> - flush_iopgd_range(iopgd, iopgd);
> + flush_iopgd_range(iopgd, iopgd + 1);
> }
>
> flush_iotlb_all(obj);
> --
> 1.7.0.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
Hello,
> -----Original Message-----
> From: [email protected] [mailto:linux-omap-
> [email protected]] On Behalf Of Fernando Guzman Lugo
> Sent: Wednesday, March 02, 2011 1:17 AM
> To: [email protected]
> Cc: [email protected]; [email protected]; linux-
> [email protected]; [email protected]; linux-
> [email protected]; Ramesh Gupta; Hari Kanigeri
> Subject: [PATCH] omap:iommu-added cache flushing operation for L2
> cache
>
> From: Ramesh Gupta <[email protected]>
>
> Signed-off-by: Ramesh Gupta <[email protected]>
> Signed-off-by: Hari Kanigeri <[email protected]>
> ---
> arch/arm/plat-omap/iommu.c | 22 ++++++++--------------
> 1 files changed, 8 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
> index e3eb038..aeb2c33 100644
> --- a/arch/arm/plat-omap/iommu.c
> +++ b/arch/arm/plat-omap/iommu.c
> @@ -471,22 +471,15 @@ EXPORT_SYMBOL_GPL(foreach_iommu_device);
> */
> static void flush_iopgd_range(u32 *first, u32 *last)
> {
> - /* FIXME: L2 cache should be taken care of if it exists */
> - do {
> - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd"
> - : : "r" (first));
> - first += L1_CACHE_BYTES / sizeof(*first);
> - } while (first <= last);
> + dmac_flush_range(first, last);
There is note just above this API.
/*
* These are private to the dma-mapping API. Do not use directly.
* Their sole purpose is to ensure that data held in the cache
* is visible to DMA, or data written by DMA to system memory is
* visible to the CPU.
*/
#define dmac_map_area cpu_cache.dma_map_area
#define dmac_unmap_area cpu_cache.dma_unmap_area
#define dmac_flush_range cpu_cache.dma_flush_range
> + outer_flush_range(virt_to_phys(first), virt_to_phys(last));
> }
>
Hi Santosh,
On Wed, Mar 2, 2011 at 6:48 AM, Santosh Shilimkar
<[email protected]> wrote:
> Hello,
>> -----Original Message-----
>> From: [email protected] [mailto:linux-omap-
>> [email protected]] On Behalf Of Fernando Guzman Lugo
>> Sent: Wednesday, March 02, 2011 1:17 AM
>> To: [email protected]
>> Cc: [email protected]; [email protected]; linux-
>> [email protected]; [email protected]; linux-
>> [email protected]; Ramesh Gupta; Hari Kanigeri
>> Subject: [PATCH] omap:iommu-added cache flushing operation for L2
>> cache
>>
>> From: Ramesh Gupta <[email protected]>
>>
>> Signed-off-by: Ramesh Gupta <[email protected]>
>> Signed-off-by: Hari Kanigeri <[email protected]>
>> ---
>> ?arch/arm/plat-omap/iommu.c | ? 22 ++++++++--------------
>> ?1 files changed, 8 insertions(+), 14 deletions(-)
>>
>> diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
>> index e3eb038..aeb2c33 100644
>> --- a/arch/arm/plat-omap/iommu.c
>> +++ b/arch/arm/plat-omap/iommu.c
>> @@ -471,22 +471,15 @@ EXPORT_SYMBOL_GPL(foreach_iommu_device);
>> ? */
>> ?static void flush_iopgd_range(u32 *first, u32 *last)
>> ?{
>> - ? ? /* FIXME: L2 cache should be taken care of if it exists */
>> - ? ? do {
>> - ? ? ? ? ? ? asm("mcr ? ? ? ?p15, 0, %0, c7, c10, 1 @ flush_pgd"
>> - ? ? ? ? ? ? ? ? : : "r" (first));
>> - ? ? ? ? ? ? first += L1_CACHE_BYTES / sizeof(*first);
>> - ? ? } while (first <= last);
>> + ? ? dmac_flush_range(first, last);
>
> There is note just above this API.
Thank you for your inputs. I agree, I will send an updated patch with
proper apis.
regards
Ramesh Gupta G
David,
On Wed, Mar 2, 2011 at 5:58 AM, David Cohen <[email protected]> wrote:
> Hi,
>
> On Tue, Mar 1, 2011 at 9:46 PM, Fernando Guzman Lugo
> <[email protected]> wrote:
>> From: Ramesh Gupta <[email protected]>
>
> No patch body description at all?
> Can we get at least something here?
My apologies, I will be sending an updated patch
with description.
regards
Ramesh Gupta G