This patch series adds initial Device Tree support to BCM63XX by adding
bindings for interrupts, GPIOs and clocks to Device Tree. Finally it adds
one "real" user, the serial driver, to the device tree boards.
The main intention of this patch series is to make the transition to
device tree as smooth as possible by retaining backward compatibility
with not yet DT enabled drivers. Also to reduce the number of potential
regressions I tried to make the changes as small as possible. The resulting
code has therefore still a lot of room for improvement.
The first patches add support for loading kernel embedded DTBs, and
add generic fallback DTSs for boards not yet having a DTS.
Next the IRQ controllers get registered through device tree.
The next set prepares all bcm63xx drivers using clocks for switching to
the generic clock framework, add bindings for the clocks present, then
replaces the custom implementation with one using the common clock
framework.
Last of the generic controllers the GPIO controller is converted to
Device Tree. This is more of an interim solution, as I plan to replace
the driver with a proper pinctrl driver in the future.
Finally, to have a user for some of this, I added support for
registering the serial console through device tree and added appropriate
board files for all currently supported boards.
These patches have been tested on BCM6348, BCM6358, BCM6368 and BCM6328, but
still need to be tested on BCM6338 and BCM6345.
The next steps after this will be:
* convert the reminder of the device drivers and PCI(e) and pccard
controllers to device tree support
* improve the device tree bindings of currently registered devices
* replace the GPIO controller driver with a pinctrl implementation
This patch series is based on Ralf's upstream-sfr mips tree. My hope is
that these changes eventually go through Ralf's tree instead of through each
subsystem's tree, to make the switch less slow.
Jonas Gorski (15):
MIPS: BCM63XX: add support for loading DTB
MIPS: BCM63XX: add simple Device Tree includes for all SoCs
MIPS: BCM63XX: add generic fallback device trees
MIPS: BCM63XX: add Device Tree glue code for IRQ handling
SPI: spi-bcm63xx: use clk_{prepare_enable,disable_unprepare}
bcm63xx-rng: use clk_{prepare_enable,disable_unprepare}
net: ethernet: bcm63xx_enet: use
clk_{prepare_enable,disable_unprepare}
serial: bcm63xx_uart: remove unnecessary include
MIPS: BCM63XX: add Device Tree clock definitions
MIPS: BCM63XX: switch to common clock and Device Tree
MIPS: BCM63XX: register GPIO controller through Device Tree
serial: bcm63xx_uart: allow probing through Device Tree
MIPS: BCM63XX: add serial blocks to Device Tree includes
MIPS: BCM63XX: add empty Device Trees for all supported boards
MIPS: BCM63XX: enable serial through Device Tree
.../devicetree/bindings/clock/bcm63xx-clock.txt | 32 ++
.../devicetree/bindings/gpio/bcm63xx-gpio.txt | 24 ++
.../devicetree/bindings/mips/bcm63xx/epic.txt | 20 ++
.../devicetree/bindings/mips/bcm63xx/ipic.txt | 18 +
.../bindings/tty/serial/bcm63xx-uart.txt | 17 +
arch/mips/Kconfig | 4 +-
arch/mips/bcm63xx/Kconfig | 2 +
arch/mips/bcm63xx/Makefile | 8 +-
arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 -
arch/mips/bcm63xx/clk.c | 331 --------------------
arch/mips/bcm63xx/dts/96328avng.dts | 25 ++
arch/mips/bcm63xx/dts/96338gw.dts | 25 ++
arch/mips/bcm63xx/dts/96338w.dts | 25 ++
arch/mips/bcm63xx/dts/96345gw2.dts | 25 ++
arch/mips/bcm63xx/dts/96348gw.dts | 25 ++
arch/mips/bcm63xx/dts/96348gw_10.dts | 25 ++
arch/mips/bcm63xx/dts/96348gw_11.dts | 25 ++
arch/mips/bcm63xx/dts/96348gw_a.dts | 25 ++
arch/mips/bcm63xx/dts/96348r.dts | 25 ++
arch/mips/bcm63xx/dts/96358vw.dts | 25 ++
arch/mips/bcm63xx/dts/96358vw2.dts | 26 ++
arch/mips/bcm63xx/dts/Kconfig | 67 ++++
arch/mips/bcm63xx/dts/Makefile | 28 ++
arch/mips/bcm63xx/dts/agpf_s0.dts | 22 ++
arch/mips/bcm63xx/dts/bcm6328.dtsi | 158 ++++++++++
arch/mips/bcm63xx/dts/bcm6338.dtsi | 108 +++++++
arch/mips/bcm63xx/dts/bcm6345.dtsi | 94 ++++++
arch/mips/bcm63xx/dts/bcm6348.dtsi | 115 +++++++
arch/mips/bcm63xx/dts/bcm6358.dtsi | 156 +++++++++
arch/mips/bcm63xx/dts/bcm6368.dtsi | 196 ++++++++++++
arch/mips/bcm63xx/dts/bcm96328_generic.dts | 21 ++
arch/mips/bcm63xx/dts/bcm96338_generic.dts | 21 ++
arch/mips/bcm63xx/dts/bcm96345_generic.dts | 21 ++
arch/mips/bcm63xx/dts/bcm96348_generic.dts | 21 ++
arch/mips/bcm63xx/dts/bcm96358_generic.dts | 21 ++
arch/mips/bcm63xx/dts/bcm96368_generic.dts | 21 ++
arch/mips/bcm63xx/dts/dv201amr.dts | 25 ++
arch/mips/bcm63xx/dts/dwv_s0.dts | 25 ++
arch/mips/bcm63xx/dts/fast2404.dts | 25 ++
arch/mips/bcm63xx/dts/rta1025w_16.dts | 25 ++
arch/mips/bcm63xx/gpio.c | 35 ++-
arch/mips/bcm63xx/irq.c | 32 ++
arch/mips/bcm63xx/prom.c | 3 -
arch/mips/bcm63xx/setup.c | 85 +++++
arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h | 11 -
drivers/char/hw_random/bcm63xx-rng.c | 6 +-
drivers/clk/Makefile | 1 +
drivers/clk/clk-bcm63xx.c | 241 ++++++++++++++
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 +-
drivers/spi/spi-bcm63xx.c | 6 +-
drivers/tty/serial/bcm63xx_uart.c | 36 ++-
51 files changed, 1993 insertions(+), 392 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/bcm63xx-clock.txt
create mode 100644 Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt
create mode 100644 Documentation/devicetree/bindings/mips/bcm63xx/epic.txt
create mode 100644 Documentation/devicetree/bindings/mips/bcm63xx/ipic.txt
create mode 100644 Documentation/devicetree/bindings/tty/serial/bcm63xx-uart.txt
delete mode 100644 arch/mips/bcm63xx/clk.c
create mode 100644 arch/mips/bcm63xx/dts/96328avng.dts
create mode 100644 arch/mips/bcm63xx/dts/96338gw.dts
create mode 100644 arch/mips/bcm63xx/dts/96338w.dts
create mode 100644 arch/mips/bcm63xx/dts/96345gw2.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw_10.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw_11.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw_a.dts
create mode 100644 arch/mips/bcm63xx/dts/96348r.dts
create mode 100644 arch/mips/bcm63xx/dts/96358vw.dts
create mode 100644 arch/mips/bcm63xx/dts/96358vw2.dts
create mode 100644 arch/mips/bcm63xx/dts/Kconfig
create mode 100644 arch/mips/bcm63xx/dts/Makefile
create mode 100644 arch/mips/bcm63xx/dts/agpf_s0.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm6328.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6338.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6345.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6348.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6358.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6368.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm96328_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96338_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96345_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96348_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96358_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96368_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/dv201amr.dts
create mode 100644 arch/mips/bcm63xx/dts/dwv_s0.dts
create mode 100644 arch/mips/bcm63xx/dts/fast2404.dts
create mode 100644 arch/mips/bcm63xx/dts/rta1025w_16.dts
delete mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h
create mode 100644 drivers/clk/clk-bcm63xx.c
--
1.7.2.5
Add generic fallback device trees to load if there is no specific
device tree for the board available. This ensures that always present
devices like interrupt controllers are always available.
Signed-off-by: Jonas Gorski <[email protected]>
---
arch/mips/bcm63xx/dts/Makefile | 8 ++++++++
arch/mips/bcm63xx/dts/bcm96328_generic.dts | 21 +++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm96338_generic.dts | 21 +++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm96345_generic.dts | 21 +++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm96348_generic.dts | 21 +++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm96358_generic.dts | 21 +++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm96368_generic.dts | 21 +++++++++++++++++++++
arch/mips/bcm63xx/setup.c | 17 +++++++++++------
8 files changed, 145 insertions(+), 6 deletions(-)
create mode 100644 arch/mips/bcm63xx/dts/bcm96328_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96338_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96345_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96348_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96358_generic.dts
create mode 100644 arch/mips/bcm63xx/dts/bcm96368_generic.dts
diff --git a/arch/mips/bcm63xx/dts/Makefile b/arch/mips/bcm63xx/dts/Makefile
index 69c374b..94d1057 100644
--- a/arch/mips/bcm63xx/dts/Makefile
+++ b/arch/mips/bcm63xx/dts/Makefile
@@ -1,2 +1,10 @@
+# generic fallback boards
+obj-$(CONFIG_BCM63XX_CPU_6328) += bcm96328_generic.dtb.o
+obj-$(CONFIG_BCM63XX_CPU_6338) += bcm96338_generic.dtb.o
+obj-$(CONFIG_BCM63XX_CPU_6345) += bcm96345_generic.dtb.o
+obj-$(CONFIG_BCM63XX_CPU_6348) += bcm96348_generic.dtb.o
+obj-$(CONFIG_BCM63XX_CPU_6358) += bcm96358_generic.dtb.o
+obj-$(CONFIG_BCM63XX_CPU_6368) += bcm96368_generic.dtb.o
+
$(obj)/%.dtb: $(obj)/%.dts
$(call if_changed,dtc)
diff --git a/arch/mips/bcm63xx/dts/bcm96328_generic.dts b/arch/mips/bcm63xx/dts/bcm96328_generic.dts
new file mode 100644
index 0000000..13cdc48
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm96328_generic.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/*
+ * Fallback Device Tree Source for Broadcom BCM6328 based boards
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6328.dtsi"
+
+/ {
+ model = "Generic BCM6328 board";
+ compatible = "bcm96328-generic";
+
+ ubus@10000000 {
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm96338_generic.dts b/arch/mips/bcm63xx/dts/bcm96338_generic.dts
new file mode 100644
index 0000000..3b4e7b0
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm96338_generic.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/*
+ * Fallback Device Tree Source for Broadcom BCM6338 based boards
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6338.dtsi"
+
+/ {
+ model = "Generic BCM6338 board";
+ compatible = "bcm96338-generic";
+
+ ubus@fffe0000 {
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm96345_generic.dts b/arch/mips/bcm63xx/dts/bcm96345_generic.dts
new file mode 100644
index 0000000..2bbf69e
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm96345_generic.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/*
+ * Fallback Device Tree Source for Broadcom BCM6345 based boards
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6345.dtsi"
+
+/ {
+ model = "Generic BCM6345 board";
+ compatible = "bcm96345-generic";
+
+ ubus@fffe0000 {
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm96348_generic.dts b/arch/mips/bcm63xx/dts/bcm96348_generic.dts
new file mode 100644
index 0000000..d3c21a9
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm96348_generic.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/*
+ * Fallback Device Tree Source for Broadcom BCM6348 based boards
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "Generic BCM6348 board";
+ compatible = "bcm96348-generic";
+
+ ubus@fffe0000 {
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm96358_generic.dts b/arch/mips/bcm63xx/dts/bcm96358_generic.dts
new file mode 100644
index 0000000..7db5b8f
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm96358_generic.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/*
+ * Fallback Device Tree Source for Broadcom BCM6358 based boards
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6358.dtsi"
+
+/ {
+ model = "Generic BCM6358 board";
+ compatible = "bcm96358-generic";
+
+ ubus@fffe0000 {
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm96368_generic.dts b/arch/mips/bcm63xx/dts/bcm96368_generic.dts
new file mode 100644
index 0000000..a5c79a6
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm96368_generic.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+/*
+ * Fallback Device Tree Source for Broadcom BCM6368 based boards
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6368.dtsi"
+
+/ {
+ model = "Generic BCM6368 board";
+ compatible = "bcm96368-generic";
+
+ ubus@10000000 {
+ };
+};
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index 8712354..b1fa63d 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -209,9 +209,16 @@ void __init device_tree_init(void)
devtree = find_compatible_tree(of_ids[0].compatible);
if (!devtree) {
- pr_warn("no compatible device tree found for board %s\n"
+ pr_warn("no compatible device tree found for board %s, using fallback tree\n",
of_ids[0].compatible);
- return;
+
+ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
+ "bcm9%x-generic", bcm63xx_get_cpu_id());
+ devtree = find_compatible_tree(of_ids[0].compatible);
+
+ if (!devtree)
+ panic("no fallback tree available for BCM%x!\n",
+ bcm63xx_get_cpu_id());
}
__dt_setup_arch(devtree);
@@ -223,10 +230,8 @@ void __init device_tree_init(void)
int __init bcm63xx_populate_device_tree(void)
{
- if (!of_have_populated_dt()) {
- pr_warn("device tree not available\n");
- return -ENODEV;
- }
+ if (!of_have_populated_dt())
+ panic("device tree not available\n");
return of_platform_populate(NULL, of_ids, NULL, NULL);
}
--
1.7.2.5
Switch BCM63XX to the common clock framework and use clkdev for
providing clock name lookups for non-DT devices.
Clocks can have a frequency and gate-bit, or none, in case they
are just provided for drivers expecting them to be present.
Signed-off-by: Jonas Gorski <[email protected]>
---
.../devicetree/bindings/clock/bcm63xx-clock.txt | 32 ++
arch/mips/Kconfig | 3 +-
arch/mips/bcm63xx/Makefile | 7 +-
arch/mips/bcm63xx/clk.c | 331 --------------------
arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h | 11 -
drivers/clk/Makefile | 1 +
drivers/clk/clk-bcm63xx.c | 241 ++++++++++++++
7 files changed, 279 insertions(+), 347 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/bcm63xx-clock.txt
delete mode 100644 arch/mips/bcm63xx/clk.c
delete mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h
create mode 100644 drivers/clk/clk-bcm63xx.c
diff --git a/Documentation/devicetree/bindings/clock/bcm63xx-clock.txt b/Documentation/devicetree/bindings/clock/bcm63xx-clock.txt
new file mode 100644
index 0000000..467c0c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/bcm63xx-clock.txt
@@ -0,0 +1,32 @@
+* Broadcom BCM63XX Clock bindings
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible: one of
+ a) "brcm,bcm63xx-clock"
+ Standard BCM63XX clock.
+ b) "brcm,bcm63xx-sar-clock"
+ SAR/ATM clock, which requires a reset of the SAR/ATM block.
+ c) "brcm,bcm63xx-enetsw-clock"
+ Generic ethernet switch clock, which requires a reset of the block.
+ d) "brcm,bcm6368-enetsw-clock"
+ BCM6368 ethernet switch clock, which requires additional clocks to be
+ enabled during reset.
+
+Optional properties:
+- brcm,gate-bit: gate bit in the clock control register.
+
+- clock-frequency: frequency of this clock.
+
+Example:
+
+ hsspi: clock@9 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "hsspi";
+ brcm,gate-bit = <9>;
+ clock-frequency = <133333333>;
+ };
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 168b0fc..1203113 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -131,7 +131,8 @@ config BCM63XX
select SYS_HAS_EARLY_PRINTK
select SWAP_IO_SPACE
select ARCH_REQUIRE_GPIOLIB
- select HAVE_CLK
+ select COMMON_CLK
+ select CLKDEV
select USE_OF
help
Support for BCM63XX based boards
diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
index 30971a7..994893c 100644
--- a/arch/mips/bcm63xx/Makefile
+++ b/arch/mips/bcm63xx/Makefile
@@ -1,7 +1,6 @@
-obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
- dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \
- dev-usb-usbd.o
+obj-y += cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o setup.o \
+ timer.o dev-dsp.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-uart.o dev-wdt.o dev-usb-usbd.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-y += boards/
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
deleted file mode 100644
index b9e948d..0000000
--- a/arch/mips/bcm63xx/clk.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2008 Maxime Bizon <[email protected]>
- */
-
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <bcm63xx_cpu.h>
-#include <bcm63xx_io.h>
-#include <bcm63xx_regs.h>
-#include <bcm63xx_reset.h>
-#include <bcm63xx_clk.h>
-
-static DEFINE_MUTEX(clocks_mutex);
-
-
-static void clk_enable_unlocked(struct clk *clk)
-{
- if (clk->set && (clk->usage++) == 0)
- clk->set(clk, 1);
-}
-
-static void clk_disable_unlocked(struct clk *clk)
-{
- if (clk->set && (--clk->usage) == 0)
- clk->set(clk, 0);
-}
-
-static void bcm_hwclock_set(u32 mask, int enable)
-{
- u32 reg;
-
- reg = bcm_perf_readl(PERF_CKCTL_REG);
- if (enable)
- reg |= mask;
- else
- reg &= ~mask;
- bcm_perf_writel(reg, PERF_CKCTL_REG);
-}
-
-/*
- * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
- */
-static void enet_misc_set(struct clk *clk, int enable)
-{
- u32 mask;
-
- if (BCMCPU_IS_6338())
- mask = CKCTL_6338_ENET_EN;
- else if (BCMCPU_IS_6345())
- mask = CKCTL_6345_ENET_EN;
- else if (BCMCPU_IS_6348())
- mask = CKCTL_6348_ENET_EN;
- else
- /* BCMCPU_IS_6358 */
- mask = CKCTL_6358_EMUSB_EN;
- bcm_hwclock_set(mask, enable);
-}
-
-static struct clk clk_enet_misc = {
- .set = enet_misc_set,
-};
-
-/*
- * Ethernet MAC clocks: only revelant on 6358, silently enable misc
- * clocks
- */
-static void enetx_set(struct clk *clk, int enable)
-{
- if (enable)
- clk_enable_unlocked(&clk_enet_misc);
- else
- clk_disable_unlocked(&clk_enet_misc);
-
- if (BCMCPU_IS_6358()) {
- u32 mask;
-
- if (clk->id == 0)
- mask = CKCTL_6358_ENET0_EN;
- else
- mask = CKCTL_6358_ENET1_EN;
- bcm_hwclock_set(mask, enable);
- }
-}
-
-static struct clk clk_enet0 = {
- .id = 0,
- .set = enetx_set,
-};
-
-static struct clk clk_enet1 = {
- .id = 1,
- .set = enetx_set,
-};
-
-/*
- * Ethernet PHY clock
- */
-static void ephy_set(struct clk *clk, int enable)
-{
- if (!BCMCPU_IS_6358())
- return;
- bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable);
-}
-
-
-static struct clk clk_ephy = {
- .set = ephy_set,
-};
-
-/*
- * Ethernet switch clock
- */
-static void enetsw_set(struct clk *clk, int enable)
-{
- if (!BCMCPU_IS_6368())
- return;
- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
- CKCTL_6368_SWPKT_USB_EN |
- CKCTL_6368_SWPKT_SAR_EN, enable);
- if (enable) {
- /* reset switch core afer clock change */
- bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 1);
- msleep(10);
- bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 0);
- msleep(10);
- }
-}
-
-static struct clk clk_enetsw = {
- .set = enetsw_set,
-};
-
-/*
- * PCM clock
- */
-static void pcm_set(struct clk *clk, int enable)
-{
- if (!BCMCPU_IS_6358())
- return;
- bcm_hwclock_set(CKCTL_6358_PCM_EN, enable);
-}
-
-static struct clk clk_pcm = {
- .set = pcm_set,
-};
-
-/*
- * USB host clock
- */
-static void usbh_set(struct clk *clk, int enable)
-{
- if (BCMCPU_IS_6328())
- bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
- else if (BCMCPU_IS_6348())
- bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-}
-
-static struct clk clk_usbh = {
- .set = usbh_set,
-};
-
-/*
- * USB device clock
- */
-static void usbd_set(struct clk *clk, int enable)
-{
- if (BCMCPU_IS_6328())
- bcm_hwclock_set(CKCTL_6328_USBD_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-}
-
-static struct clk clk_usbd = {
- .set = usbd_set,
-};
-
-/*
- * SPI clock
- */
-static void spi_set(struct clk *clk, int enable)
-{
- u32 mask;
-
- if (BCMCPU_IS_6338())
- mask = CKCTL_6338_SPI_EN;
- else if (BCMCPU_IS_6348())
- mask = CKCTL_6348_SPI_EN;
- else if (BCMCPU_IS_6358())
- mask = CKCTL_6358_SPI_EN;
- else
- /* BCMCPU_IS_6368 */
- mask = CKCTL_6368_SPI_EN;
- bcm_hwclock_set(mask, enable);
-}
-
-static struct clk clk_spi = {
- .set = spi_set,
-};
-
-/*
- * XTM clock
- */
-static void xtm_set(struct clk *clk, int enable)
-{
- if (!BCMCPU_IS_6368())
- return;
-
- bcm_hwclock_set(CKCTL_6368_SAR_EN |
- CKCTL_6368_SWPKT_SAR_EN, enable);
-
- if (enable) {
- /* reset sar core afer clock change */
- bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 1);
- mdelay(1);
- bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 0);
- mdelay(1);
- }
-}
-
-
-static struct clk clk_xtm = {
- .set = xtm_set,
-};
-
-/*
- * IPsec clock
- */
-static void ipsec_set(struct clk *clk, int enable)
-{
- bcm_hwclock_set(CKCTL_6368_IPSEC_EN, enable);
-}
-
-static struct clk clk_ipsec = {
- .set = ipsec_set,
-};
-
-/*
- * PCIe clock
- */
-
-static void pcie_set(struct clk *clk, int enable)
-{
- bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
-}
-
-static struct clk clk_pcie = {
- .set = pcie_set,
-};
-
-/*
- * Internal peripheral clock
- */
-static struct clk clk_periph = {
- .rate = (50 * 1000 * 1000),
-};
-
-
-/*
- * Linux clock API implementation
- */
-int clk_enable(struct clk *clk)
-{
- mutex_lock(&clocks_mutex);
- clk_enable_unlocked(clk);
- mutex_unlock(&clocks_mutex);
- return 0;
-}
-
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
- mutex_lock(&clocks_mutex);
- clk_disable_unlocked(clk);
- mutex_unlock(&clocks_mutex);
-}
-
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return clk->rate;
-}
-
-EXPORT_SYMBOL(clk_get_rate);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "enet0"))
- return &clk_enet0;
- if (!strcmp(id, "enet1"))
- return &clk_enet1;
- if (!strcmp(id, "enetsw"))
- return &clk_enetsw;
- if (!strcmp(id, "ephy"))
- return &clk_ephy;
- if (!strcmp(id, "usbh"))
- return &clk_usbh;
- if (!strcmp(id, "usbd"))
- return &clk_usbd;
- if (!strcmp(id, "spi"))
- return &clk_spi;
- if (!strcmp(id, "xtm"))
- return &clk_xtm;
- if (!strcmp(id, "periph"))
- return &clk_periph;
- if (BCMCPU_IS_6358() && !strcmp(id, "pcm"))
- return &clk_pcm;
- if (BCMCPU_IS_6368() && !strcmp(id, "ipsec"))
- return &clk_ipsec;
- if (BCMCPU_IS_6328() && !strcmp(id, "pcie"))
- return &clk_pcie;
- return ERR_PTR(-ENOENT);
-}
-
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-
-EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h
deleted file mode 100644
index 8fcf8df..0000000
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef BCM63XX_CLK_H_
-#define BCM63XX_CLK_H_
-
-struct clk {
- void (*set)(struct clk *, int);
- unsigned int rate;
- unsigned int usage;
- int id;
-};
-
-#endif /* ! BCM63XX_CLK_H_ */
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 71a25b9..c991c8b 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -19,6 +19,7 @@ endif
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
+obj-$(CONFIG_BCM63XX) += clk-bcm63xx.o
# Chip specific
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
diff --git a/drivers/clk/clk-bcm63xx.c b/drivers/clk/clk-bcm63xx.c
new file mode 100644
index 0000000..571bb71
--- /dev/null
+++ b/drivers/clk/clk-bcm63xx.c
@@ -0,0 +1,241 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_reset.h>
+
+DEFINE_SPINLOCK(bcm63xx_clk_lock);
+
+struct bcm63xx_clk {
+ struct clk_hw hw;
+ u32 rate;
+ s8 gate_bit;
+ void (*reset)(void);
+};
+
+#define to_bcm63xx_clk(p) container_of(p, struct bcm63xx_clk, hw)
+
+static void bcm63xx_clk_set(u32 bit, int enable)
+{
+ unsigned long flags;
+ u32 val;
+
+ spin_lock_irqsave(&bcm63xx_clk_lock, flags);
+
+ val = bcm_perf_readl(PERF_CKCTL_REG);
+ if (enable)
+ val |= BIT(bit);
+ else
+ val &= ~BIT(bit);
+
+ bcm_perf_writel(val, PERF_CKCTL_REG);
+
+ spin_unlock_irqrestore(&bcm63xx_clk_lock, flags);
+
+}
+
+static int bcm63xx_clk_enable(struct clk_hw *hw)
+{
+ struct bcm63xx_clk *clk = to_bcm63xx_clk(hw);
+
+ if (clk->gate_bit >= 0)
+ bcm63xx_clk_set(clk->gate_bit, 1);
+
+ if (clk->reset)
+ clk->reset();
+
+ return 0;
+}
+
+static void bcm63xx_clk_disable(struct clk_hw *hw)
+{
+ struct bcm63xx_clk *clk = to_bcm63xx_clk(hw);
+
+ if (clk->gate_bit >= 0)
+ bcm63xx_clk_set(clk->gate_bit, 0);
+}
+
+static int bcm63xx_clk_is_enabled(struct clk_hw *hw)
+{
+ struct bcm63xx_clk *clk = to_bcm63xx_clk(hw);
+
+ if (clk->gate_bit >= 0)
+ return bcm_perf_readl(PERF_CKCTL_REG) & BIT(clk->gate_bit);
+
+ return 1;
+}
+
+static unsigned long bcm63xx_clk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_state)
+{
+ return to_bcm63xx_clk(hw)->rate;
+}
+
+static const struct clk_ops bcm63xx_clk_ops = {
+ .enable = bcm63xx_clk_enable,
+ .disable = bcm63xx_clk_disable,
+ .is_enabled = bcm63xx_clk_is_enabled,
+ .recalc_rate = bcm63xx_clk_recalc_rate,
+};
+
+static void bcm63xx_enetsw_reset(void)
+{
+ bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 1);
+ mdelay(100);
+ bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 0);
+ mdelay(100);
+}
+
+static void bcm6368_enetsw_reset(void)
+{
+ struct clk *enetsw_sar = clk_get(NULL, "enetsw-sar");
+ struct clk *enetsw_usb = clk_get(NULL, "enetsw-usb");
+
+ /* secondary clocks need to be enabled while resetting the core */
+ clk_prepare_enable(enetsw_sar);
+ clk_prepare_enable(enetsw_usb);
+
+ bcm63xx_enetsw_reset();
+
+ clk_disable_unprepare(enetsw_usb);
+ clk_disable_unprepare(enetsw_sar);
+
+ clk_put(enetsw_sar);
+ clk_put(enetsw_usb);
+}
+
+static void bcm63xx_sar_reset(void)
+{
+ bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 1);
+ mdelay(1);
+ bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 0);
+ mdelay(1);
+}
+
+static void __init bcm63xx_clock_init(struct device_node *node,
+ void (*reset)(void))
+{
+ u32 gate_bit_dt, rate = 0;
+ s8 gate_bit = -1;
+ struct clk *clk;
+ struct bcm63xx_clk *bcm63xx_clk;
+ const char *clk_name = node->name;
+ const char *parent = NULL;
+ int num_names, i;
+ struct clk_init_data init;
+
+ if (!of_property_read_u32(node, "brcm,gate-bit", &gate_bit_dt) &&
+ !WARN_ON(gate_bit_dt > 32))
+ gate_bit = gate_bit_dt;
+
+ of_property_read_u32(node, "clock-frequency", &rate);
+
+ num_names = of_property_count_strings(node, "clock-output-names");
+
+ if (!WARN_ON(num_names == 0))
+ of_property_read_string_index(node, "clock-output-names", 0,
+ &clk_name);
+
+ parent = of_clk_get_parent_name(node, 0);
+
+ bcm63xx_clk = kzalloc(sizeof(*bcm63xx_clk), GFP_KERNEL);
+ if (!bcm63xx_clk)
+ return;
+
+ bcm63xx_clk->rate = rate;
+ bcm63xx_clk->gate_bit = gate_bit;
+ bcm63xx_clk->reset = reset;
+
+ init.name = clk_name;
+ init.ops = &bcm63xx_clk_ops;
+
+ if (parent) {
+ init.flags = 0;
+ init.num_parents = 1;
+ init.parent_names = &parent;
+ } else {
+ init.flags = CLK_IS_ROOT;
+ init.num_parents = 0;
+ init.parent_names = NULL;
+ }
+
+ bcm63xx_clk->hw.init = &init;
+
+ clk = clk_register(NULL, &bcm63xx_clk->hw);
+ if (IS_ERR(clk)) {
+ kfree(bcm63xx_clk);
+ return;
+ }
+
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+ clk_register_clkdev(clk, clk_name, NULL);
+
+ /* register aliases */
+ for (i = 1; i < num_names; i++) {
+ of_property_read_string_index(node, "clock-output-names", i,
+ &clk_name);
+ clk_register_clkdev(clk, clk_name, NULL);
+ }
+}
+
+static void __init bcm63xx_generic_clock_init(struct device_node *node)
+{
+ bcm63xx_clock_init(node, NULL);
+}
+
+static void __init bcm63xx_enetsw_clock_init(struct device_node *node)
+{
+ bcm63xx_clock_init(node, bcm63xx_enetsw_reset);
+}
+
+static void __init bcm6368_enetsw_clock_init(struct device_node *node)
+{
+ bcm63xx_clock_init(node, bcm6368_enetsw_reset);
+}
+
+static void __init bcm63xx_sar_clock_init(struct device_node *node)
+{
+ bcm63xx_clock_init(node, bcm63xx_sar_reset);
+}
+
+static const __initconst struct of_device_id clk_match[] = {
+ {
+ .compatible = "brcm,bcm63xx-clock",
+ .data = bcm63xx_generic_clock_init,
+ },
+ {
+ .compatible = "brcm,bcm63xx-enetsw-clock",
+ .data = bcm63xx_enetsw_clock_init,
+ },
+ {
+ .compatible = "brcm,bcm6368-enetsw-clock",
+ .data = bcm63xx_enetsw_clock_init,
+ },
+ {
+ .compatible = "brcm,bcm63xx-sar-clock",
+ .data = bcm63xx_sar_clock_init,
+ },
+};
+
+int __init bcm63xx_clocks_init(void)
+{
+ of_clk_init(clk_match);
+
+ return 0;
+}
+arch_initcall(bcm63xx_clocks_init);
--
1.7.2.5
Add empty board files for all boards supported by the legacy board
support.
Signed-off-by: Jonas Gorski <[email protected]>
---
arch/mips/bcm63xx/dts/96328avng.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96338gw.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96338w.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96345gw2.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96348gw.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96348gw_10.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96348gw_11.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96348gw_a.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96348r.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96358vw.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/96358vw2.dts | 23 ++++++++++++
arch/mips/bcm63xx/dts/Kconfig | 64 +++++++++++++++++++++++++++++++++
arch/mips/bcm63xx/dts/Makefile | 18 +++++++++
arch/mips/bcm63xx/dts/agpf_s0.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/dv201amr.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/dwv_s0.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/fast2404.dts | 22 +++++++++++
arch/mips/bcm63xx/dts/rta1025w_16.dts | 22 +++++++++++
18 files changed, 435 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/bcm63xx/dts/96328avng.dts
create mode 100644 arch/mips/bcm63xx/dts/96338gw.dts
create mode 100644 arch/mips/bcm63xx/dts/96338w.dts
create mode 100644 arch/mips/bcm63xx/dts/96345gw2.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw_10.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw_11.dts
create mode 100644 arch/mips/bcm63xx/dts/96348gw_a.dts
create mode 100644 arch/mips/bcm63xx/dts/96348r.dts
create mode 100644 arch/mips/bcm63xx/dts/96358vw.dts
create mode 100644 arch/mips/bcm63xx/dts/96358vw2.dts
create mode 100644 arch/mips/bcm63xx/dts/agpf_s0.dts
create mode 100644 arch/mips/bcm63xx/dts/dv201amr.dts
create mode 100644 arch/mips/bcm63xx/dts/dwv_s0.dts
create mode 100644 arch/mips/bcm63xx/dts/fast2404.dts
create mode 100644 arch/mips/bcm63xx/dts/rta1025w_16.dts
diff --git a/arch/mips/bcm63xx/dts/96328avng.dts b/arch/mips/bcm63xx/dts/96328avng.dts
new file mode 100644
index 0000000..c1aee15
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96328avng.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom BCM96328avng reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6328.dtsi"
+
+/ {
+ model = "96328avng";
+ compatible = "96328avng";
+
+ ubus@10000000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96338gw.dts b/arch/mips/bcm63xx/dts/96338gw.dts
new file mode 100644
index 0000000..5e4f893
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96338gw.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom BCM96338GW reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6338.dtsi"
+
+/ {
+ model = "96338GW";
+ compatible = "96338GW";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96338w.dts b/arch/mips/bcm63xx/dts/96338w.dts
new file mode 100644
index 0000000..972a530
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96338w.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom BCM963338W reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6338.dtsi"
+
+/ {
+ model = "96338W";
+ compatible = "96338W";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96345gw2.dts b/arch/mips/bcm63xx/dts/96345gw2.dts
new file mode 100644
index 0000000..0114733
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96345gw2.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom BCM96345GW2 reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6345.dtsi"
+
+/ {
+ model = "96345GW2";
+ compatible = "96345GW2";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96348gw.dts b/arch/mips/bcm63xx/dts/96348gw.dts
new file mode 100644
index 0000000..8d7f7ca
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96348gw.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom 96348GW reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "96348GW";
+ compatible = "96348GW";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96348gw_10.dts b/arch/mips/bcm63xx/dts/96348gw_10.dts
new file mode 100644
index 0000000..3b27b5b
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96348gw_10.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom 96348GW-10 reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "96348GW-10";
+ compatible = "96348GW-10";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96348gw_11.dts b/arch/mips/bcm63xx/dts/96348gw_11.dts
new file mode 100644
index 0000000..07837ac
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96348gw_11.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom 96348GW-11 reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "96348GW-11";
+ compatible = "96348GW-11";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96348gw_a.dts b/arch/mips/bcm63xx/dts/96348gw_a.dts
new file mode 100644
index 0000000..9b0e5bd
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96348gw_a.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom 96348GW-A reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "96348GW-A";
+ compatible = "96348GW-A";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96348r.dts b/arch/mips/bcm63xx/dts/96348r.dts
new file mode 100644
index 0000000..309f898
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96348r.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom 96348GWR reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "96348R";
+ compatible = "96348R";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96358vw.dts b/arch/mips/bcm63xx/dts/96358vw.dts
new file mode 100644
index 0000000..55c3e92
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96358vw.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom 96358VW reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6358.dtsi"
+
+/ {
+ model = "96358VW";
+ compatible = "96358VW";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/96358vw2.dts b/arch/mips/bcm63xx/dts/96358vw2.dts
new file mode 100644
index 0000000..88f12ba
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/96358vw2.dts
@@ -0,0 +1,23 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Broadcom 96358GWVW2 reference board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+
+/include/ "bcm6358.dtsi"
+
+/ {
+ model = "96358VW2";
+ compatible = "96358VW2";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/Kconfig b/arch/mips/bcm63xx/dts/Kconfig
index 919f3f6..1c35054 100644
--- a/arch/mips/bcm63xx/dts/Kconfig
+++ b/arch/mips/bcm63xx/dts/Kconfig
@@ -1,3 +1,67 @@
menu "Built-in Device Tree support"
+config BOARD_96328AVNG
+ bool "96328avng reference board"
+ select BCM63XX_CPU_6328
+
+config BOARD_96338GW
+ bool "96338GW reference board"
+ select BCM63XX_CPU_6338
+
+config BOARD_96338W
+ bool "96338W reference board"
+ select BCM63XX_CPU_6338
+
+config BOARD_96345GW2
+ bool "96345GW2 reference board"
+ select BCM63XX_CPU_6345
+
+config BOARD_96348R
+ bool "96348R reference board"
+ select BCM63XX_CPU_6348
+
+config BOARD_96348GW
+ bool "96348GW reference board"
+ select BCM63XX_CPU_6348
+
+config BOARD_96348GW_10
+ bool "96348GW-10 reference board"
+ select BCM63XX_CPU_6348
+
+config BOARD_96348GW_11
+ bool "96348GW-11 reference board"
+ select BCM63XX_CPU_6348
+
+config BOARD_96348GW_A
+ bool "96348GW-A reference board"
+ select BCM63XX_CPU_6348
+
+config BOARD_96358VW
+ bool "96358VW2 reference board"
+ select BCM63XX_CPU_6358
+
+config BOARD_96358VW2
+ bool "96358VW2 reference board"
+ select BCM63XX_CPU_6358
+
+config BOARD_AGPF_S0
+ bool "AGPF-S0 (Pirelli Alice Gate VoIP 2 Plus Wi-Fi Business)"
+ select BCM63XX_CPU_6358
+
+config BOARD_DV201AMR
+ bool "DV201AMR (Davolink DV-201AMR)"
+ select BCM63XX_CPU_6348
+
+config BOARD_DWV_S0
+ bool "DWV-S0 (Pirelli A226G)"
+ select BCM63XX_CPU_6358
+
+config BOARD_FAST2404
+ bool "F@ST2404 (Sagem F@ST2404)"
+ select BCM63XX_CPU_6348
+
+config BOARD_RTA2015W_16
+ bool "RTA2015W_16 (Dynalink RTA2015W)"
+ select BCM63XX_CPU_6348
+
endmenu
diff --git a/arch/mips/bcm63xx/dts/Makefile b/arch/mips/bcm63xx/dts/Makefile
index 94d1057..e4f6439 100644
--- a/arch/mips/bcm63xx/dts/Makefile
+++ b/arch/mips/bcm63xx/dts/Makefile
@@ -6,5 +6,23 @@ obj-$(CONFIG_BCM63XX_CPU_6348) += bcm96348_generic.dtb.o
obj-$(CONFIG_BCM63XX_CPU_6358) += bcm96358_generic.dtb.o
obj-$(CONFIG_BCM63XX_CPU_6368) += bcm96368_generic.dtb.o
+# board support
+obj-$(CONFIG_BOARD_96328AVNG) += 96328avng.dtb.o
+obj-$(CONFIG_BOARD_96338GW) += 96338gw.dtb.o
+obj-$(CONFIG_BOARD_96338G) += 96338g.dtb.o
+obj-$(CONFIG_BOARD_96345GW2) += 96345gw2.dtb.o
+obj-$(CONFIG_BOARD_96348GW) += 96348gw.dtb.o
+obj-$(CONFIG_BOARD_96348GW_10) += 96348gw_10.dtb.o
+obj-$(CONFIG_BOARD_96348GW_11) += 96348gw_11.dtb.o
+obj-$(CONFIG_BOARD_96348GW_A) += 96348gw_a.dtb.o
+obj-$(CONFIG_BOARD_96348R) += 96348r.dtb.o
+obj-$(CONFIG_BOARD_96358VW) += 96358vw.dtb.o
+obj-$(CONFIG_BOARD_96358VW2) += 96358vw2.dtb.o
+obj-$(CONFIG_BOARD_AGPF_S0) += agpf_s0.dtb.o
+obj-$(CONFIG_BOARD_DV201AMR) += dv201amr.dtb.o
+obj-$(CONFIG_BOARD_DWV_S0) += dwv_s0.dtb.o
+obj-$(CONFIG_BOARD_FAST2404) += fast2404.dtb.o
+obj-$(CONFIG_BOARD_RTA1025W_16) += rta1025w_16.dtb.o
+
$(obj)/%.dtb: $(obj)/%.dts
$(call if_changed,dtc)
diff --git a/arch/mips/bcm63xx/dts/agpf_s0.dts b/arch/mips/bcm63xx/dts/agpf_s0.dts
new file mode 100644
index 0000000..bb0defd0
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/agpf_s0.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Pirelli Alice Gate VoIP 2 Plus Wi-Fi Business board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6358.dtsi"
+
+/ {
+ model = "AGPF-S0";
+ compatible = "AGPF-S0";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/dv201amr.dts b/arch/mips/bcm63xx/dts/dv201amr.dts
new file mode 100644
index 0000000..7cdb41f
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/dv201amr.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Davolink DV-201AMR
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "DV201AMR";
+ compatible = "DV201AMR";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/dwv_s0.dts b/arch/mips/bcm63xx/dts/dwv_s0.dts
new file mode 100644
index 0000000..96e79cd
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/dwv_s0.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Pirelli A226G
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6358.dtsi"
+
+/ {
+ model = "DWV-S0";
+ compatible = "DWV-S0";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/fast2404.dts b/arch/mips/bcm63xx/dts/fast2404.dts
new file mode 100644
index 0000000..55d31ce
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/fast2404.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Sagem F@ST2404 board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "F@ST2404";
+ compatible = "F@ST2404";
+
+ ubus@fffe0000 {
+
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/rta1025w_16.dts b/arch/mips/bcm63xx/dts/rta1025w_16.dts
new file mode 100644
index 0000000..825fe4e
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/rta1025w_16.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/*
+ * Device Tree Source for Dynalink RTA2015W board
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "bcm6348.dtsi"
+
+/ {
+ model = "RTA1025W_16";
+ compatible = "RTA1025W_16";
+
+ ubus@fffe0000 {
+
+ };
+};
--
1.7.2.5
Add support for probing the serial ports through Device Tree.
Signed-off-by: Jonas Gorski <[email protected]>
---
.../bindings/tty/serial/bcm63xx-uart.txt | 17 +++++++++
drivers/tty/serial/bcm63xx_uart.c | 35 ++++++++++++++------
2 files changed, 42 insertions(+), 10 deletions(-)
create mode 100644 Documentation/devicetree/bindings/tty/serial/bcm63xx-uart.txt
diff --git a/Documentation/devicetree/bindings/tty/serial/bcm63xx-uart.txt b/Documentation/devicetree/bindings/tty/serial/bcm63xx-uart.txt
new file mode 100644
index 0000000..7623604
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/bcm63xx-uart.txt
@@ -0,0 +1,17 @@
+* Broadcom BCM63XX UART
+
+Required properties:
+- compatible: "brcm,bcm63xx-uart"
+ Compatible with all BCM63XX SoCs.
+
+- reg: address and length of the register block.
+
+- interrupts: the uart's interrupt number.
+
+Example:
+
+ uart0: serial@100 {
+ compatible = "brcm,bcm63xx";
+ reg = <0x100 0x18>;
+ interrupts = <2>;
+ };
diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
index 0187aff..4521a52 100644
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -802,23 +802,32 @@ static struct uart_driver bcm_uart_driver = {
*/
static int __devinit bcm_uart_probe(struct platform_device *pdev)
{
- struct resource *res_mem, *res_irq;
+ struct resource *res_mem;
struct uart_port *port;
struct clk *clk;
- int ret;
+ int ret, irq;
- if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
- return -EINVAL;
+ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res_mem)
+ return -ENODEV;
+
+ if (pdev->id < 0) {
+ void __iomem *membase;
+
+ membase = ioremap(res_mem->start, resource_size(res_mem));
+ if (membase == (void *)bcm63xx_regset_address(RSET_UART0))
+ pdev->id = 0;
+ else
+ pdev->id = 1;
+ iounmap(membase);
+ }
if (ports[pdev->id].membase)
return -EBUSY;
- res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res_mem)
- return -ENODEV;
- res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- if (!res_irq)
+ irq = platform_get_irq(pdev, 0);
+ if (!irq)
return -ENODEV;
clk = clk_get(&pdev->dev, "periph");
@@ -829,7 +838,7 @@ static int __devinit bcm_uart_probe(struct platform_device *pdev)
memset(port, 0, sizeof(*port));
port->iotype = UPIO_MEM;
port->mapbase = res_mem->start;
- port->irq = res_irq->start;
+ port->irq = irq;
port->ops = &bcm_uart_ops;
port->flags = UPF_BOOT_AUTOCONF;
port->dev = &pdev->dev;
@@ -862,12 +871,18 @@ static int __devexit bcm_uart_remove(struct platform_device *pdev)
/*
* platform driver stuff
*/
+static const struct of_device_id bcm_uart_match[] = {
+ { .compatible = "brcm,bcm63xx-uart" },
+ { },
+};
+
static struct platform_driver bcm_uart_platform_driver = {
.probe = bcm_uart_probe,
.remove = __devexit_p(bcm_uart_remove),
.driver = {
.owner = THIS_MODULE,
.name = "bcm63xx_uart",
+ .of_match_table = bcm_uart_match,
},
};
--
1.7.2.5
Enable serial through Device Tree board files instead of legacy
board files.
Signed-off-by: Jonas Gorski <[email protected]>
---
arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 ---------------
arch/mips/bcm63xx/dts/96328avng.dts | 3 +++
arch/mips/bcm63xx/dts/96338gw.dts | 3 +++
arch/mips/bcm63xx/dts/96338w.dts | 3 +++
arch/mips/bcm63xx/dts/96345gw2.dts | 3 +++
arch/mips/bcm63xx/dts/96348gw.dts | 3 +++
arch/mips/bcm63xx/dts/96348gw_10.dts | 3 +++
arch/mips/bcm63xx/dts/96348gw_11.dts | 3 +++
arch/mips/bcm63xx/dts/96348gw_a.dts | 3 +++
arch/mips/bcm63xx/dts/96348r.dts | 3 +++
arch/mips/bcm63xx/dts/96358vw.dts | 3 +++
arch/mips/bcm63xx/dts/96358vw2.dts | 3 +++
arch/mips/bcm63xx/dts/dv201amr.dts | 3 +++
arch/mips/bcm63xx/dts/dwv_s0.dts | 3 +++
arch/mips/bcm63xx/dts/fast2404.dts | 3 +++
arch/mips/bcm63xx/dts/rta1025w_16.dts | 3 +++
16 files changed, 45 insertions(+), 15 deletions(-)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 73be9b3..c64cf7c 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -40,7 +40,6 @@ static struct board_info __initdata board_96328avng = {
.name = "96328avng",
.expected_cpu_id = 0x6328,
- .has_uart0 = 1,
.has_pci = 1,
.has_usbd = 0,
@@ -88,7 +87,6 @@ static struct board_info __initdata board_96338gw = {
.name = "96338GW",
.expected_cpu_id = 0x6338,
- .has_uart0 = 1,
.has_enet0 = 1,
.enet0 = {
.force_speed_100 = 1,
@@ -131,7 +129,6 @@ static struct board_info __initdata board_96338w = {
.name = "96338W",
.expected_cpu_id = 0x6338,
- .has_uart0 = 1,
.has_enet0 = 1,
.enet0 = {
.force_speed_100 = 1,
@@ -176,8 +173,6 @@ static struct board_info __initdata board_96338w = {
static struct board_info __initdata board_96345gw2 = {
.name = "96345GW2",
.expected_cpu_id = 0x6345,
-
- .has_uart0 = 1,
};
#endif
@@ -189,7 +184,6 @@ static struct board_info __initdata board_96348r = {
.name = "96348R",
.expected_cpu_id = 0x6348,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_pci = 1,
@@ -233,7 +227,6 @@ static struct board_info __initdata board_96348gw_10 = {
.name = "96348GW-10",
.expected_cpu_id = 0x6348,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -293,7 +286,6 @@ static struct board_info __initdata board_96348gw_11 = {
.name = "96348GW-11",
.expected_cpu_id = 0x6348,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -347,7 +339,6 @@ static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -405,7 +396,6 @@ static struct board_info __initdata board_FAST2404 = {
.name = "F@ST2404",
.expected_cpu_id = 0x6348,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -448,7 +438,6 @@ static struct board_info __initdata board_DV201AMR = {
.name = "DV201AMR",
.expected_cpu_id = 0x6348,
- .has_uart0 = 1,
.has_pci = 1,
.has_ohci0 = 1,
@@ -468,7 +457,6 @@ static struct board_info __initdata board_96348gw_a = {
.name = "96348GW-A",
.expected_cpu_id = 0x6348,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -494,7 +482,6 @@ static struct board_info __initdata board_96358vw = {
.name = "96358VW",
.expected_cpu_id = 0x6358,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -546,7 +533,6 @@ static struct board_info __initdata board_96358vw2 = {
.name = "96358VW2",
.expected_cpu_id = 0x6358,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -594,7 +580,6 @@ static struct board_info __initdata board_AGPFS0 = {
.name = "AGPF-S0",
.expected_cpu_id = 0x6358,
- .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
diff --git a/arch/mips/bcm63xx/dts/96328avng.dts b/arch/mips/bcm63xx/dts/96328avng.dts
index c1aee15..811fc29 100644
--- a/arch/mips/bcm63xx/dts/96328avng.dts
+++ b/arch/mips/bcm63xx/dts/96328avng.dts
@@ -18,5 +18,8 @@
ubus@10000000 {
+ serial@100 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96338gw.dts b/arch/mips/bcm63xx/dts/96338gw.dts
index 5e4f893..003c4c8 100644
--- a/arch/mips/bcm63xx/dts/96338gw.dts
+++ b/arch/mips/bcm63xx/dts/96338gw.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96338w.dts b/arch/mips/bcm63xx/dts/96338w.dts
index 972a530..bb5be303 100644
--- a/arch/mips/bcm63xx/dts/96338w.dts
+++ b/arch/mips/bcm63xx/dts/96338w.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96345gw2.dts b/arch/mips/bcm63xx/dts/96345gw2.dts
index 0114733..f5942ea 100644
--- a/arch/mips/bcm63xx/dts/96345gw2.dts
+++ b/arch/mips/bcm63xx/dts/96345gw2.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96348gw.dts b/arch/mips/bcm63xx/dts/96348gw.dts
index 8d7f7ca..a956046 100644
--- a/arch/mips/bcm63xx/dts/96348gw.dts
+++ b/arch/mips/bcm63xx/dts/96348gw.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96348gw_10.dts b/arch/mips/bcm63xx/dts/96348gw_10.dts
index 3b27b5b..f8d6925 100644
--- a/arch/mips/bcm63xx/dts/96348gw_10.dts
+++ b/arch/mips/bcm63xx/dts/96348gw_10.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96348gw_11.dts b/arch/mips/bcm63xx/dts/96348gw_11.dts
index 07837ac..fbaf956 100644
--- a/arch/mips/bcm63xx/dts/96348gw_11.dts
+++ b/arch/mips/bcm63xx/dts/96348gw_11.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96348gw_a.dts b/arch/mips/bcm63xx/dts/96348gw_a.dts
index 9b0e5bd..d1e1fcd 100644
--- a/arch/mips/bcm63xx/dts/96348gw_a.dts
+++ b/arch/mips/bcm63xx/dts/96348gw_a.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96348r.dts b/arch/mips/bcm63xx/dts/96348r.dts
index 309f898..65081f3 100644
--- a/arch/mips/bcm63xx/dts/96348r.dts
+++ b/arch/mips/bcm63xx/dts/96348r.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96358vw.dts b/arch/mips/bcm63xx/dts/96358vw.dts
index 55c3e92..6e6c8a2 100644
--- a/arch/mips/bcm63xx/dts/96358vw.dts
+++ b/arch/mips/bcm63xx/dts/96358vw.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@100 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/96358vw2.dts b/arch/mips/bcm63xx/dts/96358vw2.dts
index 88f12ba..065944d 100644
--- a/arch/mips/bcm63xx/dts/96358vw2.dts
+++ b/arch/mips/bcm63xx/dts/96358vw2.dts
@@ -19,5 +19,8 @@
ubus@fffe0000 {
+ serial@100 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/dv201amr.dts b/arch/mips/bcm63xx/dts/dv201amr.dts
index 7cdb41f..7f23015 100644
--- a/arch/mips/bcm63xx/dts/dv201amr.dts
+++ b/arch/mips/bcm63xx/dts/dv201amr.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/dwv_s0.dts b/arch/mips/bcm63xx/dts/dwv_s0.dts
index 96e79cd..9f837d7 100644
--- a/arch/mips/bcm63xx/dts/dwv_s0.dts
+++ b/arch/mips/bcm63xx/dts/dwv_s0.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@100 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/fast2404.dts b/arch/mips/bcm63xx/dts/fast2404.dts
index 55d31ce..9158aaa 100644
--- a/arch/mips/bcm63xx/dts/fast2404.dts
+++ b/arch/mips/bcm63xx/dts/fast2404.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/rta1025w_16.dts b/arch/mips/bcm63xx/dts/rta1025w_16.dts
index 825fe4e..726de6d 100644
--- a/arch/mips/bcm63xx/dts/rta1025w_16.dts
+++ b/arch/mips/bcm63xx/dts/rta1025w_16.dts
@@ -18,5 +18,8 @@
ubus@fffe0000 {
+ serial@300 {
+ status = "ok";
+ };
};
};
--
1.7.2.5
Add the serial block to the Device Tree includes for all SoCs.
Signed-off-by: Jonas Gorski <[email protected]>
---
arch/mips/bcm63xx/dts/bcm6328.dtsi | 14 ++++++++++++++
arch/mips/bcm63xx/dts/bcm6338.dtsi | 7 +++++++
arch/mips/bcm63xx/dts/bcm6345.dtsi | 8 ++++++++
arch/mips/bcm63xx/dts/bcm6348.dtsi | 7 +++++++
arch/mips/bcm63xx/dts/bcm6358.dtsi | 14 ++++++++++++++
arch/mips/bcm63xx/dts/bcm6368.dtsi | 14 ++++++++++++++
6 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
index e2e92c3..d29d43c 100644
--- a/arch/mips/bcm63xx/dts/bcm6328.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6328.dtsi
@@ -140,5 +140,19 @@
#gpio-cells = <2>;
ngpio = <32>;
};
+
+ uart0: serial@100 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x100 0x18>;
+ interrupts = <28>;
+ status = "disabled";
+ };
+
+ uart1: serial@120 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x120 0x18>;
+ interrupts = <39>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6338.dtsi b/arch/mips/bcm63xx/dts/bcm6338.dtsi
index 28e7cb6..c7b45c1 100644
--- a/arch/mips/bcm63xx/dts/bcm6338.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6338.dtsi
@@ -90,6 +90,13 @@
};
};
+ uart0: serial@300 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x300 0x18>;
+ interrupts = <2>;
+ status = "disabled";
+ };
+
gpio0: gpio@400 {
compatible = "brcm,bcm63xx-gpio";
reg = <0x400 0x80>;
diff --git a/arch/mips/bcm63xx/dts/bcm6345.dtsi b/arch/mips/bcm63xx/dts/bcm6345.dtsi
index 1ebc024..055f66c 100644
--- a/arch/mips/bcm63xx/dts/bcm6345.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6345.dtsi
@@ -75,6 +75,14 @@
};
};
};
+
+ uart0: serial@300 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x300 0x18>;
+ interrupts = <2>;
+ status = "disabled";
+ };
+
gpio0: gpio@400 {
compatible = "brcm,bcm63xx-gpio";
reg = <0x400 0x80>;
diff --git a/arch/mips/bcm63xx/dts/bcm6348.dtsi b/arch/mips/bcm63xx/dts/bcm6348.dtsi
index 89acec7..5d1d10a 100644
--- a/arch/mips/bcm63xx/dts/bcm6348.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6348.dtsi
@@ -97,6 +97,13 @@
};
};
+ uart0: serial@300 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x300 0x18>;
+ interrupts = <2>;
+ status = "disabled";
+ };
+
gpio0: gpio@400 {
compatible = "brcm,bcm63xx-gpio";
regs = <0x400 0x80>;
diff --git a/arch/mips/bcm63xx/dts/bcm6358.dtsi b/arch/mips/bcm63xx/dts/bcm6358.dtsi
index 52170d6..702882d 100644
--- a/arch/mips/bcm63xx/dts/bcm6358.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6358.dtsi
@@ -138,5 +138,19 @@
#gpio-cells = <2>;
ngpio = <40>;
};
+
+ uart0: serial@100 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x100 0x18>;
+ interrupts = <2>;
+ status = "disabled";
+ };
+
+ uart1: serial@120 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x120 0x18>;
+ interrupts = <3>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6368.dtsi b/arch/mips/bcm63xx/dts/bcm6368.dtsi
index 068231b..82cd030 100644
--- a/arch/mips/bcm63xx/dts/bcm6368.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6368.dtsi
@@ -178,5 +178,19 @@
#gpio-cells = <2>;
ngpio = <38>;
};
+
+ uart0: serial@100 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x100 0x18>;
+ interrupts = <2>;
+ status = "disabled";
+ };
+
+ uart1: serial@120 {
+ compatible = "brcm,bcm63xx-uart";
+ reg = <0x120 0x18>;
+ interrupts = <3>;
+ status = "disabled";
+ };
};
};
--
1.7.2.5
Add definitions for the clocks found and used in all supported SoCs.
Signed-off-by: Jonas Gorski <[email protected]>
---
arch/mips/bcm63xx/dts/bcm6328.dtsi | 90 ++++++++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm6338.dtsi | 47 +++++++++++++
arch/mips/bcm63xx/dts/bcm6345.dtsi | 33 ++++++++++
arch/mips/bcm63xx/dts/bcm6348.dtsi | 54 +++++++++++++++
arch/mips/bcm63xx/dts/bcm6358.dtsi | 85 ++++++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm6368.dtsi | 125 ++++++++++++++++++++++++++++++++++++
6 files changed, 434 insertions(+), 0 deletions(-)
diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
index a41033a..9055187 100644
--- a/arch/mips/bcm63xx/dts/bcm6328.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6328.dtsi
@@ -41,6 +41,96 @@
interrupt-controller;
#interrupt-cells = <1>;
};
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ periph: pll {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ phymips: clock@0 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "phymips";
+ brcm,gate-bit = <0>;
+ };
+
+ adsl_qproc: clock@1 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "adsl-qproc";
+ brcm,gate-bit = <1>;
+ };
+
+ adsl_afe: clock@2 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "adsl-afe";
+ brcm,gate-bit = <2>;
+ };
+
+ adsl: clock@3 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "adsl";
+ brcm,gate-bit = <3>;
+ };
+
+ sar: clock@5 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "sar", "xtm";
+ brcm,gate-bit = <5>;
+ };
+
+ pcm: clock@6 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "pcm";
+ brcm,gate-bit = <6>;
+ };
+
+ usbd: clock@7 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbd";
+ brcm,gate-bit = <7>;
+ };
+
+ usbh: clock@8 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbh";
+ brcm,gate-bit = <8>;
+ };
+
+ hsspi: clock@9 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "hsspi";
+ clock-frequency = <133333333>;
+ brcm,gate-bit = <9>;
+ };
+
+ pcie: clock@10 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "pcie";
+ brcm,gate-bit = <10>;
+ };
+
+ enetsw: clock@11 {
+ compatible = "brcm,bcm63xx-enetsw-clock";
+ #clock-cells = <0>;
+ clock-output-names = "enetsw";
+ brcm,gate-bit = <11>;
+ };
+ };
};
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6338.dtsi b/arch/mips/bcm63xx/dts/bcm6338.dtsi
index 8ecbc4f..6346a7e 100644
--- a/arch/mips/bcm63xx/dts/bcm6338.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6338.dtsi
@@ -41,6 +41,53 @@
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ periph: pll {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ adsl: clock@0 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "adsl";
+ brcm,gate-bit = <0>;
+ };
+
+ mpi: clock@1 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "mpi";
+ brcm,gate-bit = <1>;
+ };
+
+ enet_usbd: clock@5 {
+ #clock-cells = <0>;
+ compatible = "brcm,bcm63xx-clock";
+ clock-output-names = "enet", "enet0", "usbd";
+ brcm,gate-bit = <5>;
+ };
+
+ sar: clock@6 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "sar", "atm";
+ brcm,gate-bit = <6>;
+ };
+
+ spi: clock@7 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "spi";
+ brcm,gate-bit = <9>;
+ };
+ };
};
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6345.dtsi b/arch/mips/bcm63xx/dts/bcm6345.dtsi
index ed17c12..1771775 100644
--- a/arch/mips/bcm63xx/dts/bcm6345.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6345.dtsi
@@ -41,6 +41,39 @@
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ periph: pll {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ adsl: clock@4 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "adsl";
+ brcm,gate-bit = <4>;
+ };
+
+ enet: clock@5 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "enet", "enet0";
+ brcm,gate-bit = <5>;
+ };
+
+ usbd: clock@6 {
+ #clock-cells = <0>;
+ compatible = "brcm,bcm63xx-clock";
+ clock-output-names = "usbd";
+ brcm,gate-bit = <6>;
+ };
+ };
};
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6348.dtsi b/arch/mips/bcm63xx/dts/bcm6348.dtsi
index d54cf20..14f1996 100644
--- a/arch/mips/bcm63xx/dts/bcm6348.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6348.dtsi
@@ -41,6 +41,60 @@
interrupt-controller;
#interrupt-cells = <2>;
};
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ periph: pll {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ adsl: clock@0 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "adsl";
+ brcm,gate-bit = <0>;
+ };
+
+ enet: clock@4 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "enet", "enet0", "enet1";
+ brcm,gate-bit = <4>;
+ };
+
+ sar: clock@5 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "sar", "atm";
+ brcm,gate-bit = <5>;
+ };
+
+ usbd: clock@6 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbd";
+ brcm,gate-bit = <6>;
+ };
+
+ usbh: clock@7 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbh";
+ brcm,gate-bit = <7>;
+ };
+
+ spi: clock@8 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "spi";
+ brcm,gate-bit = <8>;
+ };
+ };
};
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6358.dtsi b/arch/mips/bcm63xx/dts/bcm6358.dtsi
index 6ef283f..943b480 100644
--- a/arch/mips/bcm63xx/dts/bcm6358.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6358.dtsi
@@ -44,6 +44,91 @@
interrupt-controller;
#interrupt-cells = <1>;
};
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ periph: pll {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ adslphy: clock@5 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "adslphy";
+ brcm,gate-bit = <5>;
+ };
+
+ pcm: clock@8 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "pcm";
+ brcm,gate-bit = <8>;
+ };
+
+ spi: clock@9 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "spi";
+ brcm,gate-bit = <9>;
+ };
+
+ usbd: clock@10 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbd";
+ brcm,gate-bit = <10>;
+ };
+
+ sar: clock@11 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "sar", "atm";
+ brcm,gate-bit = <11>;
+ };
+
+
+ enet_misc: clock@17 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "enet-misc";
+ brcm,gate-bit = <17>;
+ };
+
+ enet0: clock@18 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <1>;
+ clocks = <&enet_misc>;
+ clock-output-names = "enet0";
+ brcm,gate-bit = <18>;
+ };
+
+ enet1: clock@19 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <1>;
+ clocks = <&enet_misc>;
+ clock-output-names = "enet1";
+ brcm,gate-bit = <19>;
+ };
+
+ usbsu: clock@20 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbsu";
+ brcm,gate-bit = <20>;
+ };
+
+ ephy: clock@21 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "ephy";
+ brcm,gate-bit = <21>;
+ };
+ };
};
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6368.dtsi b/arch/mips/bcm63xx/dts/bcm6368.dtsi
index ae1b584..2156be0 100644
--- a/arch/mips/bcm63xx/dts/bcm6368.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6368.dtsi
@@ -44,6 +44,131 @@
interrupt-controller;
#interrupt-cells = <1>;
};
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ periph: pll {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+
+ vdsl_qproc: clock@2 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "vdsl-qproc";
+ brcm,gate-bit = <2>;
+ };
+
+ vdsl_afe: clock@3 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "vdsl-afe";
+ brcm,gate-bit = <3>;
+ };
+
+ vdsl_bonding: clock@4 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "vdsl-bonding";
+ brcm,gate-bit = <4>;
+ };
+
+ vdsl: clock@5 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "vdsl";
+ brcm,gate-bit = <5>;
+ };
+
+ phymips: clock@6 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "phymips";
+ brcm,gate-bit = <6>;
+ };
+
+ enetsw_usb: clock@7 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "enetsw-usb";
+ brcm,gate-bit = <7>;
+ };
+
+ enetsw_sar: clock@8 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "enetsw-sar";
+ brcm,gate-bit = <8>;
+ };
+
+ spi: clock@9 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "spi";
+ brcm,gate-bit = <9>;
+ };
+
+ usbd: clock@10 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbd";
+ brcm,gate-bit = <10>;
+ };
+
+ sar: clock@11 {
+ compatible = "brcm,bcm63xx-sar-clock";
+ #clock-cells = <1>;
+ clocks = <&enetsw_sar>;
+ clock-output-names = "sar";
+ brcm,gate-bit = <11>;
+ };
+
+ enetsw: clock@12 {
+ compatible = "brcm,bcm6368-enetsw-clock";
+ #clock-cells = <0>;
+ clock-output-names = "enetsw";
+ brcm,gate-bit = <12>;
+ };
+
+ utopia: clock@13 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "utopia";
+ brcm,gate-bit = <13>;
+ };
+
+ pcm: clock@14 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "pcm";
+ brcm,gate-bit = <14>;
+ };
+
+ usbh: clock@15 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "usbh";
+ brcm,gate-bit = <15>;
+ };
+
+ nand: clock@17 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "nand";
+ brcm,gate-bit = <17>;
+ };
+
+ ipsec: clock@18 {
+ compatible = "brcm,bcm63xx-clock";
+ #clock-cells = <0>;
+ clock-output-names = "ipsec";
+ brcm,gate-bit = <18>;
+ };
+ };
};
};
};
--
1.7.2.5
Register the GPIO controller through Device Tree and add the
appropriate values in the include files.
Since we can't register a platform driver at this early stage move the
direct call to bcm63xx_gpio_init from prom_init to an arch initcall.
Signed-off-by: Jonas Gorski <[email protected]>
---
.../devicetree/bindings/gpio/bcm63xx-gpio.txt | 24 +++++++++++++
arch/mips/bcm63xx/dts/bcm6328.dtsi | 8 ++++
arch/mips/bcm63xx/dts/bcm6338.dtsi | 8 ++++
arch/mips/bcm63xx/dts/bcm6345.dtsi | 7 ++++
arch/mips/bcm63xx/dts/bcm6348.dtsi | 8 ++++
arch/mips/bcm63xx/dts/bcm6358.dtsi | 8 ++++
arch/mips/bcm63xx/dts/bcm6368.dtsi | 8 ++++
arch/mips/bcm63xx/gpio.c | 35 +++++++++++++++++--
arch/mips/bcm63xx/prom.c | 3 --
9 files changed, 102 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt
diff --git a/Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt b/Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt
new file mode 100644
index 0000000..283765d
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt
@@ -0,0 +1,24 @@
+* Broadcom BCM63XX GPIO controller
+
+Required properties:
+- compatible: "brcm,bcm63xx-gpio"
+ Compatible with all BCM63XX SoCs.
+
+- reg: address and length of the register block.
+
+- gpio-controller: This is a GPIO controller.
+
+- #gpio-cells: Must be <2>. The first cell is the GPIO pin, and
+ the second one the standard linux flags.
+
+- ngpio: number of GPIOs present in this SoC.
+
+Example:
+
+ gpio: gpio@80 {
+ compatible = "brcm,bcm63xx-gpio";
+ reg = <0x80 0x80>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <40>;
+ };
diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
index 9055187..e2e92c3 100644
--- a/arch/mips/bcm63xx/dts/bcm6328.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6328.dtsi
@@ -132,5 +132,13 @@
};
};
};
+
+ gpio0: gpio@80 {
+ compatible = "brcm,bcm63xx-gpio";
+ reg = <0x80 0x80>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <32>;
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6338.dtsi b/arch/mips/bcm63xx/dts/bcm6338.dtsi
index 6346a7e..28e7cb6 100644
--- a/arch/mips/bcm63xx/dts/bcm6338.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6338.dtsi
@@ -89,5 +89,13 @@
};
};
};
+
+ gpio0: gpio@400 {
+ compatible = "brcm,bcm63xx-gpio";
+ reg = <0x400 0x80>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <8>;
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6345.dtsi b/arch/mips/bcm63xx/dts/bcm6345.dtsi
index 1771775..1ebc024 100644
--- a/arch/mips/bcm63xx/dts/bcm6345.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6345.dtsi
@@ -75,5 +75,12 @@
};
};
};
+ gpio0: gpio@400 {
+ compatible = "brcm,bcm63xx-gpio";
+ reg = <0x400 0x80>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <16>;
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6348.dtsi b/arch/mips/bcm63xx/dts/bcm6348.dtsi
index 14f1996..89acec7 100644
--- a/arch/mips/bcm63xx/dts/bcm6348.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6348.dtsi
@@ -96,5 +96,13 @@
};
};
};
+
+ gpio0: gpio@400 {
+ compatible = "brcm,bcm63xx-gpio";
+ regs = <0x400 0x80>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <37>;
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6358.dtsi b/arch/mips/bcm63xx/dts/bcm6358.dtsi
index 943b480..52170d6 100644
--- a/arch/mips/bcm63xx/dts/bcm6358.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6358.dtsi
@@ -130,5 +130,13 @@
};
};
};
+
+ gpio0: gpio@80 {
+ compatible = "brcm,bcm63xx-gpio";
+ reg = <0x80 0x80>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <40>;
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6368.dtsi b/arch/mips/bcm63xx/dts/bcm6368.dtsi
index 2156be0..068231b 100644
--- a/arch/mips/bcm63xx/dts/bcm6368.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6368.dtsi
@@ -170,5 +170,13 @@
};
};
};
+
+ gpio0: gpio@80 {
+ compatible = "brcm,bcm63xx-gpio";
+ regs = <0x80 0x80>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <38>;
+ };
};
};
diff --git a/arch/mips/bcm63xx/gpio.c b/arch/mips/bcm63xx/gpio.c
index a6c2135..774fd08 100644
--- a/arch/mips/bcm63xx/gpio.c
+++ b/arch/mips/bcm63xx/gpio.c
@@ -141,7 +141,6 @@ static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
}
-
static struct gpio_chip bcm63xx_gpio_chip = {
.label = "bcm63xx-gpio",
.direction_input = bcm63xx_gpio_direction_input,
@@ -151,6 +150,34 @@ static struct gpio_chip bcm63xx_gpio_chip = {
.base = 0,
};
+int __init bcm63xx_gpio_probe(struct platform_device *pdev)
+{
+ u32 val;
+
+ if (of_property_read_u32(pdev->dev.of_node, "ngpio", &val))
+ return -EINVAL;
+
+ bcm63xx_gpio_chip.ngpio = val;
+ bcm63xx_gpio_chip.dev = &pdev->dev;
+ pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
+
+ return gpiochip_add(&bcm63xx_gpio_chip);
+}
+
+static struct of_device_id of_bcm63xx_gpio_match[] = {
+ { .compatible = "brcm,bcm63xx-gpio" },
+ { },
+};
+
+static struct platform_driver bcm63xx_gpio_driver = {
+ .driver = {
+ .name = "bcm63xx-gpio",
+ .owner = THIS_MODULE,
+ .of_match_table = of_bcm63xx_gpio_match,
+ },
+ .probe = bcm63xx_gpio_probe,
+};
+
int __init bcm63xx_gpio_init(void)
{
bcm63xx_gpio_out_low_reg_init();
@@ -158,8 +185,8 @@ int __init bcm63xx_gpio_init(void)
gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
if (!BCMCPU_IS_6345())
gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
- return gpiochip_add(&bcm63xx_gpio_chip);
+ return platform_driver_register(&bcm63xx_gpio_driver);
}
+
+arch_initcall(bcm63xx_gpio_init);
diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c
index 10eaff4..0b636d6 100644
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -45,9 +45,6 @@ void __init prom_init(void)
reg &= ~mask;
bcm_perf_writel(reg, PERF_CKCTL_REG);
- /* register gpiochip */
- bcm63xx_gpio_init();
-
/* do low level board init */
board_prom_init();
}
--
1.7.2.5
Use proper clk_prepare/unprepare calls in preparation for switching to
the generic clock framework.
Signed-off-by: Jonas Gorski <[email protected]>
---
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
index c7ca7ec..9449e13 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
@@ -1677,7 +1677,7 @@ static int __devinit bcm_enet_probe(struct platform_device *pdev)
ret = PTR_ERR(priv->mac_clk);
goto out_unmap;
}
- clk_enable(priv->mac_clk);
+ clk_prepare_enable(priv->mac_clk);
/* initialize default and fetch platform data */
priv->rx_ring_size = BCMENET_DEF_RX_DESC;
@@ -1706,7 +1706,7 @@ static int __devinit bcm_enet_probe(struct platform_device *pdev)
priv->phy_clk = NULL;
goto out_put_clk_mac;
}
- clk_enable(priv->phy_clk);
+ clk_prepare_enable(priv->phy_clk);
}
/* do minimal hardware init to be able to probe mii bus */
@@ -1808,12 +1808,12 @@ out_uninit_hw:
/* turn off mdc clock */
enet_writel(priv, 0, ENET_MIISC_REG);
if (priv->phy_clk) {
- clk_disable(priv->phy_clk);
+ clk_disable_unprepare(priv->phy_clk);
clk_put(priv->phy_clk);
}
out_put_clk_mac:
- clk_disable(priv->mac_clk);
+ clk_disable_unprepare(priv->mac_clk);
clk_put(priv->mac_clk);
out_unmap:
@@ -1864,10 +1864,10 @@ static int __devexit bcm_enet_remove(struct platform_device *pdev)
/* disable hw block clocks */
if (priv->phy_clk) {
- clk_disable(priv->phy_clk);
+ clk_disable_unprepare(priv->phy_clk);
clk_put(priv->phy_clk);
}
- clk_disable(priv->mac_clk);
+ clk_disable_unprepare(priv->mac_clk);
clk_put(priv->mac_clk);
platform_set_drvdata(pdev, NULL);
--
1.7.2.5
bcm63xx_clk.h does not need to be included anymore as clk.h already
provides all required prototypes.
Signed-off-by: Jonas Gorski <[email protected]>
---
drivers/tty/serial/bcm63xx_uart.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
index c0b68b9..0187aff 100644
--- a/drivers/tty/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
@@ -30,7 +30,6 @@
#include <linux/serial.h>
#include <linux/serial_core.h>
-#include <bcm63xx_clk.h>
#include <bcm63xx_irq.h>
#include <bcm63xx_regs.h>
#include <bcm63xx_io.h>
--
1.7.2.5
Add simple Device Tree include files for all currently supported SoCs.
These will be populated with device definitions as driver support
gets added.
Signed-off-by: Jonas Gorski <[email protected]>
---
arch/mips/bcm63xx/dts/bcm6328.dtsi | 30 ++++++++++++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm6338.dtsi | 30 ++++++++++++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm6345.dtsi | 30 ++++++++++++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm6348.dtsi | 30 ++++++++++++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm6358.dtsi | 33 +++++++++++++++++++++++++++++++++
arch/mips/bcm63xx/dts/bcm6368.dtsi | 33 +++++++++++++++++++++++++++++++++
6 files changed, 186 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/bcm63xx/dts/bcm6328.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6338.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6345.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6348.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6358.dtsi
create mode 100644 arch/mips/bcm63xx/dts/bcm6368.dtsi
diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
new file mode 100644
index 0000000..a0e1835
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm6328.dtsi
@@ -0,0 +1,30 @@
+/*
+ * Device Tree Include file for Broadcom BCM6328 SoC
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6328";
+
+ cpus {
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ };
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x10000000 0x20000>;
+ compatible = "simple-bus";
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm6338.dtsi b/arch/mips/bcm63xx/dts/bcm6338.dtsi
new file mode 100644
index 0000000..21772d9
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm6338.dtsi
@@ -0,0 +1,30 @@
+/*
+ * Device Tree Include file for Broadcom BCM6338 SoC
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6338";
+
+ cpus {
+ cpu@0 {
+ compatible = "brcm,bmips3300", "mips,mips4Kc";
+ };
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@fffe0000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfffe0000 0x20000>;
+ compatible = "simple-bus";
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm6345.dtsi b/arch/mips/bcm63xx/dts/bcm6345.dtsi
new file mode 100644
index 0000000..f1e7153
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm6345.dtsi
@@ -0,0 +1,30 @@
+/*
+ * Device Tree Include file for Broadcom BCM6345 SoC
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6345";
+
+ cpus {
+ cpu@0 {
+ compatible = "brcm,bmips3300", "mips,mips4Kc";
+ };
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@fffe0000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfffe0000 0x20000>;
+ compatible = "simple-bus";
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm6348.dtsi b/arch/mips/bcm63xx/dts/bcm6348.dtsi
new file mode 100644
index 0000000..8a5a2dc
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm6348.dtsi
@@ -0,0 +1,30 @@
+/*
+ * Device Tree Include file for Broadcom BCM6348 SoC
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6348";
+
+ cpus {
+ cpu@0 {
+ compatible = "brcm,bmips3300", "mips,mips4Kc";
+ };
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@fffe0000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfffe0000 0x20000>;
+ compatible = "simple-bus";
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm6358.dtsi b/arch/mips/bcm63xx/dts/bcm6358.dtsi
new file mode 100644
index 0000000..1d3f20f
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm6358.dtsi
@@ -0,0 +1,33 @@
+/*
+ * Device Tree Include file for Broadcom BCM6358 SoC
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6358";
+
+ cpus {
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ };
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ };
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@fffe0000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xfffe0000 0x20000>;
+ compatible = "simple-bus";
+ };
+};
diff --git a/arch/mips/bcm63xx/dts/bcm6368.dtsi b/arch/mips/bcm63xx/dts/bcm6368.dtsi
new file mode 100644
index 0000000..a7624b9
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/bcm6368.dtsi
@@ -0,0 +1,33 @@
+/*
+ * Device Tree Include file for Broadcom BCM6368 SoC
+ *
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6368";
+
+ cpus {
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ };
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ };
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x10000000 0x20000>;
+ compatible = "simple-bus";
+ };
+};
--
1.7.2.5
Use proper clk_prepare/unprepare calls in preparation for switching to
the generic clock framework.
Signed-off-by: Jonas Gorski <[email protected]>
---
drivers/char/hw_random/bcm63xx-rng.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/bcm63xx-rng.c b/drivers/char/hw_random/bcm63xx-rng.c
index aec6a42..3693f56 100644
--- a/drivers/char/hw_random/bcm63xx-rng.c
+++ b/drivers/char/hw_random/bcm63xx-rng.c
@@ -122,7 +122,7 @@ static int __devinit bcm63xx_rng_probe(struct platform_device *pdev)
goto out_free_rng;
}
- clk_enable(clk);
+ clk_prepare_enable(clk);
ret = hwrng_register(rng);
if (ret) {
@@ -135,7 +135,7 @@ static int __devinit bcm63xx_rng_probe(struct platform_device *pdev)
return 0;
out_clk_disable:
- clk_disable(clk);
+ clk_disable_unprepare(clk);
out_free_rng:
platform_set_drvdata(pdev, NULL);
kfree(rng);
@@ -151,7 +151,7 @@ static int __devexit bcm63xx_rng_remove(struct platform_device *pdev)
struct bcm63xx_rng_priv *priv = to_rng_priv(rng);
hwrng_unregister(rng);
- clk_disable(priv->clk);
+ clk_disable_unprepare(priv->clk);
kfree(priv);
kfree(rng);
platform_set_drvdata(pdev, NULL);
--
1.7.2.5
Use proper clk_prepare/unprepare calls in preparation for switching
to the generic clock framework.
Signed-off-by: Jonas Gorski <[email protected]>
---
drivers/spi/spi-bcm63xx.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-bcm63xx.c b/drivers/spi/spi-bcm63xx.c
index a9f4049..69cb96a 100644
--- a/drivers/spi/spi-bcm63xx.c
+++ b/drivers/spi/spi-bcm63xx.c
@@ -431,7 +431,7 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev)
}
/* Initialize hardware */
- clk_enable(bs->clk);
+ clk_prepare_enable(bs->clk);
bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
/* register and we are done */
@@ -447,7 +447,7 @@ static int __devinit bcm63xx_spi_probe(struct platform_device *pdev)
return 0;
out_clk_disable:
- clk_disable(clk);
+ clk_disable_unprepare(clk);
out_err:
platform_set_drvdata(pdev, NULL);
spi_master_put(master);
@@ -468,7 +468,7 @@ static int __devexit bcm63xx_spi_remove(struct platform_device *pdev)
bcm_spi_writeb(bs, 0, SPI_INT_MASK);
/* HW shutdown */
- clk_disable(bs->clk);
+ clk_disable_unprepare(bs->clk);
clk_put(bs->clk);
platform_set_drvdata(pdev, 0);
--
1.7.2.5
Add support for loading DTBs embedded into the kernel. Iterate through
all embedded ones until a match is found and use that.
Use the NVRAM provided board name for constructing the compatible
property for selecting the appropriate in-kernel DTB.
Signed-off-by: Jonas Gorski <[email protected]>
---
arch/mips/Kconfig | 1 +
arch/mips/bcm63xx/Kconfig | 2 +
arch/mips/bcm63xx/Makefile | 1 +
arch/mips/bcm63xx/dts/Kconfig | 3 +
arch/mips/bcm63xx/dts/Makefile | 2 +
arch/mips/bcm63xx/setup.c | 80 ++++++++++++++++++++++++++++++++++++++++
6 files changed, 89 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/bcm63xx/dts/Kconfig
create mode 100644 arch/mips/bcm63xx/dts/Makefile
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9934a46..168b0fc 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -132,6 +132,7 @@ config BCM63XX
select SWAP_IO_SPACE
select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK
+ select USE_OF
help
Support for BCM63XX based boards
diff --git a/arch/mips/bcm63xx/Kconfig b/arch/mips/bcm63xx/Kconfig
index d03e879..03d693b 100644
--- a/arch/mips/bcm63xx/Kconfig
+++ b/arch/mips/bcm63xx/Kconfig
@@ -31,3 +31,5 @@ config BCM63XX_CPU_6368
endmenu
source "arch/mips/bcm63xx/boards/Kconfig"
+
+source "arch/mips/bcm63xx/dts/Kconfig"
diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
index ac28073..30971a7 100644
--- a/arch/mips/bcm63xx/Makefile
+++ b/arch/mips/bcm63xx/Makefile
@@ -5,3 +5,4 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-y += boards/
+obj-y += dts/
diff --git a/arch/mips/bcm63xx/dts/Kconfig b/arch/mips/bcm63xx/dts/Kconfig
new file mode 100644
index 0000000..919f3f6
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/Kconfig
@@ -0,0 +1,3 @@
+menu "Built-in Device Tree support"
+
+endmenu
diff --git a/arch/mips/bcm63xx/dts/Makefile b/arch/mips/bcm63xx/dts/Makefile
new file mode 100644
index 0000000..69c374b
--- /dev/null
+++ b/arch/mips/bcm63xx/dts/Makefile
@@ -0,0 +1,2 @@
+$(obj)/%.dtb: $(obj)/%.dts
+ $(call if_changed,dtc)
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index 314231b..8712354 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -4,6 +4,7 @@
* for more details.
*
* Copyright (C) 2008 Maxime Bizon <[email protected]>
+ * Copyright (C) 2012 Jonas Gorski <[email protected]>
*/
#include <linux/init.h>
@@ -12,6 +13,8 @@
#include <linux/bootmem.h>
#include <linux/ioport.h>
#include <linux/pm.h>
+#include <linux/of_fdt.h>
+#include <linux/of_platform.h>
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <asm/reboot.h>
@@ -20,6 +23,7 @@
#include <bcm63xx_cpu.h>
#include <bcm63xx_regs.h>
#include <bcm63xx_io.h>
+#include <bcm963xx_tag.h>
void bcm63xx_machine_halt(void)
{
@@ -152,6 +156,82 @@ void __init plat_mem_setup(void)
board_setup();
}
+extern struct boot_param_header __dtb_start;
+extern struct boot_param_header __dtb_end;
+
+int __init bcm63xx_is_compatible(struct boot_param_header *devtree,
+ const char *compat)
+{
+ unsigned long dt_root;
+ struct boot_param_header *old_ibp = initial_boot_params;
+ int ret;
+
+ initial_boot_params = devtree;
+
+ dt_root = of_get_flat_dt_root();
+ ret = of_flat_dt_is_compatible(dt_root, compat);
+
+ initial_boot_params = old_ibp;
+
+ return ret;
+}
+
+static struct of_device_id of_ids[] = {
+ { /* will be filled at runtime */ },
+ { .compatible = "simple-bus" },
+ { },
+};
+
+static struct boot_param_header *find_compatible_tree(const char *compat)
+{
+ struct boot_param_header *curr = &__dtb_start;
+
+ while (curr < &__dtb_end) {
+ if (be32_to_cpu(curr->magic) != OF_DT_HEADER)
+ continue;
+
+ if (bcm63xx_is_compatible(curr, compat))
+ return curr;
+
+ /* in-kernel dtbs are aligned to 32 bytes */
+ curr = (void *)curr + roundup(be32_to_cpu(curr->totalsize), 32);
+ }
+
+ return NULL;
+}
+
+void __init device_tree_init(void)
+{
+ struct boot_param_header *devtree = NULL;
+ const char *name = board_get_name();
+
+ strncpy(of_ids[0].compatible, name, BOARDID_LEN);
+
+ devtree = find_compatible_tree(of_ids[0].compatible);
+ if (!devtree) {
+ pr_warn("no compatible device tree found for board %s\n"
+ of_ids[0].compatible);
+ return;
+ }
+
+ __dt_setup_arch(devtree);
+ reserve_bootmem(virt_to_phys(devtree), be32_to_cpu(devtree->totalsize),
+ BOOTMEM_DEFAULT);
+
+ unflatten_device_tree();
+}
+
+int __init bcm63xx_populate_device_tree(void)
+{
+ if (!of_have_populated_dt()) {
+ pr_warn("device tree not available\n");
+ return -ENODEV;
+ }
+
+ return of_platform_populate(NULL, of_ids, NULL, NULL);
+}
+arch_initcall(bcm63xx_populate_device_tree);
+
int __init bcm63xx_register_devices(void)
{
return board_register_devices();
--
1.7.2.5
Register IRQ domains through Device Tree for the internal and external
interrupt controllers. Register the same IRQ ranges as previously to
provide backward compatibility for non-DT drivers.
Signed-off-by: Jonas Gorski <[email protected]>
---
.../devicetree/bindings/mips/bcm63xx/epic.txt | 20 ++++++++++++
.../devicetree/bindings/mips/bcm63xx/ipic.txt | 18 +++++++++++
arch/mips/bcm63xx/dts/bcm6328.dtsi | 16 ++++++++++
arch/mips/bcm63xx/dts/bcm6338.dtsi | 16 ++++++++++
arch/mips/bcm63xx/dts/bcm6345.dtsi | 16 ++++++++++
arch/mips/bcm63xx/dts/bcm6348.dtsi | 16 ++++++++++
arch/mips/bcm63xx/dts/bcm6358.dtsi | 16 ++++++++++
arch/mips/bcm63xx/dts/bcm6368.dtsi | 16 ++++++++++
arch/mips/bcm63xx/irq.c | 32 ++++++++++++++++++++
9 files changed, 166 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mips/bcm63xx/epic.txt
create mode 100644 Documentation/devicetree/bindings/mips/bcm63xx/ipic.txt
diff --git a/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt b/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt
new file mode 100644
index 0000000..4fc74e8
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt
@@ -0,0 +1,20 @@
+* Broadcom BCM63XX External Interrupt Controller
+
+Properties:
+- compatible: "brcm,bcm63xx-epic"
+ Compatible with all bcm63xx SoCs.
+
+- interrupt-controller: This is an interrupt controller.
+
+- #interrupt-cells: <2>
+ This controller supports level and edge triggered interrupts. The
+ first cell is the interrupt number, the second is a 1:1 mapping to
+ the linux interrupt flags.
+
+Example:
+
+ epic: interrupt-controller@18 {
+ compatible = "brcm,bcm63xx-epic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ }
diff --git a/Documentation/devicetree/bindings/mips/bcm63xx/ipic.txt b/Documentation/devicetree/bindings/mips/bcm63xx/ipic.txt
new file mode 100644
index 0000000..1cbabf90
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/bcm63xx/ipic.txt
@@ -0,0 +1,18 @@
+* BCM63XX Internal Interrupt Controller
+
+Properties:
+- compatible: "brcm,bcm63xx-ipic"
+ Compatible with all bcm63xx SoCs.
+
+- interrupt-controller: This is an interrupt controller.
+
+- #interrupt-cells: <1>
+ This controller supports only level interrupts.
+
+Example:
+
+ ipic: interrupt-controller@20 {
+ compatible = "brcm,bcm63xx-ipic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ }
diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
index a0e1835..a41033a 100644
--- a/arch/mips/bcm63xx/dts/bcm6328.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6328.dtsi
@@ -26,5 +26,21 @@
#size-cells = <1>;
ranges = <0 0x10000000 0x20000>;
compatible = "simple-bus";
+
+ interrupt-parent = <&ipic>;
+
+ perf@0 {
+ epic: interrupt-controller@18 {
+ compatible = "brcm,bcm63xx-epic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ ipic: interrupt-controller@20 {
+ compatible = "brcm,bcm63xx-ipic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6338.dtsi b/arch/mips/bcm63xx/dts/bcm6338.dtsi
index 21772d9..8ecbc4f 100644
--- a/arch/mips/bcm63xx/dts/bcm6338.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6338.dtsi
@@ -26,5 +26,21 @@
#size-cells = <1>;
ranges = <0 0xfffe0000 0x20000>;
compatible = "simple-bus";
+
+ interrupt-parent = <&ipic>;
+
+ perf@0 {
+ ipic: interrupt-controller@c {
+ compatible = "brcm,bcm63xx-ipic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ epic: interrupt-controller@14 {
+ compatible = "brcm,bcm63xx-epic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6345.dtsi b/arch/mips/bcm63xx/dts/bcm6345.dtsi
index f1e7153..ed17c12 100644
--- a/arch/mips/bcm63xx/dts/bcm6345.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6345.dtsi
@@ -26,5 +26,21 @@
#size-cells = <1>;
ranges = <0 0xfffe0000 0x20000>;
compatible = "simple-bus";
+
+ interrupt-parent = <&ipic>;
+
+ perf@0 {
+ ipic: interrupt-controller@c {
+ compatible = "brcm,bcm63xx-ipic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ epic: interrupt-controller@14 {
+ compatible = "brcm,bcm63xx-epic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6348.dtsi b/arch/mips/bcm63xx/dts/bcm6348.dtsi
index 8a5a2dc..d54cf20 100644
--- a/arch/mips/bcm63xx/dts/bcm6348.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6348.dtsi
@@ -26,5 +26,21 @@
#size-cells = <1>;
ranges = <0 0xfffe0000 0x20000>;
compatible = "simple-bus";
+
+ interrupt-parent = <&ipic>;
+
+ perf@0 {
+ ipic: interrupt-controller@c {
+ compatible = "brcm,bcm63xx-ipic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ epic: interrupt-controller@14 {
+ compatible = "brcm,bcm63xx-epic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6358.dtsi b/arch/mips/bcm63xx/dts/bcm6358.dtsi
index 1d3f20f..6ef283f 100644
--- a/arch/mips/bcm63xx/dts/bcm6358.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6358.dtsi
@@ -29,5 +29,21 @@
#size-cells = <1>;
ranges = <0 0xfffe0000 0x20000>;
compatible = "simple-bus";
+
+ interrupt-parent = <&ipic>;
+
+ perf@0 {
+ epic: interrupt-controller@18 {
+ compatible = "brcm,bcm63xx-epic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ ipic: interrupt-controller@20 {
+ compatible = "brcm,bcm63xx-ipic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
};
};
diff --git a/arch/mips/bcm63xx/dts/bcm6368.dtsi b/arch/mips/bcm63xx/dts/bcm6368.dtsi
index a7624b9..ae1b584 100644
--- a/arch/mips/bcm63xx/dts/bcm6368.dtsi
+++ b/arch/mips/bcm63xx/dts/bcm6368.dtsi
@@ -29,5 +29,21 @@
#size-cells = <1>;
ranges = <0 0x10000000 0x20000>;
compatible = "simple-bus";
+
+ interrupt-parent = <&ipic>;
+
+ perf@0 {
+ epic: interrupt-controller@18 {
+ compatible = "brcm,bcm63xx-epic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ ipic: interrupt-controller@20 {
+ compatible = "brcm,bcm63xx-ipic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+ };
};
};
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index da24c2b..3b64066 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -12,6 +12,8 @@
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
#include <bcm63xx_cpu.h>
@@ -515,6 +517,34 @@ static struct irqaction cpu_ext_cascade_action = {
.flags = IRQF_NO_THREAD,
};
+static int __init bcm63xx_ipic_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ if (!irq_domain_add_simple(node,
+ IRQ_EXTERNAL_BASE - IRQ_INTERNAL_BASE,
+ IRQ_INTERNAL_BASE, &irq_domain_simple_ops,
+ NULL))
+ panic("unable to add ipic domain!\n");
+
+ return 0;
+}
+
+static int __init bcm63xx_epic_of_init(struct device_node *node,
+ struct device_node *parent)
+{
+ if (!irq_domain_add_simple(node, ext_irq_count, IRQ_EXTERNAL_BASE,
+ &irq_domain_simple_ops, NULL))
+ panic("unable to add epic domain!\n");
+
+ return 0;
+}
+
+static const struct of_device_id bcm63xx_pic_of_match[] __initconst = {
+ { .compatible = "brcm,bcm63xx-ipic", .data = bcm63xx_ipic_of_init },
+ { .compatible = "brcm,bcm63xx-epic", .data = bcm63xx_epic_of_init },
+ { },
+};
+
void __init arch_init_irq(void)
{
int i;
@@ -535,4 +565,6 @@ void __init arch_init_irq(void)
}
setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
+
+ of_irq_init(bcm63xx_pic_of_match);
}
--
1.7.2.5
> [RFC] MIPS: BCM63XX: add initial Device Tree support
Disregard that, I can't git :-(
That obviously should have been 0/15 and so on (even if many patches
work stand alone). To not spam the lists, I'll wait for some comments
before resending the patch series (with proper numbering).
Jonas
On Sun, 2012-11-11 at 13:50 +0100, Jonas Gorski wrote:
> This patch series adds initial Device Tree support to BCM63XX by adding
> bindings for interrupts, GPIOs and clocks to Device Tree. Finally it adds
> one "real" user, the serial driver, to the device tree boards.
> 51 files changed, 1993 insertions(+), 392 deletions(-)
I've already said what I think privately to you but I will do it again
The bcm63xx code base is IMO quite clean. It does not suffer from code
duplication, and god it would have taken far less time to write it the
"bad" way.
We have only *one* register file for all the SOCs, only the different
bits are visible.
We can even build a single kernel that support all SOCs/boards.
So what's the *point* of this ?
You *cannot* abstract hardware, you just can't guess now what the next
SOC peculiarity will be.
Quoting your patch "BCM63XX: switch to common clock and Device Tree"
+Required properties:
+- compatible: one of
+ a) "brcm,bcm63xx-clock"
+ Standard BCM63XX clock.
cool a nice abstraction, one register bit = one clock
+ b) "brcm,bcm63xx-sar-clock"
+ SAR/ATM clock, which requires a reset of the SAR/ATM block.
+ c) "brcm,bcm63xx-enetsw-clock"
+ Generic ethernet switch clock, which requires a reset of the block.
+ d) "brcm,bcm6368-enetsw-clock"
+ BCM6368 ethernet switch clock, which requires additional clocks to be
+ enabled during reset.
oops that abstraction did not fly because after enabling this particular
clock on this SOC you also need to toggle other bits.
that list is going to get longer and longer and at the end won't mean anything.
and this is supposed to be a *STABLE* API
We don't add syscall everyday, because we have to support them forever.
Why would it be ok to add such abstractions that prevent further code
refactoring because they are fixed in stone ?
--
Maxime
On 11/11/2012 05:50 AM, Jonas Gorski wrote:
> Add simple Device Tree include files for all currently supported SoCs.
> These will be populated with device definitions as driver support
> gets added.
> arch/mips/bcm63xx/dts/bcm6328.dtsi | 30 ++++++++++++++++++++++++++++++
> arch/mips/bcm63xx/dts/bcm6338.dtsi | 30 ++++++++++++++++++++++++++++++
> arch/mips/bcm63xx/dts/bcm6345.dtsi | 30 ++++++++++++++++++++++++++++++
> arch/mips/bcm63xx/dts/bcm6348.dtsi | 30 ++++++++++++++++++++++++++++++
> arch/mips/bcm63xx/dts/bcm6358.dtsi | 33 +++++++++++++++++++++++++++++++++
> arch/mips/bcm63xx/dts/bcm6368.dtsi | 33 +++++++++++++++++++++++++++++++++
All of ARM, c6x, microblaze, openrisc, powerpc put device tree files
into arch/${arch}/boot/dts/ - should MIPS follow the same layout?
On 11/11/2012 05:50 AM, Jonas Gorski wrote:
> Register IRQ domains through Device Tree for the internal and external
> interrupt controllers. Register the same IRQ ranges as previously to
> provide backward compatibility for non-DT drivers.
> diff --git a/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt b/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt
Rather than putting binding docs in an arch-specific directory, perhaps
put them into a device-type-specific directory, such as
bindings/interrupt-controller/brcm,bcm63xx-epic.txt?
> +- #interrupt-cells: <2>
> + This controller supports level and edge triggered interrupts. The
> + first cell is the interrupt number, the second is a 1:1 mapping to
> + the linux interrupt flags.
The DT documentation should be self-contained, and not reference
anything OS-specific. In this case, you could reference
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
for the interrupt flags.
> diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
> ranges = <0 0x10000000 0x20000>;
> compatible = "simple-bus";
> +
> + interrupt-parent = <&ipic>;
> +
> + perf@0 {
> + epic: interrupt-controller@18 {
Don't you need some reg properties in the perf and interrupt-controller
nodes so that the register address can be determined?
> + compatible = "brcm,bcm63xx-epic";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
On 11/11/2012 05:50 AM, Jonas Gorski wrote:
> Add definitions for the clocks found and used in all supported SoCs.
> diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + periph: pll {
> + compatible = "brcm,bcm63xx-clock";
> + #clock-cells = <0>;
> + clock-frequency = <50000000>;
> + clock-output-names = "periph";
> + };
Here too, it seems like some reg properties would be required.
On 11/11/2012 05:50 AM, Jonas Gorski wrote:
> Switch BCM63XX to the common clock framework and use clkdev for
> providing clock name lookups for non-DT devices.
>
> Clocks can have a frequency and gate-bit, or none, in case they
> are just provided for drivers expecting them to be present.
> diff --git a/Documentation/devicetree/bindings/clock/bcm63xx-clock.txt b/Documentation/devicetree/bindings/clock/bcm63xx-clock.txt
A very minor nit, but it might be nice to add the DT binding
documentation before (or as part of) the patches that use them (code
that parses them, or using the bindings in .dts files)
Of course, I'm relying on my email receive order, to judge this since
the patch numbering didn't come through, so perhaps the patches are
already set up this way...
On 11/11/2012 05:50 AM, Jonas Gorski wrote:
> Register the GPIO controller through Device Tree and add the
> appropriate values in the include files.
>
> Since we can't register a platform driver at this early stage move the
> direct call to bcm63xx_gpio_init from prom_init to an arch initcall.
> diff --git a/Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt b/Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt
> +- #gpio-cells: Must be <2>. The first cell is the GPIO pin, and
> + the second one the standard linux flags.
Also here, I think you want to explicitly document the flag values here
so the bindings don't rely on the Linux kernel code. I don't think
there's a standard central file which documents them though, although I
vaguely recall some discussion to create add them to gpio.txt?
On 11/11/2012 05:50 AM, Jonas Gorski wrote:
> Enable serial through Device Tree board files instead of legacy
> board files.
> diff --git a/arch/mips/bcm63xx/dts/96328avng.dts b/arch/mips/bcm63xx/dts/96328avng.dts
> ubus@10000000 {
>
> + serial@100 {
Very minor nit: Why the blank line there?
> + status = "ok";
> + };
> };
> };
On 11/11/2012 05:50 AM, Jonas Gorski wrote:
> Add empty board files for all boards supported by the legacy board
> support.
> diff --git a/arch/mips/bcm63xx/dts/96328avng.dts b/arch/mips/bcm63xx/dts/96328avng.dts
> +/ {
> + model = "96328avng";
> + compatible = "96328avng";
The board should be compatible with both the board name and the SoC on
the board. I know that right now the MIPS code is choosing the DT to use
based on the board name, but I think it's more typical to pass an
explicit DT to the kernel, and then choose the kernel support to execute
based on the compatible value (certainly this is the case on ARM and I
assume other architectures too). That would require the DT content to
include the SoC name in the compatible property, so that the kernel
support didn't then need to contain a table of all supported board names.
> + ubus@10000000 {
> +
> + };
Do you need to include this empty node in each file? I guess it gets
added to in the next patch so it's not a big deal though.
> diff --git a/arch/mips/bcm63xx/dts/Kconfig b/arch/mips/bcm63xx/dts/Kconfig
> +config BOARD_96328AVNG
> + bool "96328avng reference board"
> + select BCM63XX_CPU_6328
Why not simply compile all DTs whenever the SoC support is enabled? I
suppose you're trying to avoid packing all the DTs into the kernel
image. Does it make more sense to amend the MIPS kernel boot process so
that a single user-/firmware-selected DT is passed to the kernel, rather
than packing the DTs into the kernel and selecting one?
On 11/12/2012 08:54 PM, Stephen Warren wrote:
> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>> Add simple Device Tree include files for all currently supported SoCs.
>> These will be populated with device definitions as driver support
>> gets added.
>
>> arch/mips/bcm63xx/dts/bcm6328.dtsi | 30 ++++++++++++++++++++++++++++++
>> arch/mips/bcm63xx/dts/bcm6338.dtsi | 30 ++++++++++++++++++++++++++++++
>> arch/mips/bcm63xx/dts/bcm6345.dtsi | 30 ++++++++++++++++++++++++++++++
>> arch/mips/bcm63xx/dts/bcm6348.dtsi | 30 ++++++++++++++++++++++++++++++
>> arch/mips/bcm63xx/dts/bcm6358.dtsi | 33 +++++++++++++++++++++++++++++++++
>> arch/mips/bcm63xx/dts/bcm6368.dtsi | 33 +++++++++++++++++++++++++++++++++
>
> All of ARM, c6x, microblaze, openrisc, powerpc put device tree files
> into arch/${arch}/boot/dts/ - should MIPS follow the same layout?
At this point, I don't see what the benefit of centralizing all of these
would be. Currently there is no concept of a single kernel image that
would work across multiple MIPS system implementations. So keeping the
DTS files with their users makes some organizational sense.
Similar arguments could be made for moving all the files in `find .
-name \*.dts\*` to a top level dts/ directory.
David Daney
On 12 November 2012 12:18, Maxime Bizon <[email protected]> wrote:
> On Sun, 2012-11-11 at 13:50 +0100, Jonas Gorski wrote:
>
>> This patch series adds initial Device Tree support to BCM63XX by adding
>> bindings for interrupts, GPIOs and clocks to Device Tree. Finally it adds
>> one "real" user, the serial driver, to the device tree boards.
>
>> 51 files changed, 1993 insertions(+), 392 deletions(-)
>
> I've already said what I think privately to you but I will do it again
>
> The bcm63xx code base is IMO quite clean. It does not suffer from code
> duplication, and god it would have taken far less time to write it the
> "bad" way.
The non-DT way of defining boards will not go away soon - see how all
changes are done with keeping "backward" compatibility in mind: I
don't remove the old device registration code, I don't remove any
fields from the board struct, I added compatibility dts for when there
is only a board struct, no board specific dts file.
> We have only *one* register file for all the SOCs, only the different
> bits are visible.
>
> We can even build a single kernel that support all SOCs/boards.
That's not going to change with Device Tree, and I'm trying my best to
keep this.
> So what's the *point* of this ?
Not having to update board_bcm963xx.{c,h} because some vendor decided
to add e.g. a previously unused gpio-bitbanged device. Not having to
modify the kernel but just attach a (externally build) dtb to the
kernel to support a new board. Ideally in the far future even using a
CFE provided dtb. I'm sure there are more reasons.
> You *cannot* abstract hardware, you just can't guess now what the next
> SOC peculiarity will be.
And nobody wants to do that. But - as Kevin already mentioned - it
would be nice if we get similar SoCs we already know about supported
with the same code; or at least , like BCM33xx, BCM68xx or maybe even
BCM7xxx (never looked at them, so I can't tell how viable that is).
>> Quoting your patch "BCM63XX: switch to common clock and Device Tree"
>
> +Required properties:
> +- compatible: one of
> + a) "brcm,bcm63xx-clock"
> + Standard BCM63XX clock.
>
> cool a nice abstraction, one register bit = one clock
>
> + b) "brcm,bcm63xx-sar-clock"
> + SAR/ATM clock, which requires a reset of the SAR/ATM block.
> + c) "brcm,bcm63xx-enetsw-clock"
> + Generic ethernet switch clock, which requires a reset of the block.
> + d) "brcm,bcm6368-enetsw-clock"
> + BCM6368 ethernet switch clock, which requires additional clocks to be
> + enabled during reset.
>
> oops that abstraction did not fly because after enabling this particular
> clock on this SOC you also need to toggle other bits.
These special clocks are so that the original behaviour of the clocks
is kept. I'd rather argue that the reset code does not belong into
the clock code, and is actually the responsibility of the driver. It
would make the clock code much simpler.
There will be exactly one consumer each for the enetsw/sar clocks; the
drivers themselves. And since the drivers itself aren't upstream yet,
it should be no problem modifying them to reset the cores instead of
relying on the clock code to do that for them. then we can implement
the reset call abstract enough so the entsw just expects a list of
clocks through DT that need to be enabled during reset - without
having to care about which exact clocks these are (and it will be zero
except for two SoCs).
What would you suggest? Please no "don't use Device Tree", as I don't
think we can avoid that. I'm struggling to find something you are fine
with.
> that list is going to get longer and longer and at the end won't mean anything.
BCM681x needs additional special handling, yes, but that's it
currently. Neither BCM6362 nor BCM63168 have/need this. And there is
no problem adding new support code in the kernel as needed. Nobody
expects older kernels to work with newer SoCs. But as stated earlier,
older kernels should work with newer boards.
> and this is supposed to be a *STABLE* API
>
> We don't add syscall everyday, because we have to support them forever.
> Why would it be ok to add such abstractions that prevent further code
> refactoring because they are fixed in stone ?
I wouldn't treat this as stable until we got it into a satisfactory
state with everything supported. Heck, I wouldn't even treat this as
stable until Broadcom ships it in their SDKs to customers with CFEs
providing DTBs to the kernel.
What do you want to do, keep it out of the kernel until everything is
supported, working and "polished up", then posting a big patch bomb? I
don't think this will work well and will just cause pain for everyone.
Jonas
On 13 November 2012 06:00, Stephen Warren <[email protected]> wrote:
> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>> Register IRQ domains through Device Tree for the internal and external
>> interrupt controllers. Register the same IRQ ranges as previously to
>> provide backward compatibility for non-DT drivers.
>
>> diff --git a/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt b/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt
>
> Rather than putting binding docs in an arch-specific directory, perhaps
> put them into a device-type-specific directory, such as
> bindings/interrupt-controller/brcm,bcm63xx-epic.txt?
Almost everyone has their interrupt-controller bindings in
$arch/$platform, but if interrupt-controller is the preferred
location, I can certainly move it there; I have no hard preference for
any location.
>
>> +- #interrupt-cells: <2>
>> + This controller supports level and edge triggered interrupts. The
>> + first cell is the interrupt number, the second is a 1:1 mapping to
>> + the linux interrupt flags.
>
> The DT documentation should be self-contained, and not reference
> anything OS-specific. In this case, you could reference
> Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> for the interrupt flags.
Good Idea, I'll do that for the next iteration.
>> diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
>
>> ranges = <0 0x10000000 0x20000>;
>> compatible = "simple-bus";
>> +
>> + interrupt-parent = <&ipic>;
>> +
>> + perf@0 {
>> + epic: interrupt-controller@18 {
>
> Don't you need some reg properties in the perf and interrupt-controller
> nodes so that the register address can be determined?
Since there is no support code for that property yet I did not add it.
I haven't quite finished yet how the final bindings will be (since
there are/were a few things I haven't finished researching yet, e.g.
how this controller works in SMP context, and how interrupt
controllers are supposed to work).
I can add all expected properties now and add support for them later,
but I feel that this might add properties that will then never
supported, and nobody updates the documentation for that, so I'd
rather like to keep the documentation/dts(i) in sync with what the
actual code expects/supports.
Jonas
On 13 November 2012 06:02, Stephen Warren <[email protected]> wrote:
> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>> Add definitions for the clocks found and used in all supported SoCs.
>
>> diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
>
>> + clocks {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + periph: pll {
>> + compatible = "brcm,bcm63xx-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <50000000>;
>> + clock-output-names = "periph";
>> + };
>
> Here too, it seems like some reg properties would be required.
This is more or less a dummy clock with no real backing for it, but
some of the drivers expect this clock to be present (even just to get
the frequency).
Jonas
On 13 November 2012 06:04, Stephen Warren <[email protected]> wrote:
> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>> Switch BCM63XX to the common clock framework and use clkdev for
>> providing clock name lookups for non-DT devices.
>>
>> Clocks can have a frequency and gate-bit, or none, in case they
>> are just provided for drivers expecting them to be present.
>
>> diff --git a/Documentation/devicetree/bindings/clock/bcm63xx-clock.txt b/Documentation/devicetree/bindings/clock/bcm63xx-clock.txt
>
> A very minor nit, but it might be nice to add the DT binding
> documentation before (or as part of) the patches that use them (code
> that parses them, or using the bindings in .dts files)
>
> Of course, I'm relying on my email receive order, to judge this since
> the patch numbering didn't come through, so perhaps the patches are
> already set up this way...
No you are right, the bindings are being added earlier. I move it to
the patch adding the (then still unused) binding to the dts(i) files.
I'd rather not split it up completely, and add it with the binding
usage together so it's easier to spot if I do something with the
bindings that contradicts the documentation or is missing ;-).
Jonas
On 13 November 2012 06:06, Stephen Warren <[email protected]> wrote:
> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>> Register the GPIO controller through Device Tree and add the
>> appropriate values in the include files.
>>
>> Since we can't register a platform driver at this early stage move the
>> direct call to bcm63xx_gpio_init from prom_init to an arch initcall.
>
>> diff --git a/Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt b/Documentation/devicetree/bindings/gpio/bcm63xx-gpio.txt
>
>> +- #gpio-cells: Must be <2>. The first cell is the GPIO pin, and
>> + the second one the standard linux flags.
>
> Also here, I think you want to explicitly document the flag values here
> so the bindings don't rely on the Linux kernel code. I don't think
> there's a standard central file which documents them though, although I
> vaguely recall some discussion to create add them to gpio.txt?
I'll add some more description. And yes there isn't, and I can't
comment about that since I just joined devicetree-discuss a few days
ago. It would be nice to have them there. Maybe I'll add a reference
to gpio.txt and see if I can come up with an acceptable description
for the flags.
Jonas
On 13 November 2012 06:12, Stephen Warren <[email protected]> wrote:
> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>> Add empty board files for all boards supported by the legacy board
>> support.
>
>> diff --git a/arch/mips/bcm63xx/dts/96328avng.dts b/arch/mips/bcm63xx/dts/96328avng.dts
>
>> +/ {
>> + model = "96328avng";
>> + compatible = "96328avng";
>
> The board should be compatible with both the board name and the SoC on
> the board. I know that right now the MIPS code is choosing the DT to use
> based on the board name, but I think it's more typical to pass an
> explicit DT to the kernel, and then choose the kernel support to execute
> based on the compatible value (certainly this is the case on ARM and I
> assume other architectures too). That would require the DT content to
> include the SoC name in the compatible property, so that the kernel
> support didn't then need to contain a table of all supported board names.
I'll add the SoC name to the compatible line.
>> + ubus@10000000 {
>> +
>> + };
>
> Do you need to include this empty node in each file? I guess it gets
> added to in the next patch so it's not a big deal though.
It's just there so it is already present when adding blocks to it. It
is/was mainly for making reordering patches easier.
>
>> diff --git a/arch/mips/bcm63xx/dts/Kconfig b/arch/mips/bcm63xx/dts/Kconfig
>
>> +config BOARD_96328AVNG
>> + bool "96328avng reference board"
>> + select BCM63XX_CPU_6328
>
> Why not simply compile all DTs whenever the SoC support is enabled? I
> suppose you're trying to avoid packing all the DTs into the kernel
> image. Does it make more sense to amend the MIPS kernel boot process so
> that a single user-/firmware-selected DT is passed to the kernel, rather
> than packing the DTs into the kernel and selecting one?
The plan is to add support for an externally attached DT (but not
present yet), and eventually add support for a bootloader passed DT,
but since I don't know yet how these will work, I didn't want to add
something based on guesses.
My reasoning for allowing (de-)selecting each board is to dampen the
bloat from the dtbs - after these few blocks the combined dtbs are
already four times as large as the old board setup code including all
boards. Especially older devices are constrained to 4 or even 2 MB
flash, so every kB counts there.
Jonas
On Wed, 2012-11-14 at 13:07 +0100, Jonas Gorski wrote:
Thanks for addressing my concerns
> > We can even build a single kernel that support all SOCs/boards.
>
> That's not going to change with Device Tree, and I'm trying my best to
> keep this.
DT is said to be the solution to achieve this goal on ARM. I was just
pointing out that we already have this today.
> Not having to update board_bcm963xx.{c,h} because some vendor decided
> to add e.g. a previously unused gpio-bitbanged device. Not having to
> modify the kernel but just attach a (externally build) dtb to the
> kernel to support a new board. Ideally in the far future even using a
> CFE provided dtb. I'm sure there are more reasons.
Put the board description in DT, but please leave the SOC out and don't
try to describe them with DT, that's too preliminary.
Let's support more SOCs first, we cannot generalize on what we don't
know.
> And nobody wants to do that. But - as Kevin already mentioned - it
> would be nice if we get similar SoCs we already know about supported
> with the same code; or at least , like BCM33xx, BCM68xx or maybe even
> BCM7xxx (never looked at them, so I can't tell how viable that is).
DT is not the key here
code reuse/refactoring is
> These special clocks are so that the original behaviour of the clocks
> is kept. I'd rather argue that the reset code does not belong into
> the clock code, and is actually the responsibility of the driver. It
> would make the clock code much simpler.
and IMO would make the driver code uglier. You don't read clock code
everyday, it's boring, you do read/change driver code much more often.
> What would you suggest? Please no "don't use Device Tree", as I don't
> think we can avoid that. I'm struggling to find something you are fine
As I said in my original email, I don't think bcm63xx codebase suffers
from any problem similar to what caused Linus' rant about ARM few years
ago.
Did someone threaten to stop merging our patches if we don't use DT ?
> I wouldn't treat this as stable until we got it into a satisfactory
> state with everything supported. Heck, I wouldn't even treat this as
> stable until Broadcom ships it in their SDKs to customers with CFEs
> providing DTBs to the kernel.
DT will succeed if chip designers start thinking the other way around:
making new chip backward compatible with existing code or DT bindings.
If that does not happen, we just moving C struct/arrays into another
format with no added benefits.
So we have to call it stable, otherwise there is no incentive to use
them.
And I just hate stable interfaces (which developer doesn't ?), they
require more maintenance/testing if you're serious about your work.
--
Maxime
On 11/14/2012 05:09 AM, Jonas Gorski wrote:
> On 13 November 2012 06:00, Stephen Warren <[email protected]> wrote:
>> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>>> Register IRQ domains through Device Tree for the internal and external
>>> interrupt controllers. Register the same IRQ ranges as previously to
>>> provide backward compatibility for non-DT drivers.
>>
>>> diff --git a/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt b/Documentation/devicetree/bindings/mips/bcm63xx/epic.txt
>>
>> Rather than putting binding docs in an arch-specific directory, perhaps
>> put them into a device-type-specific directory, such as
>> bindings/interrupt-controller/brcm,bcm63xx-epic.txt?
>
> Almost everyone has their interrupt-controller bindings in
> $arch/$platform, but if interrupt-controller is the preferred
> location, I can certainly move it there; I have no hard preference for
> any location.
Yes, people have been putting them in arch/platform, but I think there's
a move to more type-based locations.
>>> diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
>>
>>> ranges = <0 0x10000000 0x20000>;
>>> compatible = "simple-bus";
>>> +
>>> + interrupt-parent = <&ipic>;
>>> +
>>> + perf@0 {
>>> + epic: interrupt-controller@18 {
>>
>> Don't you need some reg properties in the perf and interrupt-controller
>> nodes so that the register address can be determined?
>
> Since there is no support code for that property yet I did not add it.
> I haven't quite finished yet how the final bindings will be (since
> there are/were a few things I haven't finished researching yet, e.g.
> how this controller works in SMP context, and how interrupt
> controllers are supposed to work).
>
> I can add all expected properties now and add support for them later,
> but I feel that this might add properties that will then never
> supported, and nobody updates the documentation for that, so I'd
> rather like to keep the documentation/dts(i) in sync with what the
> actual code expects/supports.
The DT bindings and DT content are supposed to be fully defined the
first time around, such that even if the kernel doesn't use the reg
property yet, if you were to use the DT created now with a future kernel
that does use the reg property, it's already there.
On 11/14/2012 05:11 AM, Jonas Gorski wrote:
> On 13 November 2012 06:02, Stephen Warren <[email protected]> wrote:
>> On 11/11/2012 05:50 AM, Jonas Gorski wrote:
>>> Add definitions for the clocks found and used in all supported SoCs.
>>
>>> diff --git a/arch/mips/bcm63xx/dts/bcm6328.dtsi b/arch/mips/bcm63xx/dts/bcm6328.dtsi
>>
>>> + clocks {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + periph: pll {
>>> + compatible = "brcm,bcm63xx-clock";
>>> + #clock-cells = <0>;
>>> + clock-frequency = <50000000>;
>>> + clock-output-names = "periph";
>>> + };
>>
>> Here too, it seems like some reg properties would be required.
>
> This is more or less a dummy clock with no real backing for it, but
> some of the drivers expect this clock to be present (even just to get
> the frequency).
Should compatible="fixed-clock" then if this is just a dummy? Ideally
though, nothing "dummy" would be added to the DT; the kernel would
continue to provide the dummy values via code until the DT was able to
fully represent the actual HW.