Small series that fixes/completes DT bindings for Tegra GPUs and add two
missing entries required for the Tegra210 GPU to operate properly.
Changes since v1:
- Renamed "pllg_ref" clock to "ref" in DT bindings
Alexandre Courbot (5):
dt-bindings: gk20a: Fix typo in compatible name
dt-bindings: gk20a: Document iommus property
dt-bindings: Add documentation for GM20B GPU
arm64: tegra210: Add reference clock to GM20B
arm64: tegra210: Add IOMMU node to GM20B
.../devicetree/bindings/gpu/nvidia,gk20a.txt | 35 +++++++++++++++++++---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 +++--
2 files changed, 37 insertions(+), 6 deletions(-)
--
2.7.2
GK20A can optionally make use of an IOMMU.
Signed-off-by: Alexandre Courbot <[email protected]>
---
Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
index 914f0ff4020e..1e3748337319 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
@@ -24,6 +24,9 @@ Required properties:
- reset-names: Must include the following entries:
- gpu
+Optional properties:
+- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
+
Example:
gpu@0,57000000 {
@@ -39,5 +42,6 @@ Example:
clock-names = "gpu", "pwr";
resets = <&tegra_car 184>;
reset-names = "gpu";
+ iommus = <&mc TEGRA_SWGROUP_GPU>;
status = "disabled";
};
--
2.7.2
This clock is required for the GPU to operate.
Signed-off-by: Alexandre Courbot <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 362c269946ff..04898cb25f0c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -309,8 +309,9 @@
<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "stall", "nonstall";
clocks = <&tegra_car TEGRA210_CLK_GPU>,
- <&tegra_car TEGRA210_CLK_PLL_P_OUT5>;
- clock-names = "gpu", "pwr";
+ <&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
+ <&tegra_car TEGRA210_CLK_PLL_G_REF>;
+ clock-names = "gpu", "pwr", "ref";
resets = <&tegra_car 184>;
reset-names = "gpu";
status = "disabled";
--
2.7.2
Nouveau can take advantage of this declaration to remove the need for
contiguous memory.
Signed-off-by: Alexandre Courbot <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 04898cb25f0c..478543f74863 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -314,6 +314,9 @@
clock-names = "gpu", "pwr", "ref";
resets = <&tegra_car 184>;
reset-names = "gpu";
+
+ iommus = <&mc TEGRA_SWGROUP_GPU>;
+
status = "disabled";
};
--
2.7.2
GM20B's definition is mostly similar to GK20A's, but requires an
additional clock.
Signed-off-by: Alexandre Courbot <[email protected]>
---
.../devicetree/bindings/gpu/nvidia,gk20a.txt | 27 ++++++++++++++++++++--
1 file changed, 25 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
index 1e3748337319..d9ad6b87fbbc 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
@@ -1,9 +1,10 @@
-NVIDIA GK20A Graphics Processing Unit
+NVIDIA Tegra Graphics Processing Units
Required properties:
- compatible: "nvidia,<gpu>"
Currently recognized values:
- nvidia,gk20a
+ - nvidia,gm20b
- reg: Physical base address and length of the controller's registers.
Must contain two entries:
- first entry for bar0
@@ -19,6 +20,9 @@ Required properties:
- clock-names: Must include the following entries:
- gpu
- pwr
+If the compatible string is "nvidia,gm20b", then the following clock
+is also required:
+ - ref
- resets: Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names: Must include the following entries:
@@ -27,7 +31,7 @@ Required properties:
Optional properties:
- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
-Example:
+Example for GK20A:
gpu@0,57000000 {
compatible = "nvidia,gk20a";
@@ -45,3 +49,22 @@ Example:
iommus = <&mc TEGRA_SWGROUP_GPU>;
status = "disabled";
};
+
+Example for GM20B:
+
+ gpu@0,57000000 {
+ compatible = "nvidia,gm20b";
+ reg = <0x0 0x57000000 0x0 0x01000000>,
+ <0x0 0x58000000 0x0 0x01000000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "stall", "nonstall";
+ clocks = <&tegra_car TEGRA210_CLK_GPU>,
+ <&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
+ <&tegra_car TEGRA210_CLK_PLL_G_REF>;
+ clock-names = "gpu", "pwr", "ref";
+ resets = <&tegra_car 184>;
+ reset-names = "gpu";
+ iommus = <&mc TEGRA_SWGROUP_GPU>;
+ status = "disabled";
+ };
--
2.7.2
The correct compatible name is "nvidia,gk20a".
Signed-off-by: Alexandre Courbot <[email protected]>
---
Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
index 23bfe8e1f7cc..914f0ff4020e 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
@@ -1,9 +1,9 @@
NVIDIA GK20A Graphics Processing Unit
Required properties:
-- compatible: "nvidia,<chip>-<gpu>"
+- compatible: "nvidia,<gpu>"
Currently recognized values:
- - nvidia,tegra124-gk20a
+ - nvidia,gk20a
- reg: Physical base address and length of the controller's registers.
Must contain two entries:
- first entry for bar0
--
2.7.2
On Tue, Mar 15, 2016 at 11:58:40AM +0900, Alexandre Courbot wrote:
> The correct compatible name is "nvidia,gk20a".
>
> Signed-off-by: Alexandre Courbot <[email protected]>
> ---
> Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <[email protected]>
This may be what is used, but having the SoC name would be preferred
assuming gk20a is in multiple SoCs.
Rob
On Tue, Mar 15, 2016 at 11:58:41AM +0900, Alexandre Courbot wrote:
> GK20A can optionally make use of an IOMMU.
>
> Signed-off-by: Alexandre Courbot <[email protected]>
> ---
> Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++++
> 1 file changed, 4 insertions(+)
Acked-by: Rob Herring <[email protected]>
On Tue, Mar 15, 2016 at 11:58:42AM +0900, Alexandre Courbot wrote:
> GM20B's definition is mostly similar to GK20A's, but requires an
> additional clock.
>
> Signed-off-by: Alexandre Courbot <[email protected]>
> ---
> .../devicetree/bindings/gpu/nvidia,gk20a.txt | 27 ++++++++++++++++++++--
> 1 file changed, 25 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <[email protected]>
One nit below.
>
> diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
> index 1e3748337319..d9ad6b87fbbc 100644
> --- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
> +++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
> @@ -1,9 +1,10 @@
> -NVIDIA GK20A Graphics Processing Unit
> +NVIDIA Tegra Graphics Processing Units
>
> Required properties:
> - compatible: "nvidia,<gpu>"
> Currently recognized values:
> - nvidia,gk20a
> + - nvidia,gm20b
> - reg: Physical base address and length of the controller's registers.
> Must contain two entries:
> - first entry for bar0
> @@ -19,6 +20,9 @@ Required properties:
> - clock-names: Must include the following entries:
> - gpu
> - pwr
> +If the compatible string is "nvidia,gm20b", then the following clock
> +is also required:
> + - ref
> - resets: Must contain an entry for each entry in reset-names.
> See ../reset/reset.txt for details.
> - reset-names: Must include the following entries:
> @@ -27,7 +31,7 @@ Required properties:
> Optional properties:
> - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
>
> -Example:
> +Example for GK20A:
>
> gpu@0,57000000 {
> compatible = "nvidia,gk20a";
> @@ -45,3 +49,22 @@ Example:
> iommus = <&mc TEGRA_SWGROUP_GPU>;
> status = "disabled";
> };
> +
> +Example for GM20B:
> +
> + gpu@0,57000000 {
Drop the comma and leading zero.
> + compatible = "nvidia,gm20b";
> + reg = <0x0 0x57000000 0x0 0x01000000>,
> + <0x0 0x58000000 0x0 0x01000000>;
> + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "stall", "nonstall";
> + clocks = <&tegra_car TEGRA210_CLK_GPU>,
> + <&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
> + <&tegra_car TEGRA210_CLK_PLL_G_REF>;
> + clock-names = "gpu", "pwr", "ref";
> + resets = <&tegra_car 184>;
> + reset-names = "gpu";
> + iommus = <&mc TEGRA_SWGROUP_GPU>;
> + status = "disabled";
> + };
> --
> 2.7.2
>
> --
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On Sat, Mar 19, 2016 at 5:31 AM, Rob Herring <[email protected]> wrote:
> On Tue, Mar 15, 2016 at 11:58:40AM +0900, Alexandre Courbot wrote:
>> The correct compatible name is "nvidia,gk20a".
>>
>> Signed-off-by: Alexandre Courbot <[email protected]>
>> ---
>> Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Acked-by: Rob Herring <[email protected]>
>
> This may be what is used, but having the SoC name would be preferred
> assuming gk20a is in multiple SoCs.
gk20a is exclusive to t124 (and so is gm20b to t210), so there can be
no confusion here. This is why we eventually went for the shorter
compatible string (and forgot to update the DT documentation).
On Sat, Mar 19, 2016 at 5:47 AM, Rob Herring <[email protected]> wrote:
> On Tue, Mar 15, 2016 at 11:58:42AM +0900, Alexandre Courbot wrote:
>> GM20B's definition is mostly similar to GK20A's, but requires an
>> additional clock.
>>
>> Signed-off-by: Alexandre Courbot <[email protected]>
>> ---
>> .../devicetree/bindings/gpu/nvidia,gk20a.txt | 27 ++++++++++++++++++++--
>> 1 file changed, 25 insertions(+), 2 deletions(-)
>
> Acked-by: Rob Herring <[email protected]>
>
> One nit below.
>
>>
>> diff --git a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
>> index 1e3748337319..d9ad6b87fbbc 100644
>> --- a/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
>> +++ b/Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt
>> @@ -1,9 +1,10 @@
>> -NVIDIA GK20A Graphics Processing Unit
>> +NVIDIA Tegra Graphics Processing Units
>>
>> Required properties:
>> - compatible: "nvidia,<gpu>"
>> Currently recognized values:
>> - nvidia,gk20a
>> + - nvidia,gm20b
>> - reg: Physical base address and length of the controller's registers.
>> Must contain two entries:
>> - first entry for bar0
>> @@ -19,6 +20,9 @@ Required properties:
>> - clock-names: Must include the following entries:
>> - gpu
>> - pwr
>> +If the compatible string is "nvidia,gm20b", then the following clock
>> +is also required:
>> + - ref
>> - resets: Must contain an entry for each entry in reset-names.
>> See ../reset/reset.txt for details.
>> - reset-names: Must include the following entries:
>> @@ -27,7 +31,7 @@ Required properties:
>> Optional properties:
>> - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
>>
>> -Example:
>> +Example for GK20A:
>>
>> gpu@0,57000000 {
>> compatible = "nvidia,gk20a";
>> @@ -45,3 +49,22 @@ Example:
>> iommus = <&mc TEGRA_SWGROUP_GPU>;
>> status = "disabled";
>> };
>> +
>> +Example for GM20B:
>> +
>> + gpu@0,57000000 {
>
> Drop the comma and leading zero.
Even though this is how it appears in the actual DT?
On Sun, Mar 20, 2016 at 1:55 AM, Alexandre Courbot <[email protected]> wrote:
> On Sat, Mar 19, 2016 at 5:47 AM, Rob Herring <[email protected]> wrote:
>> On Tue, Mar 15, 2016 at 11:58:42AM +0900, Alexandre Courbot wrote:
>>> GM20B's definition is mostly similar to GK20A's, but requires an
>>> additional clock.
[...]
>>> gpu@0,57000000 {
>>> compatible = "nvidia,gk20a";
>>> @@ -45,3 +49,22 @@ Example:
>>> iommus = <&mc TEGRA_SWGROUP_GPU>;
>>> status = "disabled";
>>> };
>>> +
>>> +Example for GM20B:
>>> +
>>> + gpu@0,57000000 {
>>
>> Drop the comma and leading zero.
>
> Even though this is how it appears in the actual DT?
Yes, those will need to get fixed, too.
Rob
On 03/22/2016 10:41 AM, Rob Herring wrote:
> On Sun, Mar 20, 2016 at 1:55 AM, Alexandre Courbot <[email protected]> wrote:
>> On Sat, Mar 19, 2016 at 5:47 AM, Rob Herring <[email protected]> wrote:
>>> On Tue, Mar 15, 2016 at 11:58:42AM +0900, Alexandre Courbot wrote:
>>>> GM20B's definition is mostly similar to GK20A's, but requires an
>>>> additional clock.
>
> [...]
>
>>>> gpu@0,57000000 {
>>>> compatible = "nvidia,gk20a";
>>>> @@ -45,3 +49,22 @@ Example:
>>>> iommus = <&mc TEGRA_SWGROUP_GPU>;
>>>> status = "disabled";
>>>> };
>>>> +
>>>> +Example for GM20B:
>>>> +
>>>> + gpu@0,57000000 {
>>>
>>> Drop the comma and leading zero.
>>
>> Even though this is how it appears in the actual DT?
>
> Yes, those will need to get fixed, too.
Sorry, I just want to confirm that I understand why this needs to be
fixed. The parent node has #address-cells = <2>, and the practice of
specifying two cells in the node name is consistent with what I see in
http://www.devicetree.org/Device_Tree_Usage.
However in the device tree usage example one can interpret the two cells
as being two different components of the address, whereas in our case we
are using two cells because the address is 64-bit - hence we should
specify it in the name as a single entity. Is this correct?
Thanks,
Alex.
On Mon, Mar 21, 2016 at 11:00 PM, Alexandre Courbot <[email protected]> wrote:
> On 03/22/2016 10:41 AM, Rob Herring wrote:
>>
>> On Sun, Mar 20, 2016 at 1:55 AM, Alexandre Courbot <[email protected]>
>> wrote:
>>>
>>> On Sat, Mar 19, 2016 at 5:47 AM, Rob Herring <[email protected]> wrote:
>>>>
>>>> On Tue, Mar 15, 2016 at 11:58:42AM +0900, Alexandre Courbot wrote:
>>>>>
>>>>> GM20B's definition is mostly similar to GK20A's, but requires an
>>>>> additional clock.
>>
>>
>> [...]
>>
>>>>> gpu@0,57000000 {
>>>>> compatible = "nvidia,gk20a";
>>>>> @@ -45,3 +49,22 @@ Example:
>>>>> iommus = <&mc TEGRA_SWGROUP_GPU>;
>>>>> status = "disabled";
>>>>> };
>>>>> +
>>>>> +Example for GM20B:
>>>>> +
>>>>> + gpu@0,57000000 {
>>>>
>>>>
>>>> Drop the comma and leading zero.
>>>
>>>
>>> Even though this is how it appears in the actual DT?
>>
>>
>> Yes, those will need to get fixed, too.
>
>
> Sorry, I just want to confirm that I understand why this needs to be fixed.
> The parent node has #address-cells = <2>, and the practice of specifying two
> cells in the node name is consistent with what I see in
> http://www.devicetree.org/Device_Tree_Usage.
>
> However in the device tree usage example one can interpret the two cells as
> being two different components of the address, whereas in our case we are
> using two cells because the address is 64-bit - hence we should specify it
> in the name as a single entity. Is this correct?
Exactly, commas are for separating distinct fields like chip select
and offset in the wiki example. A 64-bit address is a single field.
The other reason to fix it is dtc is going to start warning for this.
Rob