Add i.MX7ULP system integration module (SIM) binding.
Signed-off-by: Anson Huang <[email protected]>
---
.../bindings/arm/freescale/fsl,imx7ulp-sim.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt
new file mode 100644
index 0000000..7d0c7f0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt
@@ -0,0 +1,16 @@
+Freescale i.MX7ULP System Integration Module
+----------------------------------------------
+The system integration module (SIM) provides system control and chip configuration
+registers. In this module, chip revision information is located in JTAG ID register,
+and a set of registers have been made available in DGO domain for SW use, with the
+objective to maintain its value between system resets.
+
+Required properties:
+- compatible: Should be "fsl,imx7ulp-sim".
+- reg: Specifies base physical address and size of the register sets.
+
+Example:
+sim: sim@410a3000 {
+ compatible = "fsl,imx7ulp-sim", "syscon";
+ reg = <0x410a3000 0x1000>;
+};
--
2.7.4
i.MX7ULP SoC's revision info is inside the SIM module,
bit[31:28] of JTAG_ID register defines revision as below
from B0:
0001 B0
0010 B1
This patch adds SoC revision support for i.MX7ULP, test
result as below:
root@imx7ulp-evk ~$ cat /sys/devices/soc0/revision
2.1
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/mach-imx/mach-imx7ulp.c | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/mach-imx/mach-imx7ulp.c b/arch/arm/mach-imx/mach-imx7ulp.c
index 19c5b30..11ac71a 100644
--- a/arch/arm/mach-imx/mach-imx7ulp.c
+++ b/arch/arm/mach-imx/mach-imx7ulp.c
@@ -6,18 +6,57 @@
*/
#include <linux/irqchip.h>
+#include <linux/mfd/syscon.h>
#include <linux/of_platform.h>
+#include <linux/regmap.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "cpuidle.h"
#include "hardware.h"
+#define SIM_JTAG_ID_REG 0x8c
+
+static void __init imx7ulp_set_revision(void)
+{
+ struct regmap *sim;
+ u32 revision;
+
+ sim = syscon_regmap_lookup_by_compatible("fsl,imx7ulp-sim");
+ if (IS_ERR(sim)) {
+ pr_warn("failed to find fsl,imx7ulp-sim regmap!\n");
+ return;
+ }
+
+ if (regmap_read(sim, SIM_JTAG_ID_REG, &revision)) {
+ pr_warn("failed to read sim regmap!\n");
+ return;
+ }
+
+ /*
+ * bit[31:28] of JTAG_ID register defines revision as below from B0:
+ * 0001 B0
+ * 0010 B1
+ */
+ switch (revision >> 28) {
+ case 1:
+ imx_set_soc_revision(IMX_CHIP_REVISION_2_0);
+ break;
+ case 2:
+ imx_set_soc_revision(IMX_CHIP_REVISION_2_1);
+ break;
+ default:
+ imx_set_soc_revision(IMX_CHIP_REVISION_1_0);
+ break;
+ }
+}
+
static void __init imx7ulp_init_machine(void)
{
imx7ulp_pm_init();
mxc_set_cpu_type(MXC_CPU_IMX7ULP);
+ imx7ulp_set_revision();
of_platform_default_populate(NULL, NULL, imx_soc_device_init());
}
--
2.7.4
i.MX7ULP SoC revision info is inside the SIM mode's JTAG_ID
register, add sim node to support SoC revision check.
Signed-off-by: Anson Huang <[email protected]>
---
arch/arm/boot/dts/imx7ulp.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index b86daf7..fca6e50 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -347,4 +347,17 @@
gpio-ranges = <&iomuxc1 0 96 32>;
};
};
+
+ m4aips1: bus@41080000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x41080000 0x80000>;
+ ranges;
+
+ sim: sim@410a3000 {
+ compatible = "fsl,imx7ulp-sim", "syscon";
+ reg = <0x410a3000 0x1000>;
+ };
+ };
};
--
2.7.4
On Fri, 11 Jan 2019 06:22:40 +0000, Anson Huang wrote:
> Add i.MX7ULP system integration module (SIM) binding.
>
> Signed-off-by: Anson Huang <[email protected]>
> ---
> .../bindings/arm/freescale/fsl,imx7ulp-sim.txt | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt
>
Reviewed-by: Rob Herring <[email protected]>
On Fri, Jan 11, 2019 at 06:22:40AM +0000, Anson Huang wrote:
> Add i.MX7ULP system integration module (SIM) binding.
>
> Signed-off-by: Anson Huang <[email protected]>
Applied all, thanks.