From: Peng Fan <[email protected]>
V2:
Keep i.MX1/2/3/5 cpu type for completness
Correct return value in patch 1/3
use CONFIG_ARM to guard compile soc-imx.c in patch 3/3
V1:
https://patchwork.kernel.org/cover/11433689/
RFC version :
https://patchwork.kernel.org/cover/11336433/
Nothing changed in v1, just rename to formal patches
Shawn,
The original concern has been eliminated in RFC discussion,
so this patchset is ready to be in next.
Thanks.
Follow i.MX8, move the soc device register code to drivers/soc/imx
to simplify arch/arm/mach-imx/cpu.c
I planned to use similar logic as soc-imx8m.c to restructure soc-imx.c
and merged the two files into one. But not sure, so still keep
the logic in cpu.c.
There is one change is the platform devices are not under
/sys/devices/soc0 after patch 1/4. Actually ARM64 platform
devices are not under /sys/devices/soc0, such as i.MX8/8M.
So it should not hurt to let the platform devices under platform dir.
Peng Fan (3):
ARM: imx: use device_initcall for imx_soc_device_init
ARM: imx: move cpu definitions into a header
soc: imx: move cpu code to drivers/soc/imx
arch/arm/mach-imx/common.h | 1 -
arch/arm/mach-imx/cpu.c | 159 -----------------------------------
arch/arm/mach-imx/mach-imx6q.c | 8 +-
arch/arm/mach-imx/mach-imx6sl.c | 8 +-
arch/arm/mach-imx/mach-imx6sx.c | 8 +-
arch/arm/mach-imx/mach-imx6ul.c | 8 +-
arch/arm/mach-imx/mach-imx7d.c | 6 --
arch/arm/mach-imx/mach-imx7ulp.c | 2 +-
arch/arm/mach-imx/mxc.h | 22 +----
drivers/soc/imx/Makefile | 3 +
drivers/soc/imx/soc-imx.c | 176 +++++++++++++++++++++++++++++++++++++++
include/soc/imx/cpu.h | 30 +++++++
12 files changed, 215 insertions(+), 216 deletions(-)
create mode 100644 drivers/soc/imx/soc-imx.c
create mode 100644 include/soc/imx/cpu.h
--
2.16.4
From: Peng Fan <[email protected]>
This is preparation to move imx_soc_device_init to drivers/soc/imx/
There is no reason to must put dt devices under /sys/devices/soc0,
they could also be under /sys/devices/platform, so we could
pass NULL as parent when calling of_platform_default_populate.
Following soc-imx8.c soc-imx-scu.c using device_initcall, need
to change return type to int type for imx_soc_device_init.
Signed-off-by: Peng Fan <[email protected]>
---
V2:
Correct return value
arch/arm/mach-imx/common.h | 1 -
arch/arm/mach-imx/cpu.c | 21 ++++++++++++++-------
arch/arm/mach-imx/mach-imx6q.c | 8 +-------
arch/arm/mach-imx/mach-imx6sl.c | 8 +-------
arch/arm/mach-imx/mach-imx6sx.c | 8 +-------
arch/arm/mach-imx/mach-imx6ul.c | 8 +-------
arch/arm/mach-imx/mach-imx7d.c | 6 ------
arch/arm/mach-imx/mach-imx7ulp.c | 2 +-
8 files changed, 19 insertions(+), 43 deletions(-)
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index db542da4fe67..707ac650f1c2 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -49,7 +49,6 @@ void imx_aips_allow_unprivileged_access(const char *compat);
int mxc_device_init(void);
void imx_set_soc_revision(unsigned int rev);
void imx_init_revision_from_anatop(void);
-struct device *imx_soc_device_init(void);
void imx6_enable_rbc(bool enable);
void imx_gpc_check_dt(void);
void imx_gpc_set_arm_power_in_lpm(bool power_off);
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 06f8d64b65af..5b969f31c9e9 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -83,7 +83,7 @@ void __init imx_aips_allow_unprivileged_access(
}
}
-struct device * __init imx_soc_device_init(void)
+static int __init imx_soc_device_init(void)
{
struct soc_device_attribute *soc_dev_attr;
const char *ocotp_compat = NULL;
@@ -97,7 +97,7 @@ struct device * __init imx_soc_device_init(void)
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
if (!soc_dev_attr)
- return NULL;
+ return -ENOMEM;
soc_dev_attr->family = "Freescale i.MX";
@@ -208,18 +208,24 @@ struct device * __init imx_soc_device_init(void)
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
(imx_soc_revision >> 4) & 0xf,
imx_soc_revision & 0xf);
- if (!soc_dev_attr->revision)
+ if (!soc_dev_attr->revision) {
+ ret = -ENOMEM;
goto free_soc;
+ }
soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
- if (!soc_dev_attr->serial_number)
+ if (!soc_dev_attr->serial_number) {
+ ret = -ENOMEM;
goto free_rev;
+ }
soc_dev = soc_device_register(soc_dev_attr);
- if (IS_ERR(soc_dev))
+ if (IS_ERR(soc_dev)) {
+ ret = PTR_ERR(soc_dev);
goto free_serial_number;
+ }
- return soc_device_to_device(soc_dev);
+ return 0;
free_serial_number:
kfree(soc_dev_attr->serial_number);
@@ -227,5 +233,6 @@ struct device * __init imx_soc_device_init(void)
kfree(soc_dev_attr->revision);
free_soc:
kfree(soc_dev_attr);
- return NULL;
+ return ret;
}
+device_initcall(imx_soc_device_init);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 284bce1112d2..85c084a716ab 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -245,21 +245,15 @@ static void __init imx6q_axi_init(void)
static void __init imx6q_init_machine(void)
{
- struct device *parent;
-
if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0)
imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0);
else
imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
imx_get_soc_revision());
- parent = imx_soc_device_init();
- if (parent == NULL)
- pr_warn("failed to initialize soc device\n");
-
imx6q_enet_phy_init();
- of_platform_default_populate(NULL, NULL, parent);
+ of_platform_default_populate(NULL, NULL, NULL);
imx_anatop_init();
cpu_is_imx6q() ? imx6q_pm_init() : imx6dl_pm_init();
diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c
index e27a6889cc56..f6e87363d605 100644
--- a/arch/arm/mach-imx/mach-imx6sl.c
+++ b/arch/arm/mach-imx/mach-imx6sl.c
@@ -45,13 +45,7 @@ static void __init imx6sl_init_late(void)
static void __init imx6sl_init_machine(void)
{
- struct device *parent;
-
- parent = imx_soc_device_init();
- if (parent == NULL)
- pr_warn("failed to initialize soc device\n");
-
- of_platform_default_populate(NULL, NULL, parent);
+ of_platform_default_populate(NULL, NULL, NULL);
if (cpu_is_imx6sl())
imx6sl_fec_init();
diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c
index d5310bf307ff..781e2a94fdd7 100644
--- a/arch/arm/mach-imx/mach-imx6sx.c
+++ b/arch/arm/mach-imx/mach-imx6sx.c
@@ -63,13 +63,7 @@ static inline void imx6sx_enet_init(void)
static void __init imx6sx_init_machine(void)
{
- struct device *parent;
-
- parent = imx_soc_device_init();
- if (parent == NULL)
- pr_warn("failed to initialize soc device\n");
-
- of_platform_default_populate(NULL, NULL, parent);
+ of_platform_default_populate(NULL, NULL, NULL);
imx6sx_enet_init();
imx_anatop_init();
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index 3b0e16ccd59d..e018e716735f 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -55,13 +55,7 @@ static inline void imx6ul_enet_init(void)
static void __init imx6ul_init_machine(void)
{
- struct device *parent;
-
- parent = imx_soc_device_init();
- if (parent == NULL)
- pr_warn("failed to initialize soc device\n");
-
- of_platform_default_populate(NULL, NULL, parent);
+ of_platform_default_populate(NULL, NULL, NULL);
imx6ul_enet_init();
imx_anatop_init();
imx6ul_pm_init();
diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c
index ebb27592a9f7..879c35929a13 100644
--- a/arch/arm/mach-imx/mach-imx7d.c
+++ b/arch/arm/mach-imx/mach-imx7d.c
@@ -78,12 +78,6 @@ static inline void imx7d_enet_init(void)
static void __init imx7d_init_machine(void)
{
- struct device *parent;
-
- parent = imx_soc_device_init();
- if (parent == NULL)
- pr_warn("failed to initialize soc device\n");
-
imx_anatop_init();
imx7d_enet_init();
}
diff --git a/arch/arm/mach-imx/mach-imx7ulp.c b/arch/arm/mach-imx/mach-imx7ulp.c
index bf22d19e02f6..445256e6a4a0 100644
--- a/arch/arm/mach-imx/mach-imx7ulp.c
+++ b/arch/arm/mach-imx/mach-imx7ulp.c
@@ -57,7 +57,7 @@ static void __init imx7ulp_init_machine(void)
mxc_set_cpu_type(MXC_CPU_IMX7ULP);
imx7ulp_set_revision();
- of_platform_default_populate(NULL, NULL, imx_soc_device_init());
+ of_platform_default_populate(NULL, NULL, NULL);
}
static const char *const imx7ulp_dt_compat[] __initconst = {
--
2.16.4
From: Peng Fan <[email protected]>
The soc device register code will be moved to drivers/soc/imx/,
the code needs the cpu type definitions. So let's move the cpu
type definitions to a header.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm/mach-imx/mxc.h | 22 +---------------------
include/soc/imx/cpu.h | 30 ++++++++++++++++++++++++++++++
2 files changed, 31 insertions(+), 21 deletions(-)
create mode 100644 include/soc/imx/cpu.h
diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h
index 2bfd2d59b4a6..fe2d0f5abfcc 100644
--- a/arch/arm/mach-imx/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
@@ -8,35 +8,15 @@
#define __ASM_ARCH_MXC_H__
#include <linux/types.h>
+#include <soc/imx/cpu.h>
#ifndef __ASM_ARCH_MXC_HARDWARE_H__
#error "Do not include directly."
#endif
-#define MXC_CPU_MX1 1
-#define MXC_CPU_MX21 21
-#define MXC_CPU_MX25 25
-#define MXC_CPU_MX27 27
-#define MXC_CPU_MX31 31
-#define MXC_CPU_MX35 35
-#define MXC_CPU_MX51 51
-#define MXC_CPU_MX53 53
-#define MXC_CPU_IMX6SL 0x60
-#define MXC_CPU_IMX6DL 0x61
-#define MXC_CPU_IMX6SX 0x62
-#define MXC_CPU_IMX6Q 0x63
-#define MXC_CPU_IMX6UL 0x64
-#define MXC_CPU_IMX6ULL 0x65
-/* virtual cpu id for i.mx6ulz */
-#define MXC_CPU_IMX6ULZ 0x6b
-#define MXC_CPU_IMX6SLL 0x67
-#define MXC_CPU_IMX7D 0x72
-#define MXC_CPU_IMX7ULP 0xff
-
#define IMX_DDR_TYPE_LPDDR2 1
#ifndef __ASSEMBLY__
-extern unsigned int __mxc_cpu_type;
#ifdef CONFIG_SOC_IMX6SL
static inline bool cpu_is_imx6sl(void)
diff --git a/include/soc/imx/cpu.h b/include/soc/imx/cpu.h
new file mode 100644
index 000000000000..0669fc08a501
--- /dev/null
+++ b/include/soc/imx/cpu.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __IMX_CPU_H__
+#define __IMX_CPU_H__
+
+#define MXC_CPU_MX1 1
+#define MXC_CPU_MX21 21
+#define MXC_CPU_MX25 25
+#define MXC_CPU_MX27 27
+#define MXC_CPU_MX31 31
+#define MXC_CPU_MX35 35
+#define MXC_CPU_MX51 51
+#define MXC_CPU_MX53 53
+#define MXC_CPU_IMX6SL 0x60
+#define MXC_CPU_IMX6DL 0x61
+#define MXC_CPU_IMX6SX 0x62
+#define MXC_CPU_IMX6Q 0x63
+#define MXC_CPU_IMX6UL 0x64
+#define MXC_CPU_IMX6ULL 0x65
+/* virtual cpu id for i.mx6ulz */
+#define MXC_CPU_IMX6ULZ 0x6b
+#define MXC_CPU_IMX6SLL 0x67
+#define MXC_CPU_IMX7D 0x72
+#define MXC_CPU_IMX7ULP 0xff
+
+#ifndef __ASSEMBLY__
+extern unsigned int __mxc_cpu_type;
+#endif
+
+#endif
--
2.16.4
From: Peng Fan <[email protected]>
Move the soc device register code to drivers/soc/imx to align with
i.MX8.
Signed-off-by: Peng Fan <[email protected]>
---
V2:
Use CONFIG_ARM to guard compile
arch/arm/mach-imx/cpu.c | 166 -------------------------------------------
drivers/soc/imx/Makefile | 3 +
drivers/soc/imx/soc-imx.c | 176 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 179 insertions(+), 166 deletions(-)
create mode 100644 drivers/soc/imx/soc-imx.c
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 5b969f31c9e9..65c7224f5250 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -1,25 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/err.h>
-#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
-#include <linux/regmap.h>
-#include <linux/slab.h>
-#include <linux/sys_soc.h>
#include "hardware.h"
#include "common.h"
-#define OCOTP_UID_H 0x420
-#define OCOTP_UID_L 0x410
-
-#define OCOTP_ULP_UID_1 0x4b0
-#define OCOTP_ULP_UID_2 0x4c0
-#define OCOTP_ULP_UID_3 0x4d0
-#define OCOTP_ULP_UID_4 0x4e0
-
unsigned int __mxc_cpu_type;
static unsigned int imx_soc_revision;
@@ -82,157 +70,3 @@ void __init imx_aips_allow_unprivileged_access(
imx_set_aips(aips_base_addr);
}
}
-
-static int __init imx_soc_device_init(void)
-{
- struct soc_device_attribute *soc_dev_attr;
- const char *ocotp_compat = NULL;
- struct soc_device *soc_dev;
- struct device_node *root;
- struct regmap *ocotp = NULL;
- const char *soc_id;
- u64 soc_uid = 0;
- u32 val;
- int ret;
-
- soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
- if (!soc_dev_attr)
- return -ENOMEM;
-
- soc_dev_attr->family = "Freescale i.MX";
-
- root = of_find_node_by_path("/");
- ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
- of_node_put(root);
- if (ret)
- goto free_soc;
-
- switch (__mxc_cpu_type) {
- case MXC_CPU_MX1:
- soc_id = "i.MX1";
- break;
- case MXC_CPU_MX21:
- soc_id = "i.MX21";
- break;
- case MXC_CPU_MX25:
- soc_id = "i.MX25";
- break;
- case MXC_CPU_MX27:
- soc_id = "i.MX27";
- break;
- case MXC_CPU_MX31:
- soc_id = "i.MX31";
- break;
- case MXC_CPU_MX35:
- soc_id = "i.MX35";
- break;
- case MXC_CPU_MX51:
- soc_id = "i.MX51";
- break;
- case MXC_CPU_MX53:
- soc_id = "i.MX53";
- break;
- case MXC_CPU_IMX6SL:
- ocotp_compat = "fsl,imx6sl-ocotp";
- soc_id = "i.MX6SL";
- break;
- case MXC_CPU_IMX6DL:
- ocotp_compat = "fsl,imx6q-ocotp";
- soc_id = "i.MX6DL";
- break;
- case MXC_CPU_IMX6SX:
- ocotp_compat = "fsl,imx6sx-ocotp";
- soc_id = "i.MX6SX";
- break;
- case MXC_CPU_IMX6Q:
- ocotp_compat = "fsl,imx6q-ocotp";
- soc_id = "i.MX6Q";
- break;
- case MXC_CPU_IMX6UL:
- ocotp_compat = "fsl,imx6ul-ocotp";
- soc_id = "i.MX6UL";
- break;
- case MXC_CPU_IMX6ULL:
- ocotp_compat = "fsl,imx6ull-ocotp";
- soc_id = "i.MX6ULL";
- break;
- case MXC_CPU_IMX6ULZ:
- ocotp_compat = "fsl,imx6ull-ocotp";
- soc_id = "i.MX6ULZ";
- break;
- case MXC_CPU_IMX6SLL:
- ocotp_compat = "fsl,imx6sll-ocotp";
- soc_id = "i.MX6SLL";
- break;
- case MXC_CPU_IMX7D:
- ocotp_compat = "fsl,imx7d-ocotp";
- soc_id = "i.MX7D";
- break;
- case MXC_CPU_IMX7ULP:
- ocotp_compat = "fsl,imx7ulp-ocotp";
- soc_id = "i.MX7ULP";
- break;
- default:
- soc_id = "Unknown";
- }
- soc_dev_attr->soc_id = soc_id;
-
- if (ocotp_compat) {
- ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat);
- if (IS_ERR(ocotp))
- pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat);
- }
-
- if (!IS_ERR_OR_NULL(ocotp)) {
- if (__mxc_cpu_type == MXC_CPU_IMX7ULP) {
- regmap_read(ocotp, OCOTP_ULP_UID_4, &val);
- soc_uid = val & 0xffff;
- regmap_read(ocotp, OCOTP_ULP_UID_3, &val);
- soc_uid <<= 16;
- soc_uid |= val & 0xffff;
- regmap_read(ocotp, OCOTP_ULP_UID_2, &val);
- soc_uid <<= 16;
- soc_uid |= val & 0xffff;
- regmap_read(ocotp, OCOTP_ULP_UID_1, &val);
- soc_uid <<= 16;
- soc_uid |= val & 0xffff;
- } else {
- regmap_read(ocotp, OCOTP_UID_H, &val);
- soc_uid = val;
- regmap_read(ocotp, OCOTP_UID_L, &val);
- soc_uid <<= 32;
- soc_uid |= val;
- }
- }
-
- soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
- (imx_soc_revision >> 4) & 0xf,
- imx_soc_revision & 0xf);
- if (!soc_dev_attr->revision) {
- ret = -ENOMEM;
- goto free_soc;
- }
-
- soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
- if (!soc_dev_attr->serial_number) {
- ret = -ENOMEM;
- goto free_rev;
- }
-
- soc_dev = soc_device_register(soc_dev_attr);
- if (IS_ERR(soc_dev)) {
- ret = PTR_ERR(soc_dev);
- goto free_serial_number;
- }
-
- return 0;
-
-free_serial_number:
- kfree(soc_dev_attr->serial_number);
-free_rev:
- kfree(soc_dev_attr->revision);
-free_soc:
- kfree(soc_dev_attr);
- return ret;
-}
-device_initcall(imx_soc_device_init);
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 103e2c93c342..446143241fe7 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -1,4 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
+ifeq ($(CONFIG_ARM),y)
+obj-$(CONFIG_ARCH_MXC) += soc-imx.o
+endif
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
diff --git a/drivers/soc/imx/soc-imx.c b/drivers/soc/imx/soc-imx.c
new file mode 100644
index 000000000000..70819e03ab1e
--- /dev/null
+++ b/drivers/soc/imx/soc-imx.c
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2020 NXP
+ */
+
+#include <linux/mfd/syscon.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/regmap.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#include <soc/imx/cpu.h>
+#include <soc/imx/revision.h>
+
+#define OCOTP_UID_H 0x420
+#define OCOTP_UID_L 0x410
+
+#define OCOTP_ULP_UID_1 0x4b0
+#define OCOTP_ULP_UID_2 0x4c0
+#define OCOTP_ULP_UID_3 0x4d0
+#define OCOTP_ULP_UID_4 0x4e0
+
+static int __init imx_soc_device_init(void)
+{
+ struct soc_device_attribute *soc_dev_attr;
+ const char *ocotp_compat = NULL;
+ struct soc_device *soc_dev;
+ struct device_node *root;
+ struct regmap *ocotp = NULL;
+ const char *soc_id;
+ u64 soc_uid = 0;
+ u32 val;
+ int ret;
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return -ENOMEM;
+
+ soc_dev_attr->family = "Freescale i.MX";
+
+ root = of_find_node_by_path("/");
+ ret = of_property_read_string(root, "model", &soc_dev_attr->machine);
+ of_node_put(root);
+ if (ret)
+ goto free_soc;
+
+ switch (__mxc_cpu_type) {
+ case MXC_CPU_MX1:
+ soc_id = "i.MX1";
+ break;
+ case MXC_CPU_MX21:
+ soc_id = "i.MX21";
+ break;
+ case MXC_CPU_MX25:
+ soc_id = "i.MX25";
+ break;
+ case MXC_CPU_MX27:
+ soc_id = "i.MX27";
+ break;
+ case MXC_CPU_MX31:
+ soc_id = "i.MX31";
+ break;
+ case MXC_CPU_MX35:
+ soc_id = "i.MX35";
+ break;
+ case MXC_CPU_MX51:
+ soc_id = "i.MX51";
+ break;
+ case MXC_CPU_MX53:
+ soc_id = "i.MX53";
+ break;
+ case MXC_CPU_IMX6SL:
+ ocotp_compat = "fsl,imx6sl-ocotp";
+ soc_id = "i.MX6SL";
+ break;
+ case MXC_CPU_IMX6DL:
+ ocotp_compat = "fsl,imx6q-ocotp";
+ soc_id = "i.MX6DL";
+ break;
+ case MXC_CPU_IMX6SX:
+ ocotp_compat = "fsl,imx6sx-ocotp";
+ soc_id = "i.MX6SX";
+ break;
+ case MXC_CPU_IMX6Q:
+ ocotp_compat = "fsl,imx6q-ocotp";
+ soc_id = "i.MX6Q";
+ break;
+ case MXC_CPU_IMX6UL:
+ ocotp_compat = "fsl,imx6ul-ocotp";
+ soc_id = "i.MX6UL";
+ break;
+ case MXC_CPU_IMX6ULL:
+ ocotp_compat = "fsl,imx6ull-ocotp";
+ soc_id = "i.MX6ULL";
+ break;
+ case MXC_CPU_IMX6ULZ:
+ ocotp_compat = "fsl,imx6ull-ocotp";
+ soc_id = "i.MX6ULZ";
+ break;
+ case MXC_CPU_IMX6SLL:
+ ocotp_compat = "fsl,imx6sll-ocotp";
+ soc_id = "i.MX6SLL";
+ break;
+ case MXC_CPU_IMX7D:
+ ocotp_compat = "fsl,imx7d-ocotp";
+ soc_id = "i.MX7D";
+ break;
+ case MXC_CPU_IMX7ULP:
+ ocotp_compat = "fsl,imx7ulp-ocotp";
+ soc_id = "i.MX7ULP";
+ break;
+ default:
+ soc_id = "Unknown";
+ }
+ soc_dev_attr->soc_id = soc_id;
+
+ if (ocotp_compat) {
+ ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat);
+ if (IS_ERR(ocotp))
+ pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat);
+ }
+
+ if (!IS_ERR_OR_NULL(ocotp)) {
+ if (__mxc_cpu_type == MXC_CPU_IMX7ULP) {
+ regmap_read(ocotp, OCOTP_ULP_UID_4, &val);
+ soc_uid = val & 0xffff;
+ regmap_read(ocotp, OCOTP_ULP_UID_3, &val);
+ soc_uid <<= 16;
+ soc_uid |= val & 0xffff;
+ regmap_read(ocotp, OCOTP_ULP_UID_2, &val);
+ soc_uid <<= 16;
+ soc_uid |= val & 0xffff;
+ regmap_read(ocotp, OCOTP_ULP_UID_1, &val);
+ soc_uid <<= 16;
+ soc_uid |= val & 0xffff;
+ } else {
+ regmap_read(ocotp, OCOTP_UID_H, &val);
+ soc_uid = val;
+ regmap_read(ocotp, OCOTP_UID_L, &val);
+ soc_uid <<= 32;
+ soc_uid |= val;
+ }
+ }
+
+ soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
+ (imx_get_soc_revision() >> 4) & 0xf,
+ imx_get_soc_revision() & 0xf);
+ if (!soc_dev_attr->revision) {
+ ret = -ENOMEM;
+ goto free_soc;
+ }
+
+ soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
+ if (!soc_dev_attr->serial_number) {
+ ret = -ENOMEM;
+ goto free_rev;
+ }
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ ret = PTR_ERR(soc_dev);
+ goto free_serial_number;
+ }
+
+ return 0;
+
+free_serial_number:
+ kfree(soc_dev_attr->serial_number);
+free_rev:
+ kfree(soc_dev_attr->revision);
+free_soc:
+ kfree(soc_dev_attr);
+ return ret;
+}
+device_initcall(imx_soc_device_init);
--
2.16.4
On Wed, Apr 29, 2020 at 05:17:20PM +0800, [email protected] wrote:
> From: Peng Fan <[email protected]>
>
> V2:
> Keep i.MX1/2/3/5 cpu type for completness
> Correct return value in patch 1/3
> use CONFIG_ARM to guard compile soc-imx.c in patch 3/3
>
> V1:
> https://patchwork.kernel.org/cover/11433689/
> RFC version :
> https://patchwork.kernel.org/cover/11336433/
>
> Nothing changed in v1, just rename to formal patches
>
> Shawn,
> The original concern has been eliminated in RFC discussion,
> so this patchset is ready to be in next.
> Thanks.
>
> Follow i.MX8, move the soc device register code to drivers/soc/imx
> to simplify arch/arm/mach-imx/cpu.c
>
> I planned to use similar logic as soc-imx8m.c to restructure soc-imx.c
> and merged the two files into one. But not sure, so still keep
> the logic in cpu.c.
>
> There is one change is the platform devices are not under
> /sys/devices/soc0 after patch 1/4. Actually ARM64 platform
> devices are not under /sys/devices/soc0, such as i.MX8/8M.
> So it should not hurt to let the platform devices under platform dir.
>
> Peng Fan (3):
> ARM: imx: use device_initcall for imx_soc_device_init
> ARM: imx: move cpu definitions into a header
> soc: imx: move cpu code to drivers/soc/imx
Applied all, thanks.
On Wed, May 20, 2020 at 8:57 AM Shawn Guo <[email protected]> wrote:
>
> On Wed, Apr 29, 2020 at 05:17:20PM +0800, [email protected] wrote:
> > From: Peng Fan <[email protected]>
> >
> > V2:
> > Keep i.MX1/2/3/5 cpu type for completness
> > Correct return value in patch 1/3
> > use CONFIG_ARM to guard compile soc-imx.c in patch 3/3
> >
> > V1:
> > https://patchwork.kernel.org/cover/11433689/
> > RFC version :
> > https://patchwork.kernel.org/cover/11336433/
> >
> > Nothing changed in v1, just rename to formal patches
> >
> > Shawn,
> > The original concern has been eliminated in RFC discussion,
> > so this patchset is ready to be in next.
> > Thanks.
> >
> > Follow i.MX8, move the soc device register code to drivers/soc/imx
> > to simplify arch/arm/mach-imx/cpu.c
> >
> > I planned to use similar logic as soc-imx8m.c to restructure soc-imx.c
> > and merged the two files into one. But not sure, so still keep
> > the logic in cpu.c.
> >
> > There is one change is the platform devices are not under
> > /sys/devices/soc0 after patch 1/4. Actually ARM64 platform
> > devices are not under /sys/devices/soc0, such as i.MX8/8M.
> > So it should not hurt to let the platform devices under platform dir.
> >
> > Peng Fan (3):
> > ARM: imx: use device_initcall for imx_soc_device_init
> > ARM: imx: move cpu definitions into a header
> > soc: imx: move cpu code to drivers/soc/imx
>
> Applied all, thanks.
Unfortunately, I have to drop this, as it turns out the series needs a
rebase onto for-next. The series conflicts with 'ARM: vf610: report
soc info via soc device' there.
Shawn
Hi Shawn,
> Subject: Re: [PATCH V2 0/3] ARM: imx: move cpu code to drivers/soc/imx
>
> On Wed, May 20, 2020 at 8:57 AM Shawn Guo <[email protected]>
> wrote:
> >
> > On Wed, Apr 29, 2020 at 05:17:20PM +0800, [email protected] wrote:
> > > From: Peng Fan <[email protected]>
> > >
> > > V2:
> > > Keep i.MX1/2/3/5 cpu type for completness Correct return value in
> > > patch 1/3 use CONFIG_ARM to guard compile soc-imx.c in patch 3/3
> > >
> > > V1:
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa
> > >
> tchwork.kernel.org%2Fcover%2F11433689%2F&data=02%7C01%7Cpen
> g.fan
> > > %40nxp.com%7C3fe49570a6824631476908d7fc6e5cd3%7C686ea1d3bc2
> b4c6fa92c
> > >
> d99c5c301635%7C0%7C0%7C637255423274738401&sdata=ELtEt3Nbg
> kUg83w4
> > > UbCftkVMu0toYDUXJy4MgLc8qbQ%3D&reserved=0
> > > RFC version :
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa
> > >
> tchwork.kernel.org%2Fcover%2F11336433%2F&data=02%7C01%7Cpen
> g.fan
> > > %40nxp.com%7C3fe49570a6824631476908d7fc6e5cd3%7C686ea1d3bc2
> b4c6fa92c
> > >
> d99c5c301635%7C0%7C0%7C637255423274738401&sdata=RE%2Fprw
> CLb7fQpY
> > > hmszlnXxTBKJVdEXsjMBrd2ZHmKc8%3D&reserved=0
> > >
> > > Nothing changed in v1, just rename to formal patches
> > >
> > > Shawn,
> > > The original concern has been eliminated in RFC discussion, so
> > > this patchset is ready to be in next.
> > > Thanks.
> > >
> > > Follow i.MX8, move the soc device register code to drivers/soc/imx
> > > to simplify arch/arm/mach-imx/cpu.c
> > >
> > > I planned to use similar logic as soc-imx8m.c to restructure
> > > soc-imx.c and merged the two files into one. But not sure, so still
> > > keep the logic in cpu.c.
> > >
> > > There is one change is the platform devices are not under
> > > /sys/devices/soc0 after patch 1/4. Actually ARM64 platform devices
> > > are not under /sys/devices/soc0, such as i.MX8/8M.
> > > So it should not hurt to let the platform devices under platform dir.
> > >
> > > Peng Fan (3):
> > > ARM: imx: use device_initcall for imx_soc_device_init
> > > ARM: imx: move cpu definitions into a header
> > > soc: imx: move cpu code to drivers/soc/imx
> >
> > Applied all, thanks.
>
> Unfortunately, I have to drop this, as it turns out the series needs a rebase
> onto for-next. The series conflicts with 'ARM: vf610: report soc info via soc
> device' there.
I just posted out v3 which rebased on latest next tree and resolved the conflicts.
Thanks,
Peng.
>
> Shawn