Hi,
Changes since v4
================
1. Drop drive-strength (included by common TLMM node).
Changes since v3
================
1. All patches with subject: "use common TLMM schema":
Drop properties and required items which are already provided by common TLMM
schema.
The change against v3 is non-trivial, however I retained reviewed-by tags.
2. Add Rb tags.
Changes since v2
================
1. ipq6018-cp01-c1: do not switch to blsp1 (Robert).
2. pinctrl: qcom,ipq6018: correct BLSP6->BLSP0 functions: new patch.
3. Drop quotes from $ref when not needed (Rob).
4. Add Rb tags. Few patches from v1 got review from Rob, but I changed them in
v2 significantly, so I did not keep these Rb tags.
Changes since v1
================
v1: https://lore.kernel.org/linux-devicetree/[email protected]/T/#t
1. As Stephan suggested, move check for function on non-GPIO pins to common
TLMM schema. This affects few commits in the set named:
"use common TLMM schema"
"do not require function on non-GPIOs"
Overview
========
This is the third, independent patchset around Qualcomm pinctrl in recent days:
1. First round of TLMM fixes: merged
2. LPASS fixes:
https://lore.kernel.org/linux-devicetree/[email protected]/T/#t
3. ARMv7 TLMM fixes: *THIS PATCHSET*
4. ARMv8 remaining TLMM fixes:
https://lore.kernel.org/linux-devicetree/[email protected]/
5. Fifth clean - styles and using common TLMM schema:
https://lore.kernel.org/linux-arm-msm/[email protected]/T/#m277d25a5f3e9d10ca8221a7fba62ca468a67a60b
Dependencies
============
1. No dependencies.
2. dt-bindings are independent of DTS patches.
Best regards,
Krzysztof
Krzysztof Kozlowski (34):
arm64: dts: qcom: ipq6018-cp01-c1: use BLSPI1 pins
arm64: dts: qcom: ipq6018: align TLMM pin configuration with DT schema
ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl
ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema
ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema
ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema
dt-bindings: pinctrl: qcom,tlmm-common: add common check for function
dt-bindings: pinctrl: qcom,ipq6018: add qpic_pad function
dt-bindings: pinctrl: qcom,ipq6018: correct BLSP6->BLSP0 functions
dt-bindings: pinctrl: qcom,ipq6018: increase number of pins in pinmux
dt-bindings: pinctrl: qcom,ipq6018: fix matching pin config
dt-bindings: pinctrl: qcom,ipq6018: use common TLMM schema
dt-bindings: pinctrl: qcom,ipq6018: fix indentation in example
dt-bindings: pinctrl: qcom,msm8226: fix matching pin config
dt-bindings: pinctrl: qcom,msm8226: use common TLMM schema
dt-bindings: pinctrl: qcom,msm8226: add functions and input-enable
dt-bindings: pinctrl: qcom,msm8226: fix indentation in example
dt-bindings: pinctrl: qcom,msm8909-tlmm: fix matching pin config
dt-bindings: pinctrl: qcom,msm8909-tlmm: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,msm8909-tlmm: fix indentation in example
dt-bindings: pinctrl: qcom,msm8953: fix matching pin config
dt-bindings: pinctrl: qcom,msm8953: use common TLMM schema
dt-bindings: pinctrl: qcom,msm8953: fix indentation in example
dt-bindings: pinctrl: qcom,mdm9607: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,mdm9607: fix indentation in example
dt-bindings: pinctrl: qcom,qcm2290: fix matching pin config
dt-bindings: pinctrl: qcom,qcm2290: use common TLMM schema
dt-bindings: pinctrl: qcom,sdx55: fix matching pin config
dt-bindings: pinctrl: qcom,sdx55: use common TLMM schema
dt-bindings: pinctrl: qcom,sdx55: fix indentation in example
dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
dt-bindings: pinctrl: qcom,sdx65: use common TLMM schema
dt-bindings: pinctrl: qcom,sc7280: fix matching pin config
dt-bindings: pinctrl: qcom,sc8280xp: fix indentation in example
(remaining piece)
.../pinctrl/qcom,ipq6018-pinctrl.yaml | 106 +++++++-----------
.../pinctrl/qcom,mdm9607-pinctrl.yaml | 23 ++--
.../pinctrl/qcom,msm8226-pinctrl.yaml | 98 +++++++---------
.../bindings/pinctrl/qcom,msm8909-tlmm.yaml | 64 +++++------
.../pinctrl/qcom,msm8953-pinctrl.yaml | 92 ++++++---------
.../pinctrl/qcom,qcm2290-pinctrl.yaml | 52 ++-------
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 14 ++-
.../pinctrl/qcom,sc8280xp-pinctrl.yaml | 4 +-
.../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 90 ++++++---------
.../bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 50 +++------
.../bindings/pinctrl/qcom,tlmm-common.yaml | 20 +++-
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 6 +-
arch/arm/boot/dts/qcom-msm8226.dtsi | 24 ++--
.../qcom-msm8974-lge-nexus5-hammerhead.dts | 30 ++---
.../boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 45 +++-----
arch/arm/boot/dts/qcom-sdx55.dtsi | 1 +
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 6 +-
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 +-
18 files changed, 296 insertions(+), 433 deletions(-)
--
2.34.1
DT schema expects TLMM pin configuration nodes to be named with
'-state' suffix and their optional children with '-pins' suffix.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 ++--
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index 6a716c83e5f1..ec999f972360 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -51,13 +51,13 @@ flash@0 {
};
&tlmm {
- i2c_1_pins: i2c-1-pins {
+ i2c_1_pins: i2c-1-state {
pins = "gpio42", "gpio43";
function = "blsp2_i2c";
drive-strength = <8>;
};
- spi_0_pins: spi-0-pins {
+ spi_0_pins: spi-0-state {
pins = "gpio38", "gpio39", "gpio40", "gpio41";
function = "blsp0_spi";
drive-strength = <8>;
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index a7c7ca980a71..9b9f778090e1 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -218,14 +218,14 @@ tlmm: pinctrl@1000000 {
interrupt-controller;
#interrupt-cells = <2>;
- serial_3_pins: serial3-pinmux {
+ serial_3_pins: serial3-state {
pins = "gpio44", "gpio45";
function = "blsp2_uart";
drive-strength = <8>;
bias-pull-down;
};
- qpic_pins: qpic-pins {
+ qpic_pins: qpic-state {
pins = "gpio1", "gpio3", "gpio4",
"gpio5", "gpio6", "gpio7",
"gpio8", "gpio10", "gpio11",
--
2.34.1
Bindings example should be indented with 4-spaces.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../pinctrl/qcom,mdm9607-pinctrl.yaml | 22 +++++++++----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
index 57a4fed55de7..a37b358715a3 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
@@ -120,14 +120,14 @@ patternProperties:
examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- tlmm: pinctrl@1000000 {
- compatible = "qcom,mdm9607-tlmm";
- reg = <0x01000000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- gpio-ranges = <&msmgpio 0 0 80>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ tlmm: pinctrl@1000000 {
+ compatible = "qcom,mdm9607-tlmm";
+ reg = <0x01000000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ gpio-ranges = <&msmgpio 0 0 80>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
--
2.34.1
The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4
and sdc3 functions and DTS already uses it:
qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ...
qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed:
'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
index 8e634d07eb67..1d89bc85c3d9 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -65,19 +65,17 @@ $defs:
Specify the alternative function to be configured for the specified
pins. Functions are only valid for gpio pins.
enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,
- blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1,
+ blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_spi1,
blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
- blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]
+ blsp_uart3, blsp_uart4, blsp_uart5, cam_mclk0, cam_mclk1, sdc3,
+ wlan ]
bias-pull-down: true
-
bias-pull-up: true
-
bias-disable: true
drive-strength: true
-
+ input-enable: true
output-high: true
-
output-low: true
required:
--
2.34.1
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
index cdfcf29dffee..0f796f1f0104 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
@@ -49,8 +49,10 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sdx65-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sdx65-tlmm-state"
+ additionalProperties: false
+
'$defs':
qcom-sdx65-tlmm-state:
type: object
@@ -175,13 +177,13 @@ examples:
};
uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio4";
function = "blsp_uart1";
bias-pull-up;
};
- tx {
+ tx-pins {
pins = "gpio5";
function = "blsp_uart1";
bias-disable;
--
2.34.1
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes since v4:
1. Drop drive-strength (included by common TLMM node).
Changes since v3:
1. Drop properties and required items which are already provided by
common TLMM schema.
---
.../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 44 +++----------------
1 file changed, 7 insertions(+), 37 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
index fff57abf4fbc..8ef3dce33db2 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
@@ -21,26 +21,12 @@ properties:
description: Specifies the base address and size of the TLMM register space
maxItems: 1
- interrupts:
- description: Specifies the TLMM summary IRQ
- maxItems: 1
-
+ interrupts: true
interrupt-controller: true
-
- '#interrupt-cells':
- description: Specifies the PIN numbers and Flags, as defined in
- include/dt-bindings/interrupt-controller/irq.h
- const: 2
-
+ "#interrupt-cells": true
gpio-controller: true
-
- '#gpio-cells':
- description: Specifying the pin number and flags, as defined in
- include/dt-bindings/gpio/gpio.h
- const: 2
-
- gpio-ranges:
- maxItems: 1
+ "#gpio-cells": true
+ gpio-ranges: true
gpio-reserved-ranges:
maxItems: 1
@@ -60,7 +46,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
@@ -104,40 +90,24 @@ $defs:
uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present,
uim2_reset, usb2phy_ac, vsense_trigger ]
- drive-strength:
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
- default: 2
- description:
- Selects the drive strength for the specified pins, in mA.
-
bias-pull-down: true
-
bias-pull-up: true
-
bias-disable: true
-
+ drive-strength: true
output-high: true
-
output-low: true
required:
- pins
- - function
additionalProperties: false
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
required:
- compatible
- reg
- - interrupts
- - interrupt-controller
- - '#interrupt-cells'
- - gpio-controller
- - '#gpio-cells'
- - gpio-ranges
additionalProperties: false
--
2.34.1
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes since v4:
1. Drop drive-strength (included by common TLMM node).
Changes since v3:
1. Drop properties and required items which are already provided by
common TLMM schema.
---
.../pinctrl/qcom,ipq6018-pinctrl.yaml | 45 +++----------------
1 file changed, 7 insertions(+), 38 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
index 735a8786cb13..6c6b14d1efea 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
@@ -20,27 +20,12 @@ properties:
reg:
maxItems: 1
- interrupts:
- description: Specifies the TLMM summary IRQ
- maxItems: 1
-
+ interrupts: true
interrupt-controller: true
-
- '#interrupt-cells':
- description:
- Specifies the PIN numbers and Flags, as defined in defined in
- include/dt-bindings/interrupt-controller/irq.h
- const: 2
-
+ "#interrupt-cells": true
gpio-controller: true
-
- '#gpio-cells':
- description: Specifying the pin number and flags, as defined in
- include/dt-bindings/gpio/gpio.h
- const: 2
-
- gpio-ranges:
- maxItems: 1
+ "#gpio-cells": true
+ gpio-ranges: true
patternProperties:
"-state$":
@@ -56,7 +41,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
@@ -103,40 +88,24 @@ $defs:
sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2,
uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
- drive-strength:
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
- default: 2
- description:
- Selects the drive strength for the specified pins, in mA.
-
bias-pull-down: true
-
bias-pull-up: true
-
bias-disable: true
-
+ drive-strength: true
output-high: true
-
output-low: true
required:
- pins
- - function
additionalProperties: false
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
required:
- compatible
- reg
- - interrupts
- - interrupt-controller
- - '#interrupt-cells'
- - gpio-controller
- - '#gpio-cells'
- - gpio-ranges
additionalProperties: false
--
2.34.1
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changes since v4:
1. Drop drive-strength (included by common TLMM node).
Changes since v3:
1. Drop properties and required items which are already provided by
common TLMM schema.
---
.../pinctrl/qcom,msm8226-pinctrl.yaml | 40 ++++---------------
1 file changed, 7 insertions(+), 33 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
index ecb90c77f666..8e634d07eb67 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -21,26 +21,12 @@ properties:
description: Specifies the base address and size of the TLMM register space
maxItems: 1
- interrupts:
- description: Specifies the TLMM summary IRQ
- maxItems: 1
-
+ interrupts: true
interrupt-controller: true
-
- '#interrupt-cells':
- description: Specifies the PIN numbers and Flags, as defined in
- include/dt-bindings/interrupt-controller/irq.h
- const: 2
-
+ "#interrupt-cells": true
gpio-controller: true
-
- '#gpio-cells':
- description: Specifying the pin number and flags, as defined in
- include/dt-bindings/gpio/gpio.h
- const: 2
-
- gpio-ranges:
- maxItems: 1
+ "#gpio-cells": true
+ gpio-ranges: true
gpio-reserved-ranges:
maxItems: 1
@@ -60,7 +46,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
@@ -83,17 +69,12 @@ $defs:
blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]
- drive-strength:
- enum: [2, 4, 6, 8, 10, 12, 14, 16]
- default: 2
- description:
- Selects the drive strength for the specified pins, in mA.
-
bias-pull-down: true
bias-pull-up: true
bias-disable: true
+ drive-strength: true
output-high: true
@@ -101,22 +82,15 @@ $defs:
required:
- pins
- - function
additionalProperties: false
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
required:
- compatible
- reg
- - interrupts
- - interrupt-controller
- - '#interrupt-cells'
- - gpio-controller
- - '#gpio-cells'
- - gpio-ranges
additionalProperties: false
--
2.34.1
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../bindings/pinctrl/qcom,qcm2290-pinctrl.yaml | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml
index 3f4f1c0360b5..5324b61eb4f7 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml
@@ -50,8 +50,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-qcm2290-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-qcm2290-tlmm-state"
+ additionalProperties: false
'$defs':
qcom-qcm2290-tlmm-state:
@@ -146,19 +147,19 @@ examples:
gpio-ranges = <&tlmm 0 0 127>;
sdc2_on_state: sdc2-on-state {
- clk {
+ clk-pins {
pins = "sdc2_clk";
bias-disable;
drive-strength = <16>;
};
- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
- data {
+ data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
--
2.34.1
On Sun, 16 Oct 2022 13:00:13 -0400, Krzysztof Kozlowski wrote:
> Reference common Qualcomm TLMM pin controller schema, to bring common
> properties, other pinctrl schemas and additional checks, like function
> required only for GPIOs.
>
>
Applied, thanks!
[12/34] dt-bindings: pinctrl: qcom,ipq6018: use common TLMM schema
https://git.kernel.org/krzk/linux-dt/c/0a1879f298b2d160173994ea34ea0ca096241f48
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Sun, 16 Oct 2022 13:00:16 -0400, Krzysztof Kozlowski wrote:
> Reference common Qualcomm TLMM pin controller schema, to bring common
> properties, other pinctrl schemas and additional checks, like function
> required only for GPIOs.
>
>
Applied, thanks!
[15/34] dt-bindings: pinctrl: qcom,msm8226: use common TLMM schema
https://git.kernel.org/krzk/linux-dt/c/4799452e1823c6c9ca8b05d47e116871b0c5921f
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Sun, 16 Oct 2022 13:00:17 -0400, Krzysztof Kozlowski wrote:
> The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4
> and sdc3 functions and DTS already uses it:
>
> qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ...
> qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed:
> 'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> [...]
Applied, thanks!
[16/34] dt-bindings: pinctrl: qcom,msm8226: add functions and input-enable
https://git.kernel.org/krzk/linux-dt/c/ca3a311c3a8db80ec3965d9ac02499f9536d3393
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Sun, 16 Oct 2022 13:00:30 -0400, Krzysztof Kozlowski wrote:
> Reference common Qualcomm TLMM pin controller schema, to bring common
> properties, other pinctrl schemas and additional checks, like function
> required only for GPIOs.
>
>
Applied, thanks!
[29/34] dt-bindings: pinctrl: qcom,sdx55: use common TLMM schema
https://git.kernel.org/krzk/linux-dt/c/fd583a4f6db479a8e3f4ed3390b1cc3c258ace63
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Sun, 16 Oct 2022 13:00:32 -0400, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
>
Applied, thanks!
[31/34] dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/c535fe66f4a5df69c57faca1fc04a6c1b50240b9
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Sun, 16 Oct 2022 13:00:26 -0400, Krzysztof Kozlowski wrote:
> Bindings example should be indented with 4-spaces.
>
>
Applied, thanks!
[25/34] dt-bindings: pinctrl: qcom,mdm9607: fix indentation in example
https://git.kernel.org/krzk/linux-dt/c/9fb8c097b933c42b15c0c67d52c24e26e2fc7c34
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Sun, 16 Oct 2022 13:00:27 -0400, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
>
Applied, thanks!
[26/34] dt-bindings: pinctrl: qcom,qcm2290: fix matching pin config
https://git.kernel.org/krzk/linux-dt/c/7d3da666f2c0f9416f6d1a2c436b87a6d9f61e79
Best regards,
--
Krzysztof Kozlowski <[email protected]>
On Sun, 16 Oct 2022 13:00:01 -0400, Krzysztof Kozlowski wrote:
> Changes since v4
> ================
> 1. Drop drive-strength (included by common TLMM node).
>
> Changes since v3
> ================
> 1. All patches with subject: "use common TLMM schema":
> Drop properties and required items which are already provided by common TLMM
> schema.
> The change against v3 is non-trivial, however I retained reviewed-by tags.
> 2. Add Rb tags.
>
> [...]
Applied, thanks!
[03/34] ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl
commit: 0139f183bcddcf5b36f805254bb0f0625963f783
[04/34] ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema
commit: bda79af488a3e75769433fb961800c39bb07b29c
[05/34] ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema
commit: df9c86025510c45a6d90669347129e8000e1bbbc
[06/34] ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema
commit: 6cd72414abc7345e277fcab5e1c763c3a017dc6a
Best regards,
--
Bjorn Andersson <[email protected]>