2023-11-22 07:13:21

by Can Guo

[permalink] [raw]
Subject: [PATCH v3 00/11] Enable HS-G5 support on SM8550

This series enables HS-G5 support on SM8550.

This series is rebased on below changes from Mani -
https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/
https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/

This series is tested on below HW combinations -
SM8550 MTP + UFS4.0
SM8550 QRD + UFS3.1
SM8450 MTP + UFS3.1 (for regression test)
SM8350 MTP + UFS3.1 (for regression test)

Note that during reboot test on above platforms, I occasinally hit PA (PHY)
error during the 2nd init, this is not related with this series. A fix for
this is mentioned in below patchwork -

https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/

Also note that on platforms, which have two sets of UFS PHY settings are
provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY settings are
basically programming different values to different registers, mixing the
two sets and/or overwriting one set with another set is definitely not
blessed by UFS PHY designers. For SM8550, this series will make sure we
honor the rule. However, for old targets Mani and I will fix them in
another series in future.

v2 -> v3:
1. Addressed comments from Andrew, Mani and Bart in patch #1
2. Added patch #2 as per request from Andrew and Mani
3. Added patch #4 to fix a common issue on old targets, it is not necessary
for this series, but put in this series only because it would be easier
to maintain and no need to rebase
4. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c

v1 -> v2:
1. Removed 2 changes which were exposing power info in sysfs
2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h
3. Added one new change (the 1st one) to clean up usage of ufs_dev_params based on comments from Mani
4. Adjusted the logic of UFS device version detection according to comments from Mani:
4.1 For HW version < 0x5, go through dual init
4.2 For HW version >= 0x5
a. If UFS device version is populated, one init is required
b. If UFS device version is not populated, go through dual init

Bao D. Nguyen (1):
scsi: ufs: ufs-qcom: Add support for UFS device version detection

Can Guo (10):
scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
scsi: ufs: ufs-qcom: No need to set hs_rate after
ufshcd_init_host_param()
scsi: ufs: ufs-qcom: Setup host power mode during init
scsi: ufs: ufs-qcom: Limit negotiated gear to selected PHY gear
scsi: ufs: ufs-qcom: Allow the first init start with the maximum
supported gear
scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 5
and newer
phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
phy: qualcomm: phy-qcom-qmp-ufs: Use tbls_hs_max instead of tbls_hs_g4
phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for
SM8550

drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h | 2 +
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h | 2 +
.../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h | 12 ++
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 171 ++++++++++++++++-----
drivers/ufs/host/ufs-exynos.c | 7 +-
drivers/ufs/host/ufs-hisi.c | 11 +-
drivers/ufs/host/ufs-mediatek.c | 12 +-
drivers/ufs/host/ufs-qcom.c | 92 ++++++++---
drivers/ufs/host/ufs-qcom.h | 5 +-
drivers/ufs/host/ufshcd-pltfrm.c | 69 ++++-----
drivers/ufs/host/ufshcd-pltfrm.h | 10 +-
11 files changed, 275 insertions(+), 118 deletions(-)

--
2.7.4


2023-11-22 07:13:25

by Can Guo

[permalink] [raw]
Subject: [PATCH v3 02/11] scsi: ufs: ufs-qcom: No need to set hs_rate after ufshcd_init_host_param()

In ufs_qcom_pwr_change_notify(), host_params.hs_rate has been set to
PA_HS_MODE_B by ufshcd_init_host_param(), hence remove the duplicated line
of work. Meanwhile, removed the macro UFS_QCOM_LIMIT_HS_RATE as it is only
used here.

Signed-off-by: Can Guo <[email protected]>
---
drivers/ufs/host/ufs-qcom.c | 1 -
drivers/ufs/host/ufs-qcom.h | 2 --
2 files changed, 3 deletions(-)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index aee66a3..cc30ad9 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -909,7 +909,6 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba,
switch (status) {
case PRE_CHANGE:
ufshcd_init_host_param(&host_params);
- host_params.hs_rate = UFS_QCOM_LIMIT_HS_RATE;

/* This driver only supports symmetic gear setting i.e., hs_tx_gear == hs_rx_gear */
host_params.hs_tx_gear = host_params.hs_rx_gear = ufs_qcom_get_hs_gear(hba);
diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h
index 9950a00..82cd143 100644
--- a/drivers/ufs/host/ufs-qcom.h
+++ b/drivers/ufs/host/ufs-qcom.h
@@ -27,8 +27,6 @@
#define SLOW 1
#define FAST 2

-#define UFS_QCOM_LIMIT_HS_RATE PA_HS_MODE_B
-
/* QCOM UFS host controller vendor specific registers */
enum {
REG_UFS_SYS1CLK_1US = 0xC0,
--
2.7.4

2023-11-22 07:13:30

by Can Guo

[permalink] [raw]
Subject: [PATCH v3 05/11] scsi: ufs: ufs-qcom: Allow the first init start with the maximum supported gear

During host driver init, the phy_gear is set to the minimum supported gear
(HS_G2). Then, during the first power mode change, the negotiated gear, say
HS-G4, is updated to the phy_gear variable so that in the second init the
updated phy_gear can be used to program the PHY.

But the current code only allows update the phy_gear to a higher value. If
one wants to start the first init with the maximum support gear, say HS-G4,
the phy_gear is not updated to HS-G3 if the device only supports HS-G3.

The original check added there is intend to make sure the phy_gear won't be
updated when gear is scaled down (during clock scaling). Update the check
so that one can start the first init with the maximum support gear without
breaking the original fix by checking the ufshcd_state, that is, allow
update to phy_gear only if power mode change is invoked from
ufshcd_probe_hba().

This change is a preparation patch for the next patches in the same series.

Signed-off-by: Can Guo <[email protected]>
---
drivers/ufs/host/ufs-qcom.c | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index d4edf58..9613ad9 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -916,16 +916,19 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba,
}

/*
- * Update phy_gear only when the gears are scaled to a higher value. This is
- * because, the PHY gear settings are backwards compatible and we only need to
- * change the PHY gear settings while scaling to higher gears.
+ * During UFS driver probe, always update the PHY gear to match the negotiated
+ * gear, so that, if quirk UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH is enabled,
+ * the second init can program the optimal PHY settings. This allows one to start
+ * the first init with either the minimum or the maximum support gear.
*/
- if (dev_req_params->gear_tx > host->phy_gear) {
+ if (hba->ufshcd_state == UFSHCD_STATE_RESET) {
u32 old_phy_gear = host->phy_gear;

host->phy_gear = dev_req_params->gear_tx;
- dev_req_params->gear_tx = old_phy_gear;
- dev_req_params->gear_rx = old_phy_gear;
+ if (dev_req_params->gear_tx > old_phy_gear) {
+ dev_req_params->gear_tx = old_phy_gear;
+ dev_req_params->gear_rx = old_phy_gear;
+ }
}

/* enable the device ref clock before changing to HS mode */
--
2.7.4

2023-11-22 07:13:31

by Can Guo

[permalink] [raw]
Subject: [PATCH v3 07/11] scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 5 and newer

Set the initial PHY gear to max HS gear for hosts with HW ver 5 and newer.

This patch is not changing any functionalities or logic but only a
preparation patch for the next patch in this series.

Signed-off-by: Can Guo <[email protected]>
---
drivers/ufs/host/ufs-qcom.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index 6756f8d..7bbccf4 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -1067,6 +1067,20 @@ static void ufs_qcom_advertise_quirks(struct ufs_hba *hba)
hba->quirks |= UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH;
}

+static void ufs_qcom_set_phy_gear(struct ufs_qcom_host *host)
+{
+ struct ufs_host_params *host_params = &host->host_params;
+
+ host->phy_gear = host_params->hs_tx_gear;
+
+ /*
+ * Power up the PHY using the minimum supported gear (UFS_HS_G2).
+ * Switching to max gear will be performed during reinit if supported.
+ */
+ if (host->hw_ver.major < 0x5)
+ host->phy_gear = UFS_HS_G2;
+}
+
static void ufs_qcom_set_host_params(struct ufs_hba *hba)
{
struct ufs_qcom_host *host = ufshcd_get_variant(hba);
@@ -1303,6 +1317,7 @@ static int ufs_qcom_init(struct ufs_hba *hba)
ufs_qcom_set_caps(hba);
ufs_qcom_advertise_quirks(hba);
ufs_qcom_set_host_params(hba);
+ ufs_qcom_set_phy_gear(host);

err = ufs_qcom_ice_init(host);
if (err)
@@ -1320,12 +1335,6 @@ static int ufs_qcom_init(struct ufs_hba *hba)
dev_warn(dev, "%s: failed to configure the testbus %d\n",
__func__, err);

- /*
- * Power up the PHY using the minimum supported gear (UFS_HS_G2).
- * Switching to max gear will be performed during reinit if supported.
- */
- host->phy_gear = UFS_HS_G2;
-
return 0;

out_variant_clear:
--
2.7.4

2023-11-22 07:17:12

by Can Guo

[permalink] [raw]
Subject: [PATCH v3 06/11] scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5

Qcom UFS hosts, with HW ver 5, can only support up to HS-G5 Rate-A due to
HW limitations. If the HS-G5 PHY gear is used, update host_params->hs_rate
to Rate-A, so that the subsequent power mode changes shall stick to Rate-A.

Signed-off-by: Can Guo <[email protected]>
---
drivers/ufs/host/ufs-qcom.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index 9613ad9..6756f8d 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -442,9 +442,25 @@ static u32 ufs_qcom_get_hs_gear(struct ufs_hba *hba)
static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
{
struct ufs_qcom_host *host = ufshcd_get_variant(hba);
+ struct ufs_host_params *host_params = &host->host_params;
struct phy *phy = host->generic_phy;
+ enum phy_mode mode;
int ret;

+ /*
+ * HW ver 5 can only support up to HS-G5 Rate-A due to HW limitations.
+ * If the HS-G5 PHY gear is used, update host_params->hs_rate to Rate-A,
+ * so that the subsequent power mode change shall stick to Rate-A.
+ */
+ if (host->hw_ver.major == 0x5) {
+ if (host->phy_gear == UFS_HS_G5)
+ host_params->hs_rate = PA_HS_MODE_A;
+ else
+ host_params->hs_rate = PA_HS_MODE_B;
+ }
+
+ mode = host_params->hs_rate == PA_HS_MODE_B ? PHY_MODE_UFS_HS_B : PHY_MODE_UFS_HS_A;
+
/* Reset UFS Host Controller and PHY */
ret = ufs_qcom_host_reset(hba);
if (ret)
@@ -459,7 +475,7 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
return ret;
}

- phy_set_mode_ext(phy, PHY_MODE_UFS_HS_B, host->phy_gear);
+ phy_set_mode_ext(phy, mode, host->phy_gear);

/* power on phy - start serdes and phy's power and clocks */
ret = phy_power_on(phy);
--
2.7.4

2023-11-22 07:17:22

by Can Guo

[permalink] [raw]
Subject: [PATCH v3 04/11] scsi: ufs: ufs-qcom: Limit negotiated gear to selected PHY gear

In the dual init scenario, the initial PHY gear is set to HS-G2, and the
first Power Mode Change (PMC) is meant to find the best matching PHY gear
for the 2nd init. However, for the first PMC, if the negotiated gear (say
HS-G4) is higher than the initial PHY gear, we cannot go ahead let PMC to
the negotiated gear happen, because the programmed UFS PHY settings may not
support the negotiated gear. Fix it by overwriting the negotiated gear with
the PHY gear.

Signed-off-by: Can Guo <[email protected]>
---
drivers/ufs/host/ufs-qcom.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index cc0eb37..d4edf58 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -920,8 +920,13 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba,
* because, the PHY gear settings are backwards compatible and we only need to
* change the PHY gear settings while scaling to higher gears.
*/
- if (dev_req_params->gear_tx > host->phy_gear)
+ if (dev_req_params->gear_tx > host->phy_gear) {
+ u32 old_phy_gear = host->phy_gear;
+
host->phy_gear = dev_req_params->gear_tx;
+ dev_req_params->gear_tx = old_phy_gear;
+ dev_req_params->gear_rx = old_phy_gear;
+ }

/* enable the device ref clock before changing to HS mode */
if (!ufshcd_is_hs_mode(&hba->pwr_info) &&
--
2.7.4

2023-11-22 16:17:42

by Andrew Halaney

[permalink] [raw]
Subject: Re: [PATCH v3 00/11] Enable HS-G5 support on SM8550

On Tue, Nov 21, 2023 at 11:10:31PM -0800, Can Guo wrote:
> This series enables HS-G5 support on SM8550.
>
> This series is rebased on below changes from Mani -
> https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/
> https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/
>
> This series is tested on below HW combinations -
> SM8550 MTP + UFS4.0
> SM8550 QRD + UFS3.1
> SM8450 MTP + UFS3.1 (for regression test)
> SM8350 MTP + UFS3.1 (for regression test)
>
> Note that during reboot test on above platforms, I occasinally hit PA (PHY)
> error during the 2nd init, this is not related with this series. A fix for
> this is mentioned in below patchwork -
>
> https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/
>
> Also note that on platforms, which have two sets of UFS PHY settings are
> provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY settings are
> basically programming different values to different registers, mixing the
> two sets and/or overwriting one set with another set is definitely not
> blessed by UFS PHY designers. For SM8550, this series will make sure we
> honor the rule. However, for old targets Mani and I will fix them in
> another series in future.
>
> v2 -> v3:
> 1. Addressed comments from Andrew, Mani and Bart in patch #1
> 2. Added patch #2 as per request from Andrew and Mani
> 3. Added patch #4 to fix a common issue on old targets, it is not necessary
> for this series, but put in this series only because it would be easier
> to maintain and no need to rebase
> 4. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c
>
> v1 -> v2:
> 1. Removed 2 changes which were exposing power info in sysfs
> 2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h
> 3. Added one new change (the 1st one) to clean up usage of ufs_dev_params based on comments from Mani
> 4. Adjusted the logic of UFS device version detection according to comments from Mani:
> 4.1 For HW version < 0x5, go through dual init
> 4.2 For HW version >= 0x5
> a. If UFS device version is populated, one init is required
> b. If UFS device version is not populated, go through dual init

The cover letter didn't include [email protected], which
made me have to go searching for this on lore to see what had changed
in the rest of the series I received as a member of that mailing list.

Going forward please try and include that mailing list!

>
> Bao D. Nguyen (1):
> scsi: ufs: ufs-qcom: Add support for UFS device version detection
>
> Can Guo (10):
> scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
> scsi: ufs: ufs-qcom: No need to set hs_rate after
> ufshcd_init_host_param()
> scsi: ufs: ufs-qcom: Setup host power mode during init
> scsi: ufs: ufs-qcom: Limit negotiated gear to selected PHY gear
> scsi: ufs: ufs-qcom: Allow the first init start with the maximum
> supported gear
> scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
> scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 5
> and newer
> phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
> phy: qualcomm: phy-qcom-qmp-ufs: Use tbls_hs_max instead of tbls_hs_g4
> phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for
> SM8550
>
> drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h | 2 +
> drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h | 2 +
> .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h | 12 ++
> drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 171 ++++++++++++++++-----
> drivers/ufs/host/ufs-exynos.c | 7 +-
> drivers/ufs/host/ufs-hisi.c | 11 +-
> drivers/ufs/host/ufs-mediatek.c | 12 +-
> drivers/ufs/host/ufs-qcom.c | 92 ++++++++---
> drivers/ufs/host/ufs-qcom.h | 5 +-
> drivers/ufs/host/ufshcd-pltfrm.c | 69 ++++-----
> drivers/ufs/host/ufshcd-pltfrm.h | 10 +-
> 11 files changed, 275 insertions(+), 118 deletions(-)
>
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

2023-11-23 07:14:14

by Can Guo

[permalink] [raw]
Subject: Re: [PATCH v3 00/11] Enable HS-G5 support on SM8550



On 11/23/2023 12:17 AM, Andrew Halaney wrote:
> On Tue, Nov 21, 2023 at 11:10:31PM -0800, Can Guo wrote:
>> This series enables HS-G5 support on SM8550.
>>
>> This series is rebased on below changes from Mani -
>> https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/
>> https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/
>>
>> This series is tested on below HW combinations -
>> SM8550 MTP + UFS4.0
>> SM8550 QRD + UFS3.1
>> SM8450 MTP + UFS3.1 (for regression test)
>> SM8350 MTP + UFS3.1 (for regression test)
>>
>> Note that during reboot test on above platforms, I occasinally hit PA (PHY)
>> error during the 2nd init, this is not related with this series. A fix for
>> this is mentioned in below patchwork -
>>
>> https://patchwork.kernel.org/project/linux-scsi/patch/[email protected]/
>>
>> Also note that on platforms, which have two sets of UFS PHY settings are
>> provided (say G4 and no-G4, G5 and no-G5). The two sets of PHY settings are
>> basically programming different values to different registers, mixing the
>> two sets and/or overwriting one set with another set is definitely not
>> blessed by UFS PHY designers. For SM8550, this series will make sure we
>> honor the rule. However, for old targets Mani and I will fix them in
>> another series in future.
>>
>> v2 -> v3:
>> 1. Addressed comments from Andrew, Mani and Bart in patch #1
>> 2. Added patch #2 as per request from Andrew and Mani
>> 3. Added patch #4 to fix a common issue on old targets, it is not necessary
>> for this series, but put in this series only because it would be easier
>> to maintain and no need to rebase
>> 4. Addressed comments from Dmitry and Mani in patches to phy-qcom-qmp-ufs.c
>>
>> v1 -> v2:
>> 1. Removed 2 changes which were exposing power info in sysfs
>> 2. Removed 1 change which was moving data structs to phy-qcom-qmp-ufs.h
>> 3. Added one new change (the 1st one) to clean up usage of ufs_dev_params based on comments from Mani
>> 4. Adjusted the logic of UFS device version detection according to comments from Mani:
>> 4.1 For HW version < 0x5, go through dual init
>> 4.2 For HW version >= 0x5
>> a. If UFS device version is populated, one init is required
>> b. If UFS device version is not populated, go through dual init
>
> The cover letter didn't include [email protected], which
> made me have to go searching for this on lore to see what had changed
> in the rest of the series I received as a member of that mailing list.
>

Sorry for the inconvenience.

> Going forward please try and include that mailing list!

Sure, will do.

Thanks,
Can Guo.
>
>>
>> Bao D. Nguyen (1):
>> scsi: ufs: ufs-qcom: Add support for UFS device version detection
>>
>> Can Guo (10):
>> scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params
>> scsi: ufs: ufs-qcom: No need to set hs_rate after
>> ufshcd_init_host_param()
>> scsi: ufs: ufs-qcom: Setup host power mode during init
>> scsi: ufs: ufs-qcom: Limit negotiated gear to selected PHY gear
>> scsi: ufs: ufs-qcom: Allow the first init start with the maximum
>> supported gear
>> scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5
>> scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 5
>> and newer
>> phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
>> phy: qualcomm: phy-qcom-qmp-ufs: Use tbls_hs_max instead of tbls_hs_g4
>> phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for
>> SM8550
>>
>> drivers/phy/qualcomm/phy-qcom-qmp-pcs-ufs-v6.h | 2 +
>> drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v6.h | 2 +
>> .../qualcomm/phy-qcom-qmp-qserdes-txrx-ufs-v6.h | 12 ++
>> drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 171 ++++++++++++++++-----
>> drivers/ufs/host/ufs-exynos.c | 7 +-
>> drivers/ufs/host/ufs-hisi.c | 11 +-
>> drivers/ufs/host/ufs-mediatek.c | 12 +-
>> drivers/ufs/host/ufs-qcom.c | 92 ++++++++---
>> drivers/ufs/host/ufs-qcom.h | 5 +-
>> drivers/ufs/host/ufshcd-pltfrm.c | 69 ++++-----
>> drivers/ufs/host/ufshcd-pltfrm.h | 10 +-
>> 11 files changed, 275 insertions(+), 118 deletions(-)
>>
>> --
>> 2.7.4
>>
>>
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